cpu/sh4a/setup-sh7734.c

1 // SPDX-License-Identifier: GPL-2.0
3  * arch/sh/kernel/cpu/sh4a/setup-sh7734.c
15 #include <linux/dma-mapping.h>
37 	.name		= "sh-sci",
58 	.name		= "sh-sci",
79 	.name		= "sh-sci",
100 	.name		= "sh-sci",
121 	.name		= "sh-sci",
142 	.name		= "sh-sci",
151 /* RTC */
154 		.name	= "rtc",
156 		.end	= 0xFFFC5000 + 0x26 - 1,
166 	.name		= "sh-rtc",
167 	.id		= -1,
177 		.end    = 0xFFC7000A - 1,
187 	.name           = "i2c-sh7734",
206 	.name		= "sh-tmu",
227 	.name		= "sh-tmu",
248 	.name		= "sh-tmu",
324 	RTC,  enumerator
413 	INTC_VECT(RTC, 0xC00),
467 		SDHI, /* SDHI 0-2 */
475 		GPIO_M, /* GPIO 0-5*/
477 		HPBDMAC_M, /* HPBDMAC 0_3 - 23_25_27_28 */
478 		LBSCDMAC_M, /* LBSCDMAC 0 - 2 */
482 		SCIF_M, /* SCIF 0-5, HSCIF */
487 		SSI,	/* SSI 0-3 */
492 		RTC,
494 		TMU_3_M, /* TMU30 - TMU80 */
495 		TMU_0_M, /* TMU00 - TMU21 */
503 		{ TMU30, TMU60, RTC, SDHI } },
556 static DECLARE_INTC_DESC_ACK(intc_desc_irq3210, "sh7734-irq3210",
574 static DECLARE_INTC_DESC(intc_desc_irl3210, "sh7734-irl3210",
585 	/* disable IRQ3-0 */  in plat_irq_setup()
588 	/* disable IRL3-0 */  in plat_irq_setup()
591 	/* select IRL mode for IRL3-0 */  in plat_irq_setup()
594 	/* disable holding function, ie enable "SH-4 Mode (LVLMODE)" */  in plat_irq_setup()
604 		/* select IRQ mode for IRL3-0 */  in plat_irq_setup_pins()
609 		/* enable IRL0-3 but don't provide any masking */  in plat_irq_setup_pins()
614 		/* enable IRL0-3 and mask using cpu intc controller */  in plat_irq_setup_pins()