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/openbmc/linux/include/dt-bindings/memory/
H A Dtegra234-mc.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2 /* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
180 /* MSS internal memqual MIU7 read clients */
182 /* MSS internal memqual MIU7 write clients */
184 /* MSS internal memqual MIU8 read clients */
186 /* MSS internal memqual MIU8 write clients */
188 /* MSS internal memqual MIU9 read clients */
190 /* MSS internal memqual MIU9 write clients */
192 /* MSS internal memqual MIU10 read clients */
194 /* MSS internal memqual MIU10 write clients */
[all …]
H A Dtegra194-mc.h147 /* MSS internal memqual MIU7 read clients */
149 /* MSS internal memqual MIU7 write clients */
151 /* High-definition audio (HDA) read clients */
153 /* Host channel data read clients */
156 /* SATA read clients */
158 /* Reads from Cortex-A9 4 CPU cores via the L2 cache */
161 /* High-definition audio (HDA) write clients */
163 /* Writes from Cortex-A9 4 CPU cores via the L2 cache */
165 /* SATA write clients */
167 /* ISP read client for Crossbar A */
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/arm64/freescale/imx8mp/sys/
H A Dmetrics.json3 "BriefDescription": "bytes of all masters read from ddr",
5 "MetricExpr": "imx8_ddr0@axid\\-read\\,axi_mask\\=0xffff\\,axi_id\\=0x0000@",
6 "ScaleUnit": "9.765625e-4KB",
11 "BriefDescription": "bytes of all masters write to ddr",
13 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0xffff\\,axi_id\\=0x0000@",
14 "ScaleUnit": "9.765625e-4KB",
19 "BriefDescription": "bytes of a53 core read from ddr",
21 "MetricExpr": "imx8_ddr0@axid\\-read\\,axi_mask\\=0x0000\\,axi_id\\=0x0000@",
22 "ScaleUnit": "9.765625e-4KB",
27 "BriefDescription": "bytes of a53 core write to ddr",
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/openbmc/qemu/tests/qemu-iotests/tests/
H A Dimage-fleecing.out3 --- Setting up images ---
7 --- Launching VM ---
11 --- Setting up Fleecing Graph ---
16 --- Setting up NBD Export ---
21 --- Sanity Check ---
23 read -P0x5d 0 64k
24 read -P0xd5 1M 64k
25 read -P0xdc 32M 64k
26 read -P0xcd 0x3ff0000 64k
27 read -P0 0x00f8000 32k
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/openbmc/qemu/tests/qemu-iotests/
H A D1546 # Copyright (C) 2016-2017 Red Hat, Inc.
54 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT
59 # X = non-zero data sector in backing file
60 # - = sector unallocated in whole backing chain
63 # 1. Tail unaligned: 00 00 -- --
64 # 2. Head unaligned: -- -- 00 00
65 # 3. Both unaligned: -- 00 00 --
66 # 4. Both, 2 clusters: -- -- -- 00 | 00 -- -- --
68 $QEMU_IO -c "write -z 0 2k" "$TEST_IMG" | _filter_qemu_io
69 $QEMU_IO -c "write -z 10k 2k" "$TEST_IMG" | _filter_qemu_io
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H A D1715 # (or can) read and write outside of the image size.
50 if [ "$img_size" -ne -1 ] ; then
60 if [ "$img_size" -ge 0 ] ; then
63 test_size=$((size-img_offset))
67 echo "write to image"
68 $QEMU_IO -c "write -P 0x0a 0 $test_size" "$(img_json)" | _filter_qemu_io
71 echo "read the image"
72 $QEMU_IO -c "read -P 0x0a 0 $test_size" "$(img_json)" | _filter_qemu_io
76 $QEMU_IO -c "read -v $((img_offset-2)) 4" $TEST_IMG | _filter_qemu_io
79 echo "write before image boundary"
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H A D153.out2 == readonly=off,force-share=on should be rejected ==
3 QEMU_PROG: -drive if=none,file=null-co://,readonly=off,force-share=on: force-share=on can only be u…
14 QEMU_PROG: -drive file=TEST_DIR/t.qcow2,if=none,: Failed to get "write" lock
17 == Launching another QEMU, opts: 'read-only=on' ==
18 QEMU_PROG: -drive file=TEST_DIR/t.qcow2,if=none,read-only=on: Failed to get shared "write" lock
21 == Launching another QEMU, opts: 'read-only=on,force-share=on' ==
25 _qemu_io_wrapper -c read 0 512 TEST_DIR/t.qcow2
26 qemu-io: can't open device TEST_DIR/t.qcow2: Failed to get "write" lock
29 _qemu_io_wrapper -r -c read 0 512 TEST_DIR/t.qcow2
30 qemu-io: can't open device TEST_DIR/t.qcow2: Failed to get shared "write" lock
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H A D04663 for ((i=0;i<=$((sectors - 1));i++)); do
67 echo "$op -P $pattern $((cur_sec * 64))k 64k"
71 backing_io 0 32 write | $QEMU_IO "$TEST_IMG" | _filter_qemu_io
74 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT 6G
81 # Allocate middle of cluster 1, then write to somewhere before and after it
84 aio_write -P 10 0x18000 0x2000
87 aio_write -P 11 0x12000 0x2000
88 aio_write -P 12 0x1c000 0x2000
94 # Sequential write case: Alloc middle of cluster 2, then write overlapping
98 aio_write -P 20 0x28000 0x2000
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H A D149.out1 # ================= dm-crypt aes-256-xts-plain64-sha1 =================
3 truncate TEST_DIR/luks-aes-256-xts-plain64-sha1.img --size 4194304MB
5 …-q -v luksFormat --type luks1 --cipher aes-xts-plain64 --key-size 512 --hash sha1 --key-slot 0 --k…
7 sudo cryptsetup -q -v luksOpen TEST_DIR/luks-aes-256-xts-plain64-sha1.img qiotest-145-aes-256-xts-p…
8 # Write test pattern 0xa7
9 sudo chown UID:GID /dev/mapper/qiotest-145-aes-256-xts-plain64-sha1
10 qemu-io -c write -P 0xa7 100M 10M --image-opts driver=host_device,filename=/dev/mapper/qiotest-145-…
14 # Write test pattern 0x13
15 sudo chown UID:GID /dev/mapper/qiotest-145-aes-256-xts-plain64-sha1
16 qemu-io -c write -P 0x13 3145728M 10M --image-opts driver=host_device,filename=/dev/mapper/qiotest-…
[all …]
H A D07355 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT
56 $QEMU_IO -c "write -P 0xa5 0 $size" "$TEST_IMG.base" | _filter_qemu_io
59 echo "== normal -> unallocated =="
61 $QEMU_IO -c "write -P 0x11 0 0x10000" "$TEST_IMG" | _filter_qemu_io
62 $QEMU_IO -c "write -P 0x11 0x10000 0x10000" "$TEST_IMG.base" | _filter_qemu_io
64 $QEMU_IO -c "read -P 0x11 0 0x20000" "$TEST_IMG" | _filter_qemu_io
67 echo "== normal -> compressed =="
69 $QEMU_IO -c "write -P 0x22 0x20000 0x10000" "$TEST_IMG" | _filter_qemu_io
70 $QEMU_IO -c "write -c -P 0x22 0x30000 0x10000" "$TEST_IMG" | _filter_qemu_io
72 $QEMU_IO -c "read -P 0x22 0x20000 0x20000" "$TEST_IMG" | _filter_qemu_io
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/openbmc/u-boot/drivers/video/
H A Dtda19988.c1 // SPDX-License-Identifier: GPL-2.0+
27 #define REG_VERSION_LSB REG(0x00, 0x00) /* read */
28 #define REG_MAIN_CNTRL0 REG(0x00, 0x01) /* read/write */
35 #define REG_VERSION_MSB REG(0x00, 0x02) /* read */
36 #define REG_SOFTRESET REG(0x00, 0x0a) /* write */
39 #define REG_DDC_DISABLE REG(0x00, 0x0b) /* read/write */
40 #define REG_I2C_MASTER REG(0x00, 0x0d) /* read/write */
44 #define REG_FEAT_POWERDOWN REG(0x00, 0x0e) /* read/write */
48 #define REG_INT_FLAGS_0 REG(0x00, 0x0f) /* read/write */
49 #define REG_INT_FLAGS_1 REG(0x00, 0x10) /* read/write */
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/openbmc/linux/drivers/net/ethernet/aquantia/atlantic/macsec/
H A Dmacsec_api.h1 /* SPDX-License-Identifier: GPL-2.0-only */
48 /*! Read the raw table data from the specified row of the Egress CTL
50 * rec - [OUT] The raw table row data will be unpacked into the fields of rec.
51 * table_index - The table row to read (max 23).
57 /*! Pack the fields of rec, and write the packed data into the
59 * rec - [IN] The bitfield values to write to the table row.
60 * table_index - The table row to write(max 23).
66 /*! Read the raw table data from the specified row of the Egress
68 * rec - [OUT] The raw table row data will be unpacked into the fields of rec.
69 * table_index - The table row to read (max 47).
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/openbmc/linux/tools/perf/pmu-events/arch/arm64/
H A Drecommended.json3 "PublicDescription": "Attributable Level 1 data cache access, read",
6 "BriefDescription": "L1D cache access, read"
9 "PublicDescription": "Attributable Level 1 data cache access, write",
12 "BriefDescription": "L1D cache access, write"
15 "PublicDescription": "Attributable Level 1 data cache refill, read",
18 "BriefDescription": "L1D cache refill, read"
21 "PublicDescription": "Attributable Level 1 data cache refill, write",
24 "BriefDescription": "L1D cache refill, write"
39 "PublicDescription": "Attributable Level 1 data cache Write-Back, victim",
42 "BriefDescription": "L1D cache Write-Back, victim"
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/openbmc/u-boot/include/
H A Daxi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 * enum axi_size_t - Determine size of AXI transfer
12 * @AXI_SIZE_8: AXI sransfer is 8-bit wide
13 * @AXI_SIZE_16: AXI sransfer is 16-bit wide
14 * @AXI_SIZE_32: AXI sransfer is 32-bit wide
24 * read() - Read a single value from a specified address on a AXI bus
25 * @dev: AXI bus to read from.
26 * @address: The address to read from.
27 * @data: Pointer to a variable that takes the data value read
29 * @size: The size of the data to be read.
[all …]
H A Drtc.h1 /* SPDX-License-Identifier: GPL-2.0+ */
13 /* bcd<->bin functions are needed by almost all the RTC drivers, let's include
23 * get() - get the current time
25 * Returns the current time read from the RTC device. The driver
28 * @dev: Device to read from
29 * @time: Place to put the time that is read
34 * set() - set the current time
39 * @dev: Device to read from
40 * @time: Time to write
45 * reset() - reset the RTC to a known-good state
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H A Dregmap.h1 /* SPDX-License-Identifier: GPL-2.0+ */
21 * Read and write functions are supplied, which can read/write data of
25 * tree settings via the boolean "little-endian", "big-endian", and
26 * "native-endian" properties.
34 * accesses the register map as regular IO-mapped memory.
38 * enum regmap_size_t - Access sizes for regmap reads and writes
40 * @REGMAP_SIZE_8: 8-bit read/write access size
41 * @REGMAP_SIZE_16: 16-bit read/write access size
42 * @REGMAP_SIZE_32: 32-bit read/write access size
43 * @REGMAP_SIZE_64: 64-bit read/write access size
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/openbmc/u-boot/board/micronas/vct/
H A Dscc.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #define DMA_READ 0 /* SCC read DMA */
12 #define DMA_WRITE 1 /* SCC write DMA */
17 #define DMA_START 0 /* DMA command - start DMA */
18 #define DMA_STOP 1 /* DMA command - stop DMA */
19 #define DMA_START_FH_RESET 2 /* DMA command - start DMA reset FH */
20 #define DMA_TAKEOVER 15 /* DMA command - commit the DMA conf */
65 u32 p_dma_channels_rd; /* Number of Read DMA channels */
66 u32 p_dma_channels_wr; /* Number of Write DMA channels */
139 SCC_NULL = -1, /* illegal SCC identifier */
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/openbmc/phosphor-power/tools/i2c/
H A Di2c_interface.hpp83 * The interface can later be re-opened by calling open().
94 /** @brief Read byte data from i2c
96 * @param[out] data - The data read from the i2c device
100 virtual void read(uint8_t& data) = 0;
102 /** @brief Read byte data from i2c
104 * @param[in] addr - The register address of the i2c device
105 * @param[out] data - The data read from the i2c device
109 virtual void read(uint8_t addr, uint8_t& data) = 0;
111 /** @brief Read word data from i2c
113 * Uses the SMBus Read Word protocol. Reads two bytes from the device, and
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H A Di2c.hpp19 * @param[in] busId - The i2c bus ID
20 * @param[in] devAddr - The device address of the I2C device
21 * @param[in] initialState - Initial state of the I2CDevice object
22 * @param[in] maxRetries - Maximum number of times to retry an I2C operation
28 busStr("/dev/i2c-" + std::to_string(busId)) in I2CDevice()
37 static constexpr int INVALID_FD = -1;
90 /** @brief Check i2c adapter read functionality
95 * @param[in] type - The SMBus transaction type defined in linux/i2c.h
101 /** @brief Check i2c adapter write functionality
106 * @param[in] type - The SMBus transaction type defined in linux/i2c.h
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/openbmc/u-boot/drivers/virtio/
H A Dvirtio_pci.h1 /* SPDX-License-Identifier: BSD-3-Clause */
13 /* A 32-bit r/o bitmask of the features supported by the host */
16 /* A 32-bit r/w bitmask of features activated by the guest */
19 /* A 32-bit r/w PFN for the currently selected queue */
22 /* A 16-bit r/o queue size for the currently selected queue */
25 /* A 16-bit r/w queue selector */
28 /* A 16-bit r/w queue notifier */
31 /* An 8-bit device status register */
35 * An 8-bit r/o interrupt status register. Reading the value will return the
37 * a read-and-acknowledge.
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/openbmc/linux/arch/parisc/kernel/
H A Dperf_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /* low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
5 * Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
6 * Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
91 ;* arg0 : rdr to be read
98 ;* arg0 : rdr to be read
100 ;* %r24 - original DR2 value
101 ;* %r1 - scratch
102 ;* %r29 - scratch
114 ; read(shift in) the RDR.
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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-coresight-devices-cti1 What: /sys/bus/coresight/devices/<cti-name>/enable
7 What: /sys/bus/coresight/devices/<cti-name>/powered
11 Description: (Read) Indicate if the CTI hardware is powered.
13 What: /sys/bus/coresight/devices/<cti-name>/ctmid
17 Description: (Read) Display the associated CTM ID
19 What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons
23 Description: (Read) Number of devices connected to triggers on this CTI
25 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name
29 Description: (Read) Name of connected device <N>
31 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals
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/openbmc/openbmc/meta-ibm/meta-romulus/recipes-phosphor/configuration/romulus-yaml-config/
H A Dromulus-ipmi-sensors.yaml26 mutability: Mutability::Write|Mutability::Read
48 mutability: Mutability::Write|Mutability::Read
70 mutability: Mutability::Write|Mutability::Read
100 mutability: Mutability::Write|Mutability::Read
130 mutability: Mutability::Write|Mutability::Read
160 mutability: Mutability::Write|Mutability::Read
190 mutability: Mutability::Write|Mutability::Read
220 mutability: Mutability::Write|Mutability::Read
250 mutability: Mutability::Write|Mutability::Read
280 mutability: Mutability::Write|Mutability::Read
[all …]
/openbmc/linux/Documentation/filesystems/spufs/
H A Dspufs.rst1 .. SPDX-License-Identifier: GPL-2.0
10 spufs - the SPU file system
21 message queues. Users that have write permissions on the file system
26 logical SPU. Users can change permissions on those files, but not actu-
43 The files in spufs mostly follow the standard behavior for regular sys-
44 tem calls like read(2) or write(2), but often support only a subset of
49 All files that support the read(2) operation also support readv(2) and
50 all files that support the write(2) operation also support writev(2).
55 All files support the chmod(2)/fchmod(2) and chown(2)/fchown(2) opera-
57 possible operations, e.g. read access on the wbox file.
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/openbmc/u-boot/board/gateworks/gw_ventana/
H A Dgw_ventana_spl.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/mx6-ddr.h>
11 #include <asm/arch/mx6-pins.h>
13 #include <asm/mach-imx/boot_mode.h>
14 #include <asm/mach-imx/iomux-v3.h>
15 #include <asm/mach-imx/mxc_i2c.h>
35 /* SDCKE[0:1]: 100k pull-up */
38 /* SDBA2: pull-up disabled */
40 /* SDODT[0:1]: 100k pull-up, 40 ohm */
95 /* SDCKE[0:1]: 100k pull-up */
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