/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | sa8775p.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interconnect/qcom,icc.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/qcom,rpmh.h> 9 #include <dt-bindings/clock/qcom,sa8775p-gcc.h> 10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> 11 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h> 12 #include <dt-bindings/mailbox/qcom-ipcc.h> 13 #include <dt-bindings/power/qcom-rpmpd.h> 14 #include <dt-bindings/soc/qcom,rpmh-rsc.h> [all …]
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H A D | sdm670.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interconnect/qcom,osm-l3.h> 14 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h> 15 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 #include <dt-bindings/phy/phy-qcom-qusb2.h> 17 #include <dt-bindings/power/qcom-rpmpd.h> [all …]
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H A D | sc8180x.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2020-2023, Linaro Limited 7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h> 8 #include <dt-bindings/clock/qcom,gcc-sc8180x.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm8150.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/interconnect/qcom,osm-l3.h> 12 #include <dt-bindings/interconnect/qcom,sc8180x.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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H A D | sc7280.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved. 7 #include <dt-bindings/clock/qcom,camcc-sc7280.h> 8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h> 9 #include <dt-bindings/clock/qcom,gcc-sc7280.h> 10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h> 11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> 12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,videocc-sc7280.h> [all …]
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H A D | sm8450.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/qcom,gcc-sm8450.h> 8 #include <dt-bindings/clock/qcom,rpmh.h> 9 #include <dt-bindings/clock/qcom,sm8450-camcc.h> 10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h> 11 #include <dt-bindings/clock/qcom,sm8450-videocc.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/mailbox/qcom-ipcc.h> [all …]
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H A D | sdm845.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/qcom,camcc-sdm845.h> 9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h> 10 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h> 12 #include <dt-bindings/clock/qcom,lpass-sdm845.h> 13 #include <dt-bindings/clock/qcom,rpmh.h> 14 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 15 #include <dt-bindings/dma/qcom-gpi.h> 16 #include <dt-bindings/firmware/qcom,scm.h> [all …]
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H A D | sc7180.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. 8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h> 9 #include <dt-bindings/clock/qcom,gcc-sc7180.h> 10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h> 11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h> 12 #include <dt-bindings/clock/qcom,rpmh.h> 13 #include <dt-bindings/clock/qcom,videocc-sc7180.h> 14 #include <dt-bindings/interconnect/qcom,icc.h> 15 #include <dt-bindings/interconnect/qcom,osm-l3.h> [all …]
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H A D | sm8550.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,rpmh.h> 7 #include <dt-bindings/clock/qcom,sm8450-videocc.h> 8 #include <dt-bindings/clock/qcom,sm8550-gcc.h> 9 #include <dt-bindings/clock/qcom,sm8550-gpucc.h> 10 #include <dt-bindings/clock/qcom,sm8550-tcsr.h> 11 #include <dt-bindings/clock/qcom,sm8550-dispcc.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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H A D | sc8280xp.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h> 8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> 9 #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h> 12 #include <dt-bindings/interconnect/qcom,osm-l3.h> 13 #include <dt-bindings/interconnect/qcom,sc8280xp.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/mailbox/qcom-ipcc.h> [all …]
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H A D | sm6125.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,gcc-sm6125.h> 7 #include <dt-bindings/clock/qcom,rpmcc.h> 8 #include <dt-bindings/dma/qcom-gpi.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/qcom-rpmpd.h> 14 interrupt-parent = <&intc>; 15 #address-cells = <2>; 16 #size-cells = <2>; [all …]
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H A D | qdu1000.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h> 7 #include <dt-bindings/clock/qcom,rpmh.h> 8 #include <dt-bindings/dma/qcom-gpi.h> 9 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/power/qcom-rpmpd.h> 12 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 15 interrupt-parent = <&intc>; 17 #address-cells = <2>; [all …]
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H A D | sm6350.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h> 8 #include <dt-bindings/clock/qcom,gcc-sm6350.h> 9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h> 10 #include <dt-bindings/clock/qcom,rpmh.h> 11 #include <dt-bindings/clock/qcom,sm6350-camcc.h> 12 #include <dt-bindings/dma/qcom-gpi.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,icc.h> 15 #include <dt-bindings/interconnect/qcom,osm-l3.h> [all …]
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H A D | ipq9574.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 9 #include <dt-bindings/clock/qcom,apss-ipq.h> 10 #include <dt-bindings/clock/qcom,ipq9574-gcc.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/reset/qcom,ipq9574-gcc.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&intc>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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H A D | msm8998.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/clock/qcom,gcc-msm8998.h> 6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/power/qcom-rpmpd.h> 10 #include <dt-bindings/gpio/gpio.h> 13 interrupt-parent = <&intc>; 15 qcom,msm-id = <292 0x0>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/i2c/ |
H A D | qcom,i2c-geni-qcom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-geni-qcom.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Geni based QUP I2C Controller 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 16 - qcom,geni-i2c 17 - qcom,geni-i2c-master-hub 23 clock-names: [all …]
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H A D | qcom,i2c-qup.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Universal Peripheral (QUP) I2C controller 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 15 - $ref: /schemas/i2c/i2c-controller.yaml# 20 - qcom,i2c-qup-v1.1.1 # for 8660, 8960 and 8064 [all …]
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/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | qcom,spi-qup.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/qcom,spi-qup.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI) 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 15 The QUP core is an AHB slave that provides a common data path (an output FIFO 16 and an input FIFO) for serial peripheral interface (SPI) mini-core. [all …]
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H A D | qcom,spi-geni-qcom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/qcom,spi-geni-qcom.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI) 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 15 The QUP v3 core is a GENI based AHB slave that provides a common data path 17 mini-core. [all …]
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/openbmc/linux/Documentation/devicetree/bindings/serial/ |
H A D | qcom,serial-geni-qcom.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/qcom,serial-geni-qcom.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Geni based QUP UART interface 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 14 - $ref: /schemas/serial/serial.yaml# 19 - qcom,geni-uart 20 - qcom,geni-debug-uart [all …]
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/openbmc/linux/drivers/i2c/busses/ |
H A D | i2c-qup.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2009-2013, 2016-2018, The Linux Foundation. All rights reserved. 14 #include <linux/dma-mapping.h> 25 /* QUP Registers */ 45 /* QUP States and reset values */ 58 /* QUP OPERATIONAL FLAGS */ 70 /* I2C mini core related values */ 97 /* QUP tags */ 105 /* QUP v2 tags */ 144 * Max tags length (start, stop and maximum 2 bytes address) for each QUP [all …]
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/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,geni-se.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: GENI Serial Engine QUP Wrapper Controller 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 13 Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper 15 like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial 16 Interfaces, using its internal Serial Engines. The GENI Serial Engine QUP 23 - qcom,geni-se-qup [all …]
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H A D | qcom,gsbi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 16 representing a serial sub-node device that is mux'd as part of the GSBI 26 const: qcom,gsbi-v1.0.0 28 '#address-cells': 31 cell-index: [all …]
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/openbmc/linux/drivers/soc/qcom/ |
H A D | qcom-geni-se.c | 1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. 10 #include <linux/dma-mapping.h> 17 #include <linux/soc/qcom/geni-se.h> 23 * to manage GENI firmware based Qualcomm Universal Peripheral (QUP) Wrapper 24 * controller. QUP Wrapper is designed to support various serial bus protocols 31 * GENI based QUP is a highly-flexible and programmable module for supporting 33 * QUP module can provide upto 8 serial interfaces, using its internal 41 * +-----------------------------------------+ 42 * |QUP Wrapper | [all …]
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/openbmc/linux/drivers/spi/ |
H A D | spi-qup.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2008-2014, The Linux foundation. All rights reserved. 18 #include <linux/dma-mapping.h> 115 #define SPI_MAX_XFER (SZ_64K - 64) 127 struct clk *cclk; /* core clock */ 157 u32 opflag = readl_relaxed(controller->base + QUP_OPERATIONAL); in spi_qup_is_flag_set() 173 return controller->n_words * controller->w_size; in spi_qup_len() 178 u32 opstate = readl_relaxed(controller->base + QUP_STATE); in spi_qup_is_valid_state() 194 return -EIO; in spi_qup_set_state() 198 dev_dbg(controller->dev, "invalid state for %ld,us %d\n", in spi_qup_set_state() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,qcm2290.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm QCM2290 Network-On-Chip interconnect 10 - Shawn Guo <shawn.guo@linaro.org> 22 - qcom,qcm2290-bimc 23 - qcom,qcm2290-cnoc 24 - qcom,qcm2290-snoc 26 '#interconnect-cells': 29 clock-names: [all …]
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