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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd71815-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71815-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71815AGW is a single-chip power management ICs for battery-powered
15 for LED and a 500 mA single-cell linear charger. Also included is a Coulomb
16 counter, a real-time clock (RTC), and a 32.768 kHz clock gate and two GPOs.
30 gpio-controller: true
32 "#gpio-cells":
[all …]
H A Drohm,bd71828-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71828-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71828GW is a single-chip power management IC for battery-powered portable
15 single-cell linear charger. Also included is a Coulomb counter, a real-time
30 gpio-controller: true
32 "#gpio-cells":
41 "#clock-cells":
[all …]
/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dnvidia,tegra20-car.txt4 Documentation/devicetree/bindings/clock/clock-bindings.txt
10 - compatible : Should be "nvidia,tegra20-car"
11 - reg : Should contain CAR registers location and length
12 - clocks : Should contain phandle and clock specifiers for two clocks:
13 the 32 KHz "32k_in", and the board-specific oscillator "osc".
14 - #clock-cells : Should be 1.
61 32 mem
119 89 audio_2x a/k/a audio_2x_sync_clk
136 105 clk_32k a/k/a clk_s
160 129 cop a/k/a avp
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dimx6q-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx6q-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
14 const: fsl,imx6q-ccm
24 - description: CCM interrupt request 1
25 - description: CCM interrupt request 2
27 '#clock-cells':
32 - description: 24m osc
[all …]
H A Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of various
25 [1] Clock : ../clock/clock-bindings.txt
28 [2] include/dt-bindings/clock/lochnagar.h
36 - cirrus,lochnagar1-clk
37 - cirrus,lochnagar2-clk
39 '#clock-cells':
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210-p2180.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/mfd/max77620.h>
11 rtc0 = "/i2c@7000d000/pmic@3c";
17 stdout-path = "serial0:115200n8";
26 vdd-supply = <&vdd_gpu>;
31 /delete-property/ dmas;
32 /delete-property/ dma-names;
45 vcc-supply = <&vdd_1v8>;
46 address-width = <8>;
49 read-only;
[all …]
H A Dtegra194-p3668.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
17 rtc0 = "/bpmp/i2c/pmic@3c";
24 stdout-path = "serial0:115200n8";
31 phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(R, 1) GPIO_ACTIVE_LOW>;
32 phy-handle = <&phy>;
33 phy-mode = "rgmii-id";
36 #address-cells = <1>;
37 #size-cells = <0>;
39 phy: ethernet-phy@0 {
[all …]
H A Dtegra186-p3310.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
47 phy: ethernet-phy@0 {
48 compatible = "ethernet-phy-ieee802.3-c22";
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-nexus7-grouper-maxim-pmic.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/interrupt-controller/arm-gic.h>
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/mfd/max77620.h>
9 pmic: pmic@3c { label
14 #interrupt-cells = <2>;
15 interrupt-controller;
17 #gpio-cells = <2>;
18 gpio-controller;
20 system-power-controller;
[all …]
H A Dtegra114-tn7.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
15 linux,initrd-start = <0x82000000>;
16 linux,initrd-end = <0x82800000>;
24 trusted-foundations {
25 compatible = "tlm,trusted-foundations";
26 tlm,version-major = <2>;
27 tlm,version-minor = <8>;
40 avdd-dsi-csi-supply = <&vdd_1v2_ap>;
[all …]
H A Dtegra124-nyan.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
8 rtc0 = "/i2c@7000d000/pmic@40";
14 stdout-path = "serial0:115200n8";
20 * missing a unit-address. However, the bootloader on these Chromebook
22 * Adding the unit-address causes the bootloader to create a /memory
34 /delete-node/ memory@80000000;
40 vdd-supply = <&vdd_3v3_hdmi>;
41 pll-supply = <&vdd_hdmi_pll>;
[all …]
H A Dtegra114-asus-tf701t.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
13 chassis-type = "convertible";
29 trusted-foundations {
30 compatible = "tlm,trusted-foundations";
31 tlm,version-major = <2>;
32 tlm,version-minor = <8>;
40 reserved-memory {
[all …]
/openbmc/u-boot/include/configs/
H A Dpico-imx7d.h1 /* SPDX-License-Identifier: GPL-2.0+ */
21 /* Falcon Mode - MMC support: args@1MB kernel@2MB */
28 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
49 "u-boot raw 0x8a 0x400;" \
51 "/boot/imx7d-pico-hobbit.dtb ext4 0 1;" \
52 "/boot/imx7d-pico-pi.dtb ext4 0 1;" \
56 "bootmenu_0=Boot using PICO-Hobbit baseboard=" \
57 "setenv fdtfile imx7d-pico-hobbit.dtb\0" \
58 "bootmenu_1=Boot using PICO-Pi baseboard=" \
59 "setenv fdtfile imx7d-pico-pi.dtb\0" \
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/openbmc/linux/drivers/clk/
H A Dclk-lochnagar.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2017-2018 Cirrus Logic, Inc. and
11 #include <linux/clk-provider.h>
22 #include <dt-bindings/clock/lochnagar.h>
49 LN_PARENT("ln-none"),
50 LN_PARENT("ln-spdif-mclk"),
51 LN_PARENT("ln-psia1-mclk"),
52 LN_PARENT("ln-psia2-mclk"),
53 LN_PARENT("ln-cdc-clkout"),
54 LN_PARENT("ln-dsp-clkout"),
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
97 This driver supports the hi655x PMIC clock. This
98 multi-function device has one fixed-rate oscillator, clocked
99 at 32KHz.
129 be pre-programmed to support other configurations and features not yet
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
181 tristate "Clock Driver for TI TPS68470 PMIC"
186 This driver supports the clocks provided by the TPS68470 PMIC.
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-kp-ddc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include "imx53-kp.dtsi"
11 model = "K+P imx53 DDC";
12 compatible = "kiebackpeter,imx53-ddc", "fsl,imx53";
15 compatible = "pwm-backlight";
17 power-supply = <&reg_backlight>;
18 brightness-levels = <0 24 28 32 36
22 default-brightness-level = <20>;
26 compatible = "fsl,imx-parallel-display";
[all …]
H A Dimx7d-remarkable2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2019 reMarkable AS - http://www.remarkable.com/
8 /dts-v1/;
11 #include <dt-bindings/input/linux-event-codes.h>
15 compatible = "remarkable,imx7d-remarkable2", "fsl,imx7d";
18 stdout-path = &uart6;
26 thermal-zones {
27 epd-thermal {
28 thermal-sensors = <&sy7636a>;
29 polling-delay-passive = <30000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-a33-sinlinx-sina33.dts2 * Copyright 2015 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a33.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
54 compatible = "sinlinx,sina33", "allwinner,sun8i-a33";
61 stdout-path = "serial0:115200n8";
[all …]
H A Dsun8i-r16-bananapi-m2m.dts2 * Copyright (c) 2017 Free Electrons <maxime.ripard@free-electrons.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun8i-a33.dtsi"
46 #include <dt-bindings/gpio/gpio.h>
50 compatible = "sinovoip,bananapi-m2m", "allwinner,sun8i-a33";
61 stdout-path = "serial0:115200n8";
65 compatible = "gpio-leds";
67 led-0 {
68 label = "bpi-m2m:blue:usr";
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/omap4/
H A Dhw_data.c1 // SPDX-License-Identifier: GPL-2.0+
36 * dpll locked at 1400 MHz MPU clk at 700 MHz(OPP100) - DCC OFF
40 {175, 2, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */
41 {700, 12, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 13 MHz */
42 {125, 2, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */
43 {401, 10, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */
44 {350, 12, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 26 MHz */
45 {700, 26, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 27 MHz */
46 {638, 34, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1} /* 38.4 MHz */
50 * dpll locked at 1600 MHz - MPU clk at 800 MHz(OPP Turbo 4430)
[all …]
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-hikey.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "hikey-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
26 stdout-path = "serial3:115200n8";
32 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
33 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
34 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
35 * 0x0740,f000 - 0x0740,ffff: MCU firmware section
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsun8i-a33-sinlinx-sina33.dts2 * Copyright 2015 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a33.dtsi"
47 #include "sunxi-common-regulators.dtsi"
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/input/input.h>
54 compatible = "sinlinx,sina33", "allwinner,sun8i-a33";
61 stdout-path = "serial0:115200n8";
[all …]
H A Dtegra124-nyan.dtsi1 #include <dt-bindings/input/input.h>
6 rtc0 = "/i2c@7000d000/pmic@40";
19 vdd-supply = <&vdd_3v3_hdmi>;
20 pll-supply = <&vdd_hdmi_pll>;
21 hdmi-supply = <&vdd_5v0_hdmi>;
23 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
24 nvidia,hpd-gpio =
36 vdd-supply = <&vdd_3v3_panel>;
52 clock-frequency = <100000>;
54 acodec: audio-codec@10 {
[all …]
H A Dsun8i-r16-bananapi-m2m.dts2 * Copyright (c) 2017 Free Electrons <maxime.ripard@free-electrons.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun8i-a33.dtsi"
46 #include <dt-bindings/gpio/gpio.h>
50 compatible = "sinovoip,bananapi-m2m", "allwinner,sun8i-a33";
61 stdout-path = "serial0:115200n8";
65 compatible = "gpio-leds";
68 label = "bpi-m2m:blue:usr";
73 label = "bpi-m2m:green:usr";
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn-ddr4-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "imx8mn-evk.dtsi"
13 compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
17 cpu-supply = <&buck2_reg>;
21 cpu-supply = <&buck2_reg>;
25 cpu-supply = <&buck2_reg>;
29 cpu-supply = <&buck2_reg>;
33 operating-points-v2 = <&ddrc_opp_table>;
35 ddrc_opp_table: opp-table {
[all …]

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