1*1f1a0212SSimon GlassNVIDIA Tegra20 Clock And Reset Controller 2*1f1a0212SSimon Glass 3*1f1a0212SSimon GlassThis binding uses the common clock binding: 4*1f1a0212SSimon GlassDocumentation/devicetree/bindings/clock/clock-bindings.txt 5*1f1a0212SSimon Glass 6*1f1a0212SSimon GlassThe CAR (Clock And Reset) Controller on Tegra is the HW module responsible 7*1f1a0212SSimon Glassfor muxing and gating Tegra's clocks, and setting their rates. 8*1f1a0212SSimon Glass 9*1f1a0212SSimon GlassRequired properties : 10*1f1a0212SSimon Glass- compatible : Should be "nvidia,tegra20-car" 11*1f1a0212SSimon Glass- reg : Should contain CAR registers location and length 12*1f1a0212SSimon Glass- clocks : Should contain phandle and clock specifiers for two clocks: 13*1f1a0212SSimon Glass the 32 KHz "32k_in", and the board-specific oscillator "osc". 14*1f1a0212SSimon Glass- #clock-cells : Should be 1. 15*1f1a0212SSimon Glass In clock consumers, this cell represents the clock ID exposed by the CAR. 16*1f1a0212SSimon Glass 17*1f1a0212SSimon Glass The first 96 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB 18*1f1a0212SSimon Glass registers. These IDs often match those in the CAR's RST_DEVICES registers, 19*1f1a0212SSimon Glass but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In 20*1f1a0212SSimon Glass this case, those clocks are assigned IDs above 95 in order to highlight 21*1f1a0212SSimon Glass this issue. Implementations that interpret these clock IDs as bit values 22*1f1a0212SSimon Glass within the CLK_OUT_ENB or RST_DEVICES registers should be careful to 23*1f1a0212SSimon Glass explicitly handle these special cases. 24*1f1a0212SSimon Glass 25*1f1a0212SSimon Glass The balance of the clocks controlled by the CAR are assigned IDs of 96 and 26*1f1a0212SSimon Glass above. 27*1f1a0212SSimon Glass 28*1f1a0212SSimon Glass 0 cpu 29*1f1a0212SSimon Glass 1 unassigned 30*1f1a0212SSimon Glass 2 unassigned 31*1f1a0212SSimon Glass 3 ac97 32*1f1a0212SSimon Glass 4 rtc 33*1f1a0212SSimon Glass 5 tmr 34*1f1a0212SSimon Glass 6 uart1 35*1f1a0212SSimon Glass 7 unassigned (register bit affects uart2 and vfir) 36*1f1a0212SSimon Glass 8 gpio 37*1f1a0212SSimon Glass 9 sdmmc2 38*1f1a0212SSimon Glass 10 unassigned (register bit affects spdif_in and spdif_out) 39*1f1a0212SSimon Glass 11 i2s1 40*1f1a0212SSimon Glass 12 i2c1 41*1f1a0212SSimon Glass 13 ndflash 42*1f1a0212SSimon Glass 14 sdmmc1 43*1f1a0212SSimon Glass 15 sdmmc4 44*1f1a0212SSimon Glass 16 twc 45*1f1a0212SSimon Glass 17 pwm 46*1f1a0212SSimon Glass 18 i2s2 47*1f1a0212SSimon Glass 19 epp 48*1f1a0212SSimon Glass 20 unassigned (register bit affects vi and vi_sensor) 49*1f1a0212SSimon Glass 21 2d 50*1f1a0212SSimon Glass 22 usbd 51*1f1a0212SSimon Glass 23 isp 52*1f1a0212SSimon Glass 24 3d 53*1f1a0212SSimon Glass 25 ide 54*1f1a0212SSimon Glass 26 disp2 55*1f1a0212SSimon Glass 27 disp1 56*1f1a0212SSimon Glass 28 host1x 57*1f1a0212SSimon Glass 29 vcp 58*1f1a0212SSimon Glass 30 unassigned 59*1f1a0212SSimon Glass 31 cache2 60*1f1a0212SSimon Glass 61*1f1a0212SSimon Glass 32 mem 62*1f1a0212SSimon Glass 33 ahbdma 63*1f1a0212SSimon Glass 34 apbdma 64*1f1a0212SSimon Glass 35 unassigned 65*1f1a0212SSimon Glass 36 kbc 66*1f1a0212SSimon Glass 37 stat_mon 67*1f1a0212SSimon Glass 38 pmc 68*1f1a0212SSimon Glass 39 fuse 69*1f1a0212SSimon Glass 40 kfuse 70*1f1a0212SSimon Glass 41 sbc1 71*1f1a0212SSimon Glass 42 snor 72*1f1a0212SSimon Glass 43 spi1 73*1f1a0212SSimon Glass 44 sbc2 74*1f1a0212SSimon Glass 45 xio 75*1f1a0212SSimon Glass 46 sbc3 76*1f1a0212SSimon Glass 47 dvc 77*1f1a0212SSimon Glass 48 dsi 78*1f1a0212SSimon Glass 49 unassigned (register bit affects tvo and cve) 79*1f1a0212SSimon Glass 50 mipi 80*1f1a0212SSimon Glass 51 hdmi 81*1f1a0212SSimon Glass 52 csi 82*1f1a0212SSimon Glass 53 tvdac 83*1f1a0212SSimon Glass 54 i2c2 84*1f1a0212SSimon Glass 55 uart3 85*1f1a0212SSimon Glass 56 unassigned 86*1f1a0212SSimon Glass 57 emc 87*1f1a0212SSimon Glass 58 usb2 88*1f1a0212SSimon Glass 59 usb3 89*1f1a0212SSimon Glass 60 mpe 90*1f1a0212SSimon Glass 61 vde 91*1f1a0212SSimon Glass 62 bsea 92*1f1a0212SSimon Glass 63 bsev 93*1f1a0212SSimon Glass 94*1f1a0212SSimon Glass 64 speedo 95*1f1a0212SSimon Glass 65 uart4 96*1f1a0212SSimon Glass 66 uart5 97*1f1a0212SSimon Glass 67 i2c3 98*1f1a0212SSimon Glass 68 sbc4 99*1f1a0212SSimon Glass 69 sdmmc3 100*1f1a0212SSimon Glass 70 pcie 101*1f1a0212SSimon Glass 71 owr 102*1f1a0212SSimon Glass 72 afi 103*1f1a0212SSimon Glass 73 csite 104*1f1a0212SSimon Glass 74 unassigned 105*1f1a0212SSimon Glass 75 avpucq 106*1f1a0212SSimon Glass 76 la 107*1f1a0212SSimon Glass 77 unassigned 108*1f1a0212SSimon Glass 78 unassigned 109*1f1a0212SSimon Glass 79 unassigned 110*1f1a0212SSimon Glass 80 unassigned 111*1f1a0212SSimon Glass 81 unassigned 112*1f1a0212SSimon Glass 82 unassigned 113*1f1a0212SSimon Glass 83 unassigned 114*1f1a0212SSimon Glass 84 irama 115*1f1a0212SSimon Glass 85 iramb 116*1f1a0212SSimon Glass 86 iramc 117*1f1a0212SSimon Glass 87 iramd 118*1f1a0212SSimon Glass 88 cram2 119*1f1a0212SSimon Glass 89 audio_2x a/k/a audio_2x_sync_clk 120*1f1a0212SSimon Glass 90 clk_d 121*1f1a0212SSimon Glass 91 unassigned 122*1f1a0212SSimon Glass 92 sus 123*1f1a0212SSimon Glass 93 cdev1 124*1f1a0212SSimon Glass 94 cdev2 125*1f1a0212SSimon Glass 95 unassigned 126*1f1a0212SSimon Glass 127*1f1a0212SSimon Glass 96 uart2 128*1f1a0212SSimon Glass 97 vfir 129*1f1a0212SSimon Glass 98 spdif_in 130*1f1a0212SSimon Glass 99 spdif_out 131*1f1a0212SSimon Glass 100 vi 132*1f1a0212SSimon Glass 101 vi_sensor 133*1f1a0212SSimon Glass 102 tvo 134*1f1a0212SSimon Glass 103 cve 135*1f1a0212SSimon Glass 104 osc 136*1f1a0212SSimon Glass 105 clk_32k a/k/a clk_s 137*1f1a0212SSimon Glass 106 clk_m 138*1f1a0212SSimon Glass 107 sclk 139*1f1a0212SSimon Glass 108 cclk 140*1f1a0212SSimon Glass 109 hclk 141*1f1a0212SSimon Glass 110 pclk 142*1f1a0212SSimon Glass 111 blink 143*1f1a0212SSimon Glass 112 pll_a 144*1f1a0212SSimon Glass 113 pll_a_out0 145*1f1a0212SSimon Glass 114 pll_c 146*1f1a0212SSimon Glass 115 pll_c_out1 147*1f1a0212SSimon Glass 116 pll_d 148*1f1a0212SSimon Glass 117 pll_d_out0 149*1f1a0212SSimon Glass 118 pll_e 150*1f1a0212SSimon Glass 119 pll_m 151*1f1a0212SSimon Glass 120 pll_m_out1 152*1f1a0212SSimon Glass 121 pll_p 153*1f1a0212SSimon Glass 122 pll_p_out1 154*1f1a0212SSimon Glass 123 pll_p_out2 155*1f1a0212SSimon Glass 124 pll_p_out3 156*1f1a0212SSimon Glass 125 pll_p_out4 157*1f1a0212SSimon Glass 126 pll_s 158*1f1a0212SSimon Glass 127 pll_u 159*1f1a0212SSimon Glass 128 pll_x 160*1f1a0212SSimon Glass 129 cop a/k/a avp 161*1f1a0212SSimon Glass 130 audio a/k/a audio_sync_clk 162*1f1a0212SSimon Glass 163*1f1a0212SSimon GlassExample SoC include file: 164*1f1a0212SSimon Glass 165*1f1a0212SSimon Glass/ { 166*1f1a0212SSimon Glass tegra_car: clock@60006000 { 167*1f1a0212SSimon Glass compatible = "nvidia,tegra20-car"; 168*1f1a0212SSimon Glass reg = <0x60006000 0x1000>; 169*1f1a0212SSimon Glass #clock-cells = <1>; 170*1f1a0212SSimon Glass }; 171*1f1a0212SSimon Glass 172*1f1a0212SSimon Glass usb@c5004000 { 173*1f1a0212SSimon Glass clocks = <&tegra_car 58>; /* usb2 */ 174*1f1a0212SSimon Glass }; 175*1f1a0212SSimon Glass}; 176*1f1a0212SSimon Glass 177*1f1a0212SSimon GlassExample board file: 178*1f1a0212SSimon Glass 179*1f1a0212SSimon Glass/ { 180*1f1a0212SSimon Glass clocks { 181*1f1a0212SSimon Glass #address-cells = <1>; 182*1f1a0212SSimon Glass #size-cells = <0>; 183*1f1a0212SSimon Glass 184*1f1a0212SSimon Glass osc: clock { 185*1f1a0212SSimon Glass compatible = "fixed-clock"; 186*1f1a0212SSimon Glass #clock-cells = <0>; 187*1f1a0212SSimon Glass clock-frequency = <12000000>; 188*1f1a0212SSimon Glass }; 189*1f1a0212SSimon Glass }; 190*1f1a0212SSimon Glass 191*1f1a0212SSimon Glass i2c@7000d000 { 192*1f1a0212SSimon Glass pmic@34 { 193*1f1a0212SSimon Glass compatible = "ti,tps6586x"; 194*1f1a0212SSimon Glass reg = <0x34>; 195*1f1a0212SSimon Glass 196*1f1a0212SSimon Glass clk_32k: clock { 197*1f1a0212SSimon Glass compatible = "fixed-clock"; 198*1f1a0212SSimon Glass #clock-cells = <0>; 199*1f1a0212SSimon Glass clock-frequency = <32768>; 200*1f1a0212SSimon Glass }; 201*1f1a0212SSimon Glass }; 202*1f1a0212SSimon Glass }; 203*1f1a0212SSimon Glass 204*1f1a0212SSimon Glass &tegra_car { 205*1f1a0212SSimon Glass clocks = <&clk_32k> <&osc>; 206*1f1a0212SSimon Glass }; 207*1f1a0212SSimon Glass}; 208