xref: /openbmc/linux/drivers/clk/Kconfig (revision 90ef3ac1)
1# SPDX-License-Identifier: GPL-2.0
2
3config HAVE_CLK
4	bool
5	help
6	  The <linux/clk.h> calls support software clock gating and
7	  thus are a key power management tool on many systems.
8
9config HAVE_CLK_PREPARE
10	bool
11
12config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
13	bool
14	select HAVE_CLK
15	help
16	  Select this option when the clock API in <linux/clk.h> is implemented
17	  by platform/architecture code. This method is deprecated. Modern
18	  code should select COMMON_CLK instead and not define a custom
19	  'struct clk'.
20
21menuconfig COMMON_CLK
22	bool "Common Clock Framework"
23	depends on !HAVE_LEGACY_CLK
24	select HAVE_CLK_PREPARE
25	select HAVE_CLK
26	select RATIONAL
27	help
28	  The common clock framework is a single definition of struct
29	  clk, useful across many platforms, as well as an
30	  implementation of the clock API in include/linux/clk.h.
31	  Architectures utilizing the common struct clk should select
32	  this option.
33
34if COMMON_CLK
35
36config COMMON_CLK_WM831X
37	tristate "Clock driver for WM831x/2x PMICs"
38	depends on MFD_WM831X
39	help
40	  Supports the clocking subsystem of the WM831x/2x series of
41	  PMICs from Wolfson Microelectronics.
42
43source "drivers/clk/versatile/Kconfig"
44
45config CLK_HSDK
46	bool "PLL Driver for HSDK platform"
47	depends on ARC_SOC_HSDK || COMPILE_TEST
48	depends on HAS_IOMEM
49	help
50	  This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
51	  control.
52
53config LMK04832
54	tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
55	depends on SPI
56	select REGMAP_SPI
57	help
58	  Say yes here to build support for Texas Instruments' LMK04832 Ultra
59	  Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
60
61config COMMON_CLK_APPLE_NCO
62	tristate "Clock driver for Apple SoC NCOs"
63	depends on ARCH_APPLE || COMPILE_TEST
64	default ARCH_APPLE
65	help
66	  This driver supports NCO (Numerically Controlled Oscillator) blocks
67	  found on Apple SoCs such as t8103 (M1). The blocks are typically
68	  generators of audio clocks.
69
70config COMMON_CLK_MAX77686
71	tristate "Clock driver for Maxim 77620/77686/77802 MFD"
72	depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
73	help
74	  This driver supports Maxim 77620/77686/77802 crystal oscillator
75	  clock.
76
77config COMMON_CLK_MAX9485
78	tristate "Maxim 9485 Programmable Clock Generator"
79	depends on I2C
80	help
81	  This driver supports Maxim 9485 Programmable Audio Clock Generator
82
83config COMMON_CLK_RK808
84	tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
85	depends on MFD_RK8XX
86	help
87	  This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
88	  These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
89	  Clkout1 is always on, Clkout2 can off by control register.
90
91config COMMON_CLK_HI655X
92	tristate "Clock driver for Hi655x" if EXPERT
93	depends on (MFD_HI655X_PMIC || COMPILE_TEST)
94	select REGMAP
95	default MFD_HI655X_PMIC
96	help
97	  This driver supports the hi655x PMIC clock. This
98	  multi-function device has one fixed-rate oscillator, clocked
99	  at 32KHz.
100
101config COMMON_CLK_SCMI
102	tristate "Clock driver controlled via SCMI interface"
103	depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
104	help
105	  This driver provides support for clocks that are controlled
106	  by firmware that implements the SCMI interface.
107
108	  This driver uses SCMI Message Protocol to interact with the
109	  firmware providing all the clock controls.
110
111config COMMON_CLK_SCPI
112	tristate "Clock driver controlled via SCPI interface"
113	depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
114	help
115	  This driver provides support for clocks that are controlled
116	  by firmware that implements the SCPI interface.
117
118	  This driver uses SCPI Message Protocol to interact with the
119	  firmware providing all the clock controls.
120
121config COMMON_CLK_SI5341
122	tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
123	depends on I2C
124	select REGMAP_I2C
125	help
126	  This driver supports Silicon Labs Si5341 and Si5340 programmable clock
127	  generators. Not all features of these chips are currently supported
128	  by the driver, in particular it only supports XTAL input. The chip can
129	  be pre-programmed to support other configurations and features not yet
130	  implemented in the driver.
131
132config COMMON_CLK_SI5351
133	tristate "Clock driver for SiLabs 5351A/B/C"
134	depends on I2C
135	select REGMAP_I2C
136	help
137	  This driver supports Silicon Labs 5351A/B/C programmable clock
138	  generators.
139
140config COMMON_CLK_SI514
141	tristate "Clock driver for SiLabs 514 devices"
142	depends on I2C
143	depends on OF
144	select REGMAP_I2C
145	help
146	  This driver supports the Silicon Labs 514 programmable clock
147	  generator.
148
149config COMMON_CLK_SI544
150	tristate "Clock driver for SiLabs 544 devices"
151	depends on I2C
152	select REGMAP_I2C
153	help
154	  This driver supports the Silicon Labs 544 programmable clock
155	  generator.
156
157config COMMON_CLK_SI570
158	tristate "Clock driver for SiLabs 570 and compatible devices"
159	depends on I2C
160	depends on OF
161	select REGMAP_I2C
162	help
163	  This driver supports Silicon Labs 570/571/598/599 programmable
164	  clock generators.
165
166config COMMON_CLK_BM1880
167	bool "Clock driver for Bitmain BM1880 SoC"
168	depends on ARCH_BITMAIN || COMPILE_TEST
169	default ARCH_BITMAIN
170	help
171	  This driver supports the clocks on Bitmain BM1880 SoC.
172
173config COMMON_CLK_CDCE706
174	tristate "Clock driver for TI CDCE706 clock synthesizer"
175	depends on I2C
176	select REGMAP_I2C
177	help
178	  This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
179
180config COMMON_CLK_TPS68470
181	tristate "Clock Driver for TI TPS68470 PMIC"
182	depends on I2C
183	depends on INTEL_SKL_INT3472 || COMPILE_TEST
184	select REGMAP_I2C
185	help
186	  This driver supports the clocks provided by the TPS68470 PMIC.
187
188config COMMON_CLK_CDCE925
189	tristate "Clock driver for TI CDCE913/925/937/949 devices"
190	depends on I2C
191	depends on OF
192	select REGMAP_I2C
193	help
194	  This driver supports the TI CDCE913/925/937/949 programmable clock
195	  synthesizer. Each chip has different number of PLLs and outputs.
196	  For example, the CDCE925 contains two PLLs with spread-spectrum
197	  clocking support and five output dividers. The driver only supports
198	  the following setup, and uses a fixed setting for the output muxes.
199	  Y1 is derived from the input clock
200	  Y2 and Y3 derive from PLL1
201	  Y4 and Y5 derive from PLL2
202	  Given a target output frequency, the driver will set the PLL and
203	  divider to best approximate the desired output.
204
205config COMMON_CLK_CS2000_CP
206	tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
207	depends on I2C
208	select REGMAP_I2C
209	help
210	  If you say yes here you get support for the CS2000 clock multiplier.
211
212config COMMON_CLK_EN7523
213	bool "Clock driver for Airoha EN7523 SoC system clocks"
214	depends on OF
215	depends on ARCH_AIROHA || COMPILE_TEST
216	default ARCH_AIROHA
217	help
218	  This driver provides the fixed clocks and gates present on Airoha
219	  ARM silicon.
220
221config COMMON_CLK_FSL_FLEXSPI
222	tristate "Clock driver for FlexSPI on Layerscape SoCs"
223	depends on ARCH_LAYERSCAPE || COMPILE_TEST
224	default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
225	help
226	  On Layerscape SoCs there is a special clock for the FlexSPI
227	  interface.
228
229config COMMON_CLK_FSL_SAI
230	bool "Clock driver for BCLK of Freescale SAI cores"
231	depends on ARCH_LAYERSCAPE || COMPILE_TEST
232	help
233	  This driver supports the Freescale SAI (Synchronous Audio Interface)
234	  to be used as a generic clock output. Some SoCs have restrictions
235	  regarding the possible pin multiplexer settings. Eg. on some SoCs
236	  two SAI interfaces can only be enabled together. If just one is
237	  needed, the BCLK pin of the second one can be used as general
238	  purpose clock output. Ideally, it can be used to drive an audio
239	  codec (sometimes known as MCLK).
240
241config COMMON_CLK_GEMINI
242	bool "Clock driver for Cortina Systems Gemini SoC"
243	depends on ARCH_GEMINI || COMPILE_TEST
244	select MFD_SYSCON
245	select RESET_CONTROLLER
246	help
247	  This driver supports the SoC clocks on the Cortina Systems Gemini
248	  platform, also known as SL3516 or CS3516.
249
250config COMMON_CLK_LAN966X
251	tristate "Generic Clock Controller driver for LAN966X SoC"
252	depends on HAS_IOMEM
253	depends on OF
254	depends on SOC_LAN966 || COMPILE_TEST
255	help
256	  This driver provides support for Generic Clock Controller(GCK) on
257	  LAN966X SoC. GCK generates and supplies clock to various peripherals
258	  within the SoC.
259
260config COMMON_CLK_ASPEED
261	bool "Clock driver for Aspeed BMC SoCs"
262	depends on ARCH_ASPEED || COMPILE_TEST
263	default ARCH_ASPEED
264	select MFD_SYSCON
265	select RESET_CONTROLLER
266	help
267	  This driver supports the SoC clocks on the Aspeed BMC platforms.
268
269	  The G4 and G5 series, including the ast2400 and ast2500, are supported
270	  by this driver.
271
272config COMMON_CLK_S2MPS11
273	tristate "Clock driver for S2MPS1X/S5M8767 MFD"
274	depends on MFD_SEC_CORE || COMPILE_TEST
275	help
276	  This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
277	  clock. These multi-function devices have two (S2MPS14) or three
278	  (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
279
280config CLK_TWL6040
281	tristate "External McPDM functional clock from twl6040"
282	depends on TWL6040_CORE
283	help
284	  Enable the external functional clock support on OMAP4+ platforms for
285	  McPDM. McPDM module is using the external bit clock on the McPDM bus
286	  as functional clock.
287
288config COMMON_CLK_AXI_CLKGEN
289	tristate "AXI clkgen driver"
290	depends on HAS_IOMEM || COMPILE_TEST
291	depends on OF
292	help
293	  Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
294	  FPGAs. It is commonly used in Analog Devices' reference designs.
295
296config CLK_QORIQ
297	bool "Clock driver for Freescale QorIQ platforms"
298	depends on OF
299	depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
300	help
301	  This adds the clock driver support for Freescale QorIQ platforms
302	  using common clock framework.
303
304config CLK_LS1028A_PLLDIG
305        tristate "Clock driver for LS1028A Display output"
306        depends on ARCH_LAYERSCAPE || COMPILE_TEST
307        default ARCH_LAYERSCAPE
308        help
309          This driver support the Display output interfaces(LCD, DPHY) pixel clocks
310          of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
311          features of the PLL are currently supported by the driver. By default,
312          configured bypass mode with this PLL.
313
314config COMMON_CLK_XGENE
315	bool "Clock driver for APM XGene SoC"
316	default ARCH_XGENE
317	depends on ARM64 || COMPILE_TEST
318	help
319	  Support for the APM X-Gene SoC reference, PLL, and device clocks.
320
321config COMMON_CLK_LOCHNAGAR
322	tristate "Cirrus Logic Lochnagar clock driver"
323	depends on MFD_LOCHNAGAR
324	help
325	  This driver supports the clocking features of the Cirrus Logic
326	  Lochnagar audio development board.
327
328config COMMON_CLK_NPCM8XX
329	tristate "Clock driver for the NPCM8XX SoC Family"
330	depends on ARCH_NPCM || COMPILE_TEST
331	help
332	  This driver supports the clocks on the Nuvoton BMC NPCM8XX SoC Family,
333	  all the clocks are initialized by the bootloader, so this driver
334	  allows only reading of current settings directly from the hardware.
335
336config COMMON_CLK_LOONGSON2
337	bool "Clock driver for Loongson-2 SoC"
338	depends on LOONGARCH || COMPILE_TEST
339	help
340          This driver provides support for clock controller on Loongson-2 SoC.
341          The clock controller can generates and supplies clock to various
342          peripherals within the SoC.
343          Say Y here to support Loongson-2 SoC clock driver.
344
345config COMMON_CLK_NXP
346	def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
347	select REGMAP_MMIO if ARCH_LPC32XX
348	select MFD_SYSCON if ARCH_LPC18XX
349	help
350	  Support for clock providers on NXP platforms.
351
352config COMMON_CLK_PALMAS
353	tristate "Clock driver for TI Palmas devices"
354	depends on MFD_PALMAS
355	help
356	  This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
357	  using common clock framework.
358
359config COMMON_CLK_PWM
360	tristate "Clock driver for PWMs used as clock outputs"
361	depends on PWM
362	help
363	  Adapter driver so that any PWM output can be (mis)used as clock signal
364	  at 50% duty cycle.
365
366config COMMON_CLK_PXA
367	def_bool COMMON_CLK && ARCH_PXA
368	help
369	  Support for the Marvell PXA SoC.
370
371config COMMON_CLK_RS9_PCIE
372	tristate "Clock driver for Renesas 9-series PCIe clock generators"
373	depends on I2C
374	depends on OF
375	select REGMAP_I2C
376	help
377	  This driver supports the Renesas 9-series PCIe clock generator
378	  models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ.
379
380config COMMON_CLK_SI521XX
381	tristate "Clock driver for SkyWorks Si521xx PCIe clock generators"
382	depends on I2C
383	depends on OF
384	select REGMAP_I2C
385	help
386	  This driver supports the SkyWorks Si521xx PCIe clock generator
387	  models Si52144/Si52146/Si52147.
388
389config COMMON_CLK_VC3
390	tristate "Clock driver for Renesas VersaClock 3 devices"
391	depends on I2C
392	depends on OF
393	select REGMAP_I2C
394	help
395	  This driver supports the Renesas VersaClock 3 programmable clock
396	  generators.
397
398config COMMON_CLK_VC5
399	tristate "Clock driver for IDT VersaClock 5,6 devices"
400	depends on I2C
401	depends on OF
402	select REGMAP_I2C
403	help
404	  This driver supports the IDT VersaClock 5 and VersaClock 6
405	  programmable clock generators.
406
407config COMMON_CLK_VC7
408	tristate "Clock driver for Renesas Versaclock 7 devices"
409	depends on I2C
410	depends on OF
411	select REGMAP_I2C
412	help
413	  Renesas Versaclock7 is a family of configurable clock generator
414	  and jitter attenuator ICs with fractional and integer dividers.
415
416config COMMON_CLK_STM32MP135
417	def_bool COMMON_CLK && MACH_STM32MP13
418	help
419	  Support for stm32mp135 SoC family clocks
420
421config COMMON_CLK_STM32MP157
422	def_bool COMMON_CLK && MACH_STM32MP157
423	help
424	  Support for stm32mp157 SoC family clocks
425
426config COMMON_CLK_STM32F
427	def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
428	help
429	  Support for stm32f4 and stm32f7 SoC families clocks
430
431config COMMON_CLK_STM32H7
432	def_bool COMMON_CLK && MACH_STM32H743
433	help
434	  Support for stm32h7 SoC family clocks
435
436config COMMON_CLK_MMP2
437	def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
438	help
439	  Support for Marvell MMP2 and MMP3 SoC clocks
440
441config COMMON_CLK_MMP2_AUDIO
442        tristate "Clock driver for MMP2 Audio subsystem"
443        depends on COMMON_CLK_MMP2 || COMPILE_TEST
444        help
445          This driver supports clocks for Audio subsystem on MMP2 SoC.
446
447config COMMON_CLK_BD718XX
448	tristate "Clock driver for 32K clk gates on ROHM PMICs"
449	depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
450	help
451	  This driver supports ROHM BD71837, BD71847, BD71850, BD71815
452	  and BD71828 PMICs clock gates.
453
454config COMMON_CLK_FIXED_MMIO
455	bool "Clock driver for Memory Mapped Fixed values"
456	depends on COMMON_CLK && OF
457	depends on HAS_IOMEM
458	help
459	  Support for Memory Mapped IO Fixed clocks
460
461config COMMON_CLK_K210
462	bool "Clock driver for the Canaan Kendryte K210 SoC"
463	depends on OF && RISCV && SOC_CANAAN
464	default SOC_CANAAN
465	help
466	  Support for the Canaan Kendryte K210 RISC-V SoC clocks.
467
468config COMMON_CLK_SP7021
469	tristate "Clock driver for Sunplus SP7021 SoC"
470	depends on SOC_SP7021 || COMPILE_TEST
471	default SOC_SP7021
472	help
473	  This driver supports the Sunplus SP7021 SoC clocks.
474	  It implements SP7021 PLLs/gate.
475	  Not all features of the PLL are currently supported
476	  by the driver.
477
478source "drivers/clk/actions/Kconfig"
479source "drivers/clk/analogbits/Kconfig"
480source "drivers/clk/baikal-t1/Kconfig"
481source "drivers/clk/bcm/Kconfig"
482source "drivers/clk/hisilicon/Kconfig"
483source "drivers/clk/imgtec/Kconfig"
484source "drivers/clk/imx/Kconfig"
485source "drivers/clk/ingenic/Kconfig"
486source "drivers/clk/keystone/Kconfig"
487source "drivers/clk/mediatek/Kconfig"
488source "drivers/clk/meson/Kconfig"
489source "drivers/clk/mstar/Kconfig"
490source "drivers/clk/microchip/Kconfig"
491source "drivers/clk/mvebu/Kconfig"
492source "drivers/clk/nuvoton/Kconfig"
493source "drivers/clk/pistachio/Kconfig"
494source "drivers/clk/qcom/Kconfig"
495source "drivers/clk/ralink/Kconfig"
496source "drivers/clk/renesas/Kconfig"
497source "drivers/clk/rockchip/Kconfig"
498source "drivers/clk/samsung/Kconfig"
499source "drivers/clk/sifive/Kconfig"
500source "drivers/clk/socfpga/Kconfig"
501source "drivers/clk/sprd/Kconfig"
502source "drivers/clk/starfive/Kconfig"
503source "drivers/clk/sunxi/Kconfig"
504source "drivers/clk/sunxi-ng/Kconfig"
505source "drivers/clk/tegra/Kconfig"
506source "drivers/clk/ti/Kconfig"
507source "drivers/clk/uniphier/Kconfig"
508source "drivers/clk/visconti/Kconfig"
509source "drivers/clk/x86/Kconfig"
510source "drivers/clk/xilinx/Kconfig"
511source "drivers/clk/zynqmp/Kconfig"
512
513# Kunit test cases
514config CLK_KUNIT_TEST
515	tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS
516	depends on KUNIT
517	default KUNIT_ALL_TESTS
518	help
519	  Kunit tests for the common clock framework.
520
521config CLK_GATE_KUNIT_TEST
522	tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS
523	depends on KUNIT
524	default KUNIT_ALL_TESTS
525	help
526	  Kunit test for the basic clk gate type.
527
528endif
529