| /openbmc/linux/drivers/staging/media/atomisp/ |
| H A D | Makefile | 7 obj-$(CONFIG_VIDEO_ATOMISP) += pci/atomisp_gmin_platform.o
16 pci/atomisp_cmd.o \
17 pci/atomisp_compat_css20.o \
18 pci/atomisp_csi2.o \
19 pci/atomisp_csi2_bridge.o \
20 pci/atomisp_drvfs.o \
21 pci/atomisp_fops.o \
22 pci/atomisp_ioctl.o \
23 pci/atomisp_subdev.o \
24 pci/atomisp_tpg.o \
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| /openbmc/linux/drivers/pci/controller/dwc/ |
| H A D | pcie-designware.c | 23 #include "../../pci.h"
55 static int dw_pcie_get_clocks(struct dw_pcie *pci) in dw_pcie_get_clocks() argument
60 pci->app_clks[i].id = dw_pcie_app_clks[i]; in dw_pcie_get_clocks()
63 pci->core_clks[i].id = dw_pcie_core_clks[i]; in dw_pcie_get_clocks()
65 ret = devm_clk_bulk_get_optional(pci->dev, DW_PCIE_NUM_APP_CLKS, in dw_pcie_get_clocks()
66 pci->app_clks); in dw_pcie_get_clocks()
70 return devm_clk_bulk_get_optional(pci->dev, DW_PCIE_NUM_CORE_CLKS, in dw_pcie_get_clocks()
71 pci->core_clks); in dw_pcie_get_clocks()
74 static int dw_pcie_get_resets(struct dw_pcie *pci) in dw_pcie_get_resets() argument
79 pci->app_rsts[i].id = dw_pcie_app_rsts[i]; in dw_pcie_get_resets()
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| H A D | pcie-designware-ep.c | 14 #include <linux/pci-epc.h>
15 #include <linux/pci-epf.h>
56 static void __dw_pcie_ep_reset_bar(struct dw_pcie *pci, u8 func_no, in __dw_pcie_ep_reset_bar() argument
61 struct dw_pcie_ep *ep = &pci->ep; in __dw_pcie_ep_reset_bar()
66 dw_pcie_dbi_ro_wr_en(pci); in __dw_pcie_ep_reset_bar()
67 dw_pcie_writel_dbi2(pci, reg, 0x0); in __dw_pcie_ep_reset_bar()
68 dw_pcie_writel_dbi(pci, reg, 0x0); in __dw_pcie_ep_reset_bar()
70 dw_pcie_writel_dbi2(pci, reg + 4, 0x0); in __dw_pcie_ep_reset_bar()
71 dw_pcie_writel_dbi(pci, reg + 4, 0x0); in __dw_pcie_ep_reset_bar()
73 dw_pcie_dbi_ro_wr_dis(pci); in __dw_pcie_ep_reset_bar()
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| H A D | pcie-designware-host.c | 20 #include "../../pci.h"
44 .name = "PCI-MSI",
63 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in dw_handle_msi_irq() local
68 status = dw_pcie_readl_dbi(pci, PCIE_MSI_INTR0_STATUS + in dw_handle_msi_irq()
105 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in dw_pci_setup_msi_msg() local
115 dev_dbg(pci->dev, "msi#%d address_hi %#x address_lo %#x\n", in dw_pci_setup_msi_msg()
128 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in dw_pci_bottom_mask() local
139 dw_pcie_writel_dbi(pci, PCIE_MSI_INTR0_MASK + res, pp->irq_mask[ctrl]); in dw_pci_bottom_mask()
147 struct dw_pcie *pci = to_dw_pcie_from_pp(pp); in dw_pci_bottom_unmask() local
158 dw_pcie_writel_dbi(pci, PCIE_MSI_INTR0_MASK + res, pp->irq_mask[ctrl]); in dw_pci_bottom_unmask()
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| H A D | pci-layerscape-ep.c | 15 #include <linux/pci.h>
44 struct dw_pcie *pci; member
54 struct dw_pcie *pci = pcie->pci; in ls_lut_readl() local
57 return ioread32be(pci->dbi_base + offset); in ls_lut_readl()
59 return ioread32(pci->dbi_base + offset); in ls_lut_readl()
64 struct dw_pcie *pci = pcie->pci; in ls_lut_writel() local
67 iowrite32be(value, pci->dbi_base + offset); in ls_lut_writel()
69 iowrite32(value, pci->dbi_base + offset); in ls_lut_writel()
75 struct dw_pcie *pci = pcie->pci; in ls_pcie_ep_event_handler() local
87 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); in ls_pcie_ep_event_handler()
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| H A D | pci-layerscape.c | 19 #include <linux/pci.h>
25 #include "../../pci.h"
46 struct dw_pcie *pci; member
57 struct dw_pcie *pci = pcie->pci; in ls_pcie_is_bridge() local
60 header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_is_bridge()
69 struct dw_pcie *pci = pcie->pci; in ls_pcie_clear_multifunction() local
71 iowrite8(PCI_HEADER_TYPE_BRIDGE, pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_clear_multifunction()
78 struct dw_pcie *pci = pcie->pci; in ls_pcie_drop_msg_tlp() local
80 val = ioread32(pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
82 iowrite32(val, pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
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| /openbmc/qemu/docs/ |
| H A D | pcie.txt | 1 PCI EXPRESS GUIDELINES
6 The doc proposes best practices on how to use PCI Express (PCIe) / PCI
7 devices in PCI Express based machines and explains the reasoning behind
17 (2) A comparison between PCI and PCI Express technologies.
26 and allows any PCI/PCI Express device to be plugged into any
27 PCI/PCI Express slot.
28 Plugging a PCI device into a PCI Express slot might not always work and
30 Plugging a PCI Express device into a PCI slot will hide the Extended
33 The recommendation is to separate the PCI Express and PCI hierarchies.
34 PCI Express devices should be plugged only into PCI Express Root Ports and
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pci/ |
| H A D | base.c | 28 #include <core/pci.h>
33 struct nvkm_pci *pci = device->pci; in nvkm_pci_msi_rearm() local
35 if (pci && pci->msi) in nvkm_pci_msi_rearm()
36 pci->func->msi_rearm(pci); in nvkm_pci_msi_rearm()
40 nvkm_pci_rd32(struct nvkm_pci *pci, u16 addr) in nvkm_pci_rd32() argument
42 return pci->func->rd32(pci, addr); in nvkm_pci_rd32()
46 nvkm_pci_wr08(struct nvkm_pci *pci, u16 addr, u8 data) in nvkm_pci_wr08() argument
48 pci->func->wr08(pci, addr, data); in nvkm_pci_wr08()
52 nvkm_pci_wr32(struct nvkm_pci *pci, u16 addr, u32 data) in nvkm_pci_wr32() argument
54 pci->func->wr32(pci, addr, data); in nvkm_pci_wr32()
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| H A D | pcie.c | 51 nvkm_pcie_get_version(struct nvkm_pci *pci) in nvkm_pcie_get_version() argument
53 if (!pci->func->pcie.version) in nvkm_pcie_get_version()
56 return pci->func->pcie.version(pci); in nvkm_pcie_get_version()
60 nvkm_pcie_get_max_version(struct nvkm_pci *pci) in nvkm_pcie_get_max_version() argument
62 if (!pci->func->pcie.version_supported) in nvkm_pcie_get_max_version()
65 return pci->func->pcie.version_supported(pci); in nvkm_pcie_get_max_version()
69 nvkm_pcie_set_version(struct nvkm_pci *pci, int version) in nvkm_pcie_set_version() argument
71 if (!pci->func->pcie.set_version) in nvkm_pcie_set_version()
74 nvkm_trace(&pci->subdev, "set to version %i\n", version); in nvkm_pcie_set_version()
75 pci->func->pcie.set_version(pci, version); in nvkm_pcie_set_version()
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| H A D | agp.c | 38 /* SiS 761 does not support AGP cards, use PCI mode */
44 nvkm_agp_fini(struct nvkm_pci *pci) in nvkm_agp_fini() argument
46 if (pci->agp.acquired) { in nvkm_agp_fini()
47 agp_backend_release(pci->agp.bridge); in nvkm_agp_fini()
48 pci->agp.acquired = false; in nvkm_agp_fini()
56 nvkm_agp_preinit(struct nvkm_pci *pci) in nvkm_agp_preinit() argument
58 struct nvkm_device *device = pci->subdev.device; in nvkm_agp_preinit()
59 u32 mode = nvkm_pci_rd32(pci, 0x004c); in nvkm_agp_preinit()
66 if ((mode | pci->agp.mode) & PCI_AGP_COMMAND_FW) { in nvkm_agp_preinit()
67 mode = pci->agp.mode & ~PCI_AGP_COMMAND_FW; in nvkm_agp_preinit()
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| /openbmc/linux/drivers/pci/ |
| H A D | Kconfig | 3 # PCI configuration
6 # select this to offer the PCI prompt
10 # select this to unconditionally force on PCI support
14 select PCI
16 menuconfig PCI config
17 bool "PCI support"
20 This option enables support for the PCI local bus, including
21 support for PCI-X and the foundations for PCI Express support.
24 if PCI
28 depends on PCI
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| H A D | search.c | 3 * PCI searching functions
11 #include <linux/pci.h>
15 #include "pci.h"
37 * requester is on another PCI bus. in pci_for_each_dma_alias()
74 * PCIe-to-PCI/X bridges alias transactions from downstream in pci_for_each_dma_alias()
75 * devices using the subordinate bus number (PCI Express to in pci_for_each_dma_alias()
76 * PCI/PCI-X Bridge Spec, rev 1.0, sec 2.3). For all cases in pci_for_each_dma_alias()
77 * where the upstream bus is PCI/X we alias to the bridge in pci_for_each_dma_alias()
80 * when the secondary interface is PCI-X). in pci_for_each_dma_alias()
133 * pci_find_bus - locate PCI bus from a given domain and bus number
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| /openbmc/linux/drivers/edac/ |
| H A D | edac_pci.c | 3 * EDAC PCI component
31 struct edac_pci_ctl_info *pci; in edac_pci_alloc_ctl_info() local
35 pci = kzalloc(sizeof(struct edac_pci_ctl_info), GFP_KERNEL); in edac_pci_alloc_ctl_info()
36 if (!pci) in edac_pci_alloc_ctl_info()
40 pci->pvt_info = kzalloc(sz_pvt, GFP_KERNEL); in edac_pci_alloc_ctl_info()
41 if (!pci->pvt_info) in edac_pci_alloc_ctl_info()
45 pci->op_state = OP_ALLOC; in edac_pci_alloc_ctl_info()
47 snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name); in edac_pci_alloc_ctl_info()
49 return pci; in edac_pci_alloc_ctl_info()
52 kfree(pci); in edac_pci_alloc_ctl_info()
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| /openbmc/linux/drivers/media/pci/ |
| H A D | Kconfig | 3 if PCI
6 bool "Media PCI Adapters"
8 Enable media drivers for PCI/PCIe bus.
16 source "drivers/media/pci/solo6x10/Kconfig"
17 source "drivers/media/pci/sta2x11/Kconfig"
18 source "drivers/media/pci/tw5864/Kconfig"
19 source "drivers/media/pci/tw68/Kconfig"
20 source "drivers/media/pci/tw686x/Kconfig"
21 source "drivers/media/pci/zoran/Kconfig"
28 source "drivers/media/pci/dt3155/Kconfig"
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| /openbmc/linux/Documentation/PCI/endpoint/ |
| H A D | pci-endpoint.rst | 5 This document is a guide to use the PCI Endpoint Framework in order to create
12 Linux has a comprehensive PCI subsystem to support PCI controllers that
13 operates in Root Complex mode. The subsystem has capability to scan PCI bus,
14 assign memory resources and IRQ resources, load PCI driver (based on
18 However the PCI controller IP integrated in some SoCs is capable of operating
19 either in Root Complex mode or Endpoint mode. PCI Endpoint Framework will
24 PCI Endpoint Core
27 The PCI Endpoint Core layer comprises 3 components: the Endpoint Controller
31 PCI Endpoint Controller(EPC) Library
38 APIs for the PCI controller Driver
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| /openbmc/u-boot/doc/driver-model/ |
| H A D | pci-info.txt | 1 PCI with Driver Model
8 uclass_get_device_by_seq() to get the PCI bus for a particular bus number.
14 pci0 = &pci;
17 pci: pci-controller {
18 compatible = "sandbox,pci";
26 The call to uclass_get_device() will cause the PCI bus to be probed.
29 they are bound to a generic PCI driver which does nothing.
35 touched on PCI (eg: a call to pci_find_devices()) it will not be probed.
37 PCI devices can appear in the flattened device tree. If they do, their node
38 often contains extra information which cannot be derived from the PCI IDs or
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| /openbmc/qemu/hw/scsi/ |
| H A D | esp-pci.c | 27 #include "hw/pci/pci_device.h"
80 static void esp_pci_update_irq(PCIESPState *pci) in esp_pci_update_irq() argument
82 int scsi_level = !!(pci->dma_regs[DMA_STAT] & DMA_STAT_SCSIINT); in esp_pci_update_irq()
83 int dma_level = (pci->dma_regs[DMA_CMD] & DMA_CMD_INTE_D) ? in esp_pci_update_irq()
84 !!(pci->dma_regs[DMA_STAT] & DMA_STAT_DONE) : 0; in esp_pci_update_irq()
87 pci_set_irq(PCI_DEVICE(pci), level); in esp_pci_update_irq()
92 PCIESPState *pci = PCI_ESP(opaque); in esp_irq_handler() local
95 pci->dma_regs[DMA_STAT] |= DMA_STAT_SCSIINT; in esp_irq_handler()
104 if ((pci->dma_regs[DMA_CMD] & DMA_CMD_MASK) == 0x3 && in esp_irq_handler()
105 pci->dma_regs[DMA_WBC] == 0) { in esp_irq_handler()
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| /openbmc/linux/drivers/pinctrl/ |
| H A D | pinctrl-rk805.c | 261 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); in rk805_gpio_get() local
264 ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val); in rk805_gpio_get()
266 dev_err(pci->dev, "get gpio%d value failed\n", offset); in rk805_gpio_get()
270 return !!(val & pci->pin_cfg[offset].val_msk); in rk805_gpio_get()
277 struct rk805_pctrl_info *pci = gpiochip_get_data(chip); in rk805_gpio_set() local
280 ret = regmap_update_bits(pci->rk808->regmap, in rk805_gpio_set()
281 pci->pin_cfg[offset].reg, in rk805_gpio_set()
282 pci->pin_cfg[offset].val_msk, in rk805_gpio_set()
283 value ? pci->pin_cfg[offset].val_msk : 0); in rk805_gpio_set()
285 dev_err(pci->dev, "set gpio%d value %d failed\n", in rk805_gpio_set()
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| /openbmc/linux/Documentation/PCI/ |
| H A D | pciebus-howto.rst | 5 The PCI Express Port Bus Driver Guide HOWTO
14 This guide describes the basics of the PCI Express Port Bus driver
16 register/unregister with the PCI Express Port Bus Driver.
19 What is the PCI Express Port Bus Driver
22 A PCI Express Port is a logical PCI-PCI Bridge structure. There
23 are two types of PCI Express Port: the Root Port and the Switch
24 Port. The Root Port originates a PCI Express link from a PCI Express
25 Root Complex and the Switch Port connects PCI Express links to
26 internal logical PCI buses. The Switch Port, which has its secondary
30 PCI Express link from the PCI Express Switch.
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| /openbmc/linux/sound/soc/intel/atom/sst/ |
| H A D | sst_pci.c | 3 * sst_pci.c - SST (LPE) driver init file for pci enumeration.
15 #include <linux/pci.h>
27 struct pci_dev *pci = ctx->pci; in sst_platform_get_resources() local
29 ret = pci_request_regions(pci, SST_DRV_NAME); in sst_platform_get_resources()
36 ctx->ddr_base = pci_resource_start(pci, 0); in sst_platform_get_resources()
50 ctx->ddr_end = pci_resource_end(pci, 0); in sst_platform_get_resources()
52 ctx->ddr = pcim_iomap(pci, 0, in sst_platform_get_resources()
53 pci_resource_len(pci, 0)); in sst_platform_get_resources()
63 ctx->shim_phy_add = pci_resource_start(pci, 1); in sst_platform_get_resources()
64 ctx->shim = pcim_iomap(pci, 1, pci_resource_len(pci, 1)); in sst_platform_get_resources()
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| /openbmc/linux/drivers/comedi/ |
| H A D | Kconfig | 423 tristate "Intelligent Instruments PCI-20001C carrier support"
426 Enable support for Intelligent Instruments PCI-20001C carrier
427 PCI-20001, PCI-20006 and PCI-20341
563 tristate "Comedi PCI drivers"
564 depends on PCI
566 Enable support for comedi PCI drivers.
574 tristate "Generic PCI based 8255 digital i/o board support"
577 Enable support for PCI based 8255 digital i/o boards. This driver
578 provides a PCI wrapper around the generic 8255 driver.
581 ADlink - PCI-7224, PCI-7248, and PCI-7296
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-pci | 1 What: /sys/bus/pci/drivers/.../bind
4 Contact: linux-pci@vger.kernel.org
11 found in /sys/bus/pci/devices/. For example::
13 # echo 0000:00:19.0 > /sys/bus/pci/drivers/foo/bind
17 What: /sys/bus/pci/drivers/.../unbind
20 Contact: linux-pci@vger.kernel.org
27 found in /sys/bus/pci/devices/. For example::
29 # echo 0000:00:19.0 > /sys/bus/pci/drivers/foo/unbind
33 What: /sys/bus/pci/drivers/.../new_id
36 Contact: linux-pci@vger.kernel.org
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| /openbmc/linux/arch/mips/pci/ |
| H A D | Makefile | 3 # Makefile for the PCI specific kernel interface routines under Linux.
6 obj-y += pci.o
7 obj-$(CONFIG_PCI_DRIVERS_LEGACY)+= pci-legacy.o
8 obj-$(CONFIG_PCI_DRIVERS_GENERIC)+= pci-generic.o
11 # PCI bus host bridge specific code
17 obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o
18 obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \
20 obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o
21 obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o
22 obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o
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| /openbmc/linux/drivers/scsi/qla2xxx/ |
| H A D | qla_devtbl.h | 8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
18 "QLA2342", "Sun 133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x10a */
20 "QLA2350", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x10c */
21 "QLA2352", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x10d */
22 "QLA2352", "Sun 133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x10e */
29 "QLA2360", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x115 */
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| /openbmc/qemu/hw/pci-host/ |
| H A D | ppc4xx_pci.c | 20 * This file implements emulation of the 32-bit PCI controller found in some
27 #include "hw/pci-host/ppc4xx.h"
31 #include "hw/pci/pci_device.h"
32 #include "hw/pci/pci_host.h"
71 * PCI accesses.
87 * PCI Target Map (PTM) registers specify which PCI addresses are translated to
102 struct PPC4xxPCIState *pci = opaque; in ppc4xx_pci_reg_write4() local
105 * We ignore all target attempts at PCI configuration, effectively in ppc4xx_pci_reg_write4()
106 * assuming a bidirectional 1:1 mapping of PLB and PCI space. in ppc4xx_pci_reg_write4()
110 pci->pmm[0].la = value; in ppc4xx_pci_reg_write4()
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