Lines Matching full:pci
20 * This file implements emulation of the 32-bit PCI controller found in some
27 #include "hw/pci-host/ppc4xx.h"
31 #include "hw/pci/pci_device.h"
32 #include "hw/pci/pci_host.h"
71 * PCI accesses.
87 * PCI Target Map (PTM) registers specify which PCI addresses are translated to
102 struct PPC4xxPCIState *pci = opaque; in ppc4xx_pci_reg_write4() local
105 * We ignore all target attempts at PCI configuration, effectively in ppc4xx_pci_reg_write4()
106 * assuming a bidirectional 1:1 mapping of PLB and PCI space. in ppc4xx_pci_reg_write4()
110 pci->pmm[0].la = value; in ppc4xx_pci_reg_write4()
113 pci->pmm[0].ma = value; in ppc4xx_pci_reg_write4()
116 pci->pmm[0].pciha = value; in ppc4xx_pci_reg_write4()
119 pci->pmm[0].pcila = value; in ppc4xx_pci_reg_write4()
123 pci->pmm[1].la = value; in ppc4xx_pci_reg_write4()
126 pci->pmm[1].ma = value; in ppc4xx_pci_reg_write4()
129 pci->pmm[1].pciha = value; in ppc4xx_pci_reg_write4()
132 pci->pmm[1].pcila = value; in ppc4xx_pci_reg_write4()
136 pci->pmm[2].la = value; in ppc4xx_pci_reg_write4()
139 pci->pmm[2].ma = value; in ppc4xx_pci_reg_write4()
142 pci->pmm[2].pciha = value; in ppc4xx_pci_reg_write4()
145 pci->pmm[2].pcila = value; in ppc4xx_pci_reg_write4()
149 pci->ptm[0].ms = value; in ppc4xx_pci_reg_write4()
152 pci->ptm[0].la = value; in ppc4xx_pci_reg_write4()
155 pci->ptm[1].ms = value; in ppc4xx_pci_reg_write4()
158 pci->ptm[1].la = value; in ppc4xx_pci_reg_write4()
163 "%s: unhandled PCI internal register 0x%" HWADDR_PRIx "\n", in ppc4xx_pci_reg_write4()
172 struct PPC4xxPCIState *pci = opaque; in ppc4xx_pci_reg_read4() local
177 value = pci->pmm[0].la; in ppc4xx_pci_reg_read4()
180 value = pci->pmm[0].ma; in ppc4xx_pci_reg_read4()
183 value = pci->pmm[0].pciha; in ppc4xx_pci_reg_read4()
186 value = pci->pmm[0].pcila; in ppc4xx_pci_reg_read4()
190 value = pci->pmm[1].la; in ppc4xx_pci_reg_read4()
193 value = pci->pmm[1].ma; in ppc4xx_pci_reg_read4()
196 value = pci->pmm[1].pciha; in ppc4xx_pci_reg_read4()
199 value = pci->pmm[1].pcila; in ppc4xx_pci_reg_read4()
203 value = pci->pmm[2].la; in ppc4xx_pci_reg_read4()
206 value = pci->pmm[2].ma; in ppc4xx_pci_reg_read4()
209 value = pci->pmm[2].pciha; in ppc4xx_pci_reg_read4()
212 value = pci->pmm[2].pcila; in ppc4xx_pci_reg_read4()
216 value = pci->ptm[0].ms; in ppc4xx_pci_reg_read4()
219 value = pci->ptm[0].la; in ppc4xx_pci_reg_read4()
222 value = pci->ptm[1].ms; in ppc4xx_pci_reg_read4()
225 value = pci->ptm[1].la; in ppc4xx_pci_reg_read4()
230 "%s: invalid PCI internal register 0x%" HWADDR_PRIx "\n", in ppc4xx_pci_reg_read4()
246 struct PPC4xxPCIState *pci = opaque; in ppc4xx_pci_reset() local
248 memset(pci->pmm, 0, sizeof(pci->pmm)); in ppc4xx_pci_reset()
249 memset(pci->ptm, 0, sizeof(pci->ptm)); in ppc4xx_pci_reset()
338 memory_region_init(&s->container, OBJECT(s), "pci-container", PCI_ALL_SIZE); in ppc4xx_pcihost_realize()
340 "pci-conf-idx", 4); in ppc4xx_pcihost_realize()
342 "pci-conf-data", 4); in ppc4xx_pcihost_realize()
344 "pci.reg", PCI_REG_SIZE); in ppc4xx_pcihost_realize()
362 * PCI-facing part of the host bridge, not usable without the in ppc4xx_host_bridge_class_init()