12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2ea479996SJoseph Chen /*
3*924764aaSSebastian Reichel * Pinctrl driver for Rockchip RK805/RK806 PMIC
4ea479996SJoseph Chen *
5ea479996SJoseph Chen * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
6*924764aaSSebastian Reichel * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
7ea479996SJoseph Chen *
8ea479996SJoseph Chen * Author: Joseph Chen <chenjh@rock-chips.com>
9*924764aaSSebastian Reichel * Author: Xu Shengfei <xsf@rock-chips.com>
10ea479996SJoseph Chen *
11ea479996SJoseph Chen * Based on the pinctrl-as3722 driver
12ea479996SJoseph Chen */
13ea479996SJoseph Chen
14ea479996SJoseph Chen #include <linux/gpio/driver.h>
15ea479996SJoseph Chen #include <linux/kernel.h>
16ea479996SJoseph Chen #include <linux/module.h>
17ea479996SJoseph Chen #include <linux/mfd/rk808.h>
18ea479996SJoseph Chen #include <linux/platform_device.h>
19ce852837SAndy Shevchenko #include <linux/pm.h>
20ce852837SAndy Shevchenko #include <linux/property.h>
21ce852837SAndy Shevchenko #include <linux/slab.h>
22ce852837SAndy Shevchenko
23ea479996SJoseph Chen #include <linux/pinctrl/consumer.h>
24ea479996SJoseph Chen #include <linux/pinctrl/machine.h>
25ea479996SJoseph Chen #include <linux/pinctrl/pinctrl.h>
26ea479996SJoseph Chen #include <linux/pinctrl/pinconf-generic.h>
27ea479996SJoseph Chen #include <linux/pinctrl/pinconf.h>
28ea479996SJoseph Chen #include <linux/pinctrl/pinmux.h>
29ea479996SJoseph Chen
30ea479996SJoseph Chen #include "core.h"
31ea479996SJoseph Chen #include "pinconf.h"
32ea479996SJoseph Chen #include "pinctrl-utils.h"
33ea479996SJoseph Chen
34ea479996SJoseph Chen struct rk805_pin_function {
35ea479996SJoseph Chen const char *name;
36ea479996SJoseph Chen const char *const *groups;
37ea479996SJoseph Chen unsigned int ngroups;
38ea479996SJoseph Chen int mux_option;
39ea479996SJoseph Chen };
40ea479996SJoseph Chen
41ea479996SJoseph Chen struct rk805_pin_group {
42ea479996SJoseph Chen const char *name;
43ea479996SJoseph Chen const unsigned int pins[1];
44ea479996SJoseph Chen unsigned int npins;
45ea479996SJoseph Chen };
46ea479996SJoseph Chen
47ea479996SJoseph Chen /*
48ea479996SJoseph Chen * @reg: gpio setting register;
49*924764aaSSebastian Reichel * @fun_reg: functions select register;
50ea479996SJoseph Chen * @fun_mask: functions select mask value, when set is gpio;
51ea479996SJoseph Chen * @dir_mask: input or output mask value, when set is output, otherwise input;
52ea479996SJoseph Chen * @val_mask: gpio set value, when set is level high, otherwise low;
53ea479996SJoseph Chen *
54ea479996SJoseph Chen * Different PMIC has different pin features, belowing 3 mask members are not
55ea479996SJoseph Chen * all necessary for every PMIC. For example, RK805 has 2 pins that can be used
56ea479996SJoseph Chen * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1
57ea479996SJoseph Chen * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all
58ea479996SJoseph Chen * necessary.
59ea479996SJoseph Chen */
60ea479996SJoseph Chen struct rk805_pin_config {
61ea479996SJoseph Chen u8 reg;
62*924764aaSSebastian Reichel u8 fun_reg;
63ea479996SJoseph Chen u8 fun_msk;
64ea479996SJoseph Chen u8 dir_msk;
65ea479996SJoseph Chen u8 val_msk;
66ea479996SJoseph Chen };
67ea479996SJoseph Chen
68ea479996SJoseph Chen struct rk805_pctrl_info {
69ea479996SJoseph Chen struct rk808 *rk808;
70ea479996SJoseph Chen struct device *dev;
71ea479996SJoseph Chen struct pinctrl_dev *pctl;
72ea479996SJoseph Chen struct gpio_chip gpio_chip;
73ea479996SJoseph Chen struct pinctrl_desc pinctrl_desc;
74ea479996SJoseph Chen const struct rk805_pin_function *functions;
75ea479996SJoseph Chen unsigned int num_functions;
76ea479996SJoseph Chen const struct rk805_pin_group *groups;
77ea479996SJoseph Chen int num_pin_groups;
78ea479996SJoseph Chen const struct pinctrl_pin_desc *pins;
79ea479996SJoseph Chen unsigned int num_pins;
808068071cSRikard Falkeborn const struct rk805_pin_config *pin_cfg;
81ea479996SJoseph Chen };
82ea479996SJoseph Chen
83ea479996SJoseph Chen enum rk805_pinmux_option {
84ea479996SJoseph Chen RK805_PINMUX_GPIO,
85ea479996SJoseph Chen };
86ea479996SJoseph Chen
87*924764aaSSebastian Reichel enum rk806_pinmux_option {
88*924764aaSSebastian Reichel RK806_PINMUX_FUN0 = 0,
89*924764aaSSebastian Reichel RK806_PINMUX_FUN1,
90*924764aaSSebastian Reichel RK806_PINMUX_FUN2,
91*924764aaSSebastian Reichel RK806_PINMUX_FUN3,
92*924764aaSSebastian Reichel RK806_PINMUX_FUN4,
93*924764aaSSebastian Reichel RK806_PINMUX_FUN5,
94*924764aaSSebastian Reichel };
95*924764aaSSebastian Reichel
96ea479996SJoseph Chen enum {
97ea479996SJoseph Chen RK805_GPIO0,
98ea479996SJoseph Chen RK805_GPIO1,
99ea479996SJoseph Chen };
100ea479996SJoseph Chen
101*924764aaSSebastian Reichel enum {
102*924764aaSSebastian Reichel RK806_GPIO_DVS1,
103*924764aaSSebastian Reichel RK806_GPIO_DVS2,
104*924764aaSSebastian Reichel RK806_GPIO_DVS3
105*924764aaSSebastian Reichel };
106*924764aaSSebastian Reichel
107ea479996SJoseph Chen static const char *const rk805_gpio_groups[] = {
108ea479996SJoseph Chen "gpio0",
109ea479996SJoseph Chen "gpio1",
110ea479996SJoseph Chen };
111ea479996SJoseph Chen
112*924764aaSSebastian Reichel static const char *const rk806_gpio_groups[] = {
113*924764aaSSebastian Reichel "gpio_pwrctrl1",
114*924764aaSSebastian Reichel "gpio_pwrctrl2",
115*924764aaSSebastian Reichel "gpio_pwrctrl3",
116*924764aaSSebastian Reichel };
117*924764aaSSebastian Reichel
118ea479996SJoseph Chen /* RK805: 2 output only GPIOs */
119ea479996SJoseph Chen static const struct pinctrl_pin_desc rk805_pins_desc[] = {
120ea479996SJoseph Chen PINCTRL_PIN(RK805_GPIO0, "gpio0"),
121ea479996SJoseph Chen PINCTRL_PIN(RK805_GPIO1, "gpio1"),
122ea479996SJoseph Chen };
123ea479996SJoseph Chen
124*924764aaSSebastian Reichel /* RK806 */
125*924764aaSSebastian Reichel static const struct pinctrl_pin_desc rk806_pins_desc[] = {
126*924764aaSSebastian Reichel PINCTRL_PIN(RK806_GPIO_DVS1, "gpio_pwrctrl1"),
127*924764aaSSebastian Reichel PINCTRL_PIN(RK806_GPIO_DVS2, "gpio_pwrctrl2"),
128*924764aaSSebastian Reichel PINCTRL_PIN(RK806_GPIO_DVS3, "gpio_pwrctrl3"),
129*924764aaSSebastian Reichel };
130*924764aaSSebastian Reichel
131ea479996SJoseph Chen static const struct rk805_pin_function rk805_pin_functions[] = {
132ea479996SJoseph Chen {
133ea479996SJoseph Chen .name = "gpio",
134ea479996SJoseph Chen .groups = rk805_gpio_groups,
135ea479996SJoseph Chen .ngroups = ARRAY_SIZE(rk805_gpio_groups),
136ea479996SJoseph Chen .mux_option = RK805_PINMUX_GPIO,
137ea479996SJoseph Chen },
138ea479996SJoseph Chen };
139ea479996SJoseph Chen
140*924764aaSSebastian Reichel static const struct rk805_pin_function rk806_pin_functions[] = {
141*924764aaSSebastian Reichel {
142*924764aaSSebastian Reichel .name = "pin_fun0",
143*924764aaSSebastian Reichel .groups = rk806_gpio_groups,
144*924764aaSSebastian Reichel .ngroups = ARRAY_SIZE(rk806_gpio_groups),
145*924764aaSSebastian Reichel .mux_option = RK806_PINMUX_FUN0,
146*924764aaSSebastian Reichel },
147*924764aaSSebastian Reichel {
148*924764aaSSebastian Reichel .name = "pin_fun1",
149*924764aaSSebastian Reichel .groups = rk806_gpio_groups,
150*924764aaSSebastian Reichel .ngroups = ARRAY_SIZE(rk806_gpio_groups),
151*924764aaSSebastian Reichel .mux_option = RK806_PINMUX_FUN1,
152*924764aaSSebastian Reichel },
153*924764aaSSebastian Reichel {
154*924764aaSSebastian Reichel .name = "pin_fun2",
155*924764aaSSebastian Reichel .groups = rk806_gpio_groups,
156*924764aaSSebastian Reichel .ngroups = ARRAY_SIZE(rk806_gpio_groups),
157*924764aaSSebastian Reichel .mux_option = RK806_PINMUX_FUN2,
158*924764aaSSebastian Reichel },
159*924764aaSSebastian Reichel {
160*924764aaSSebastian Reichel .name = "pin_fun3",
161*924764aaSSebastian Reichel .groups = rk806_gpio_groups,
162*924764aaSSebastian Reichel .ngroups = ARRAY_SIZE(rk806_gpio_groups),
163*924764aaSSebastian Reichel .mux_option = RK806_PINMUX_FUN3,
164*924764aaSSebastian Reichel },
165*924764aaSSebastian Reichel {
166*924764aaSSebastian Reichel .name = "pin_fun4",
167*924764aaSSebastian Reichel .groups = rk806_gpio_groups,
168*924764aaSSebastian Reichel .ngroups = ARRAY_SIZE(rk806_gpio_groups),
169*924764aaSSebastian Reichel .mux_option = RK806_PINMUX_FUN4,
170*924764aaSSebastian Reichel },
171*924764aaSSebastian Reichel {
172*924764aaSSebastian Reichel .name = "pin_fun5",
173*924764aaSSebastian Reichel .groups = rk806_gpio_groups,
174*924764aaSSebastian Reichel .ngroups = ARRAY_SIZE(rk806_gpio_groups),
175*924764aaSSebastian Reichel .mux_option = RK806_PINMUX_FUN5,
176*924764aaSSebastian Reichel },
177*924764aaSSebastian Reichel };
178*924764aaSSebastian Reichel
179ea479996SJoseph Chen static const struct rk805_pin_group rk805_pin_groups[] = {
180ea479996SJoseph Chen {
181ea479996SJoseph Chen .name = "gpio0",
182ea479996SJoseph Chen .pins = { RK805_GPIO0 },
183ea479996SJoseph Chen .npins = 1,
184ea479996SJoseph Chen },
185ea479996SJoseph Chen {
186ea479996SJoseph Chen .name = "gpio1",
187ea479996SJoseph Chen .pins = { RK805_GPIO1 },
188ea479996SJoseph Chen .npins = 1,
189ea479996SJoseph Chen },
190ea479996SJoseph Chen };
191ea479996SJoseph Chen
192*924764aaSSebastian Reichel static const struct rk805_pin_group rk806_pin_groups[] = {
193*924764aaSSebastian Reichel {
194*924764aaSSebastian Reichel .name = "gpio_pwrctrl1",
195*924764aaSSebastian Reichel .pins = { RK806_GPIO_DVS1 },
196*924764aaSSebastian Reichel .npins = 1,
197*924764aaSSebastian Reichel },
198*924764aaSSebastian Reichel {
199*924764aaSSebastian Reichel .name = "gpio_pwrctrl2",
200*924764aaSSebastian Reichel .pins = { RK806_GPIO_DVS2 },
201*924764aaSSebastian Reichel .npins = 1,
202*924764aaSSebastian Reichel },
203*924764aaSSebastian Reichel {
204*924764aaSSebastian Reichel .name = "gpio_pwrctrl3",
205*924764aaSSebastian Reichel .pins = { RK806_GPIO_DVS3 },
206*924764aaSSebastian Reichel .npins = 1,
207*924764aaSSebastian Reichel }
208*924764aaSSebastian Reichel };
209*924764aaSSebastian Reichel
210ea479996SJoseph Chen #define RK805_GPIO0_VAL_MSK BIT(0)
211ea479996SJoseph Chen #define RK805_GPIO1_VAL_MSK BIT(1)
212ea479996SJoseph Chen
2138068071cSRikard Falkeborn static const struct rk805_pin_config rk805_gpio_cfgs[] = {
214ea479996SJoseph Chen {
215ea479996SJoseph Chen .reg = RK805_OUT_REG,
216ea479996SJoseph Chen .val_msk = RK805_GPIO0_VAL_MSK,
217ea479996SJoseph Chen },
218ea479996SJoseph Chen {
219ea479996SJoseph Chen .reg = RK805_OUT_REG,
220ea479996SJoseph Chen .val_msk = RK805_GPIO1_VAL_MSK,
221ea479996SJoseph Chen },
222ea479996SJoseph Chen };
223ea479996SJoseph Chen
224*924764aaSSebastian Reichel #define RK806_PWRCTRL1_DR BIT(0)
225*924764aaSSebastian Reichel #define RK806_PWRCTRL2_DR BIT(1)
226*924764aaSSebastian Reichel #define RK806_PWRCTRL3_DR BIT(2)
227*924764aaSSebastian Reichel #define RK806_PWRCTRL1_DATA BIT(4)
228*924764aaSSebastian Reichel #define RK806_PWRCTRL2_DATA BIT(5)
229*924764aaSSebastian Reichel #define RK806_PWRCTRL3_DATA BIT(6)
230*924764aaSSebastian Reichel #define RK806_PWRCTRL1_FUN GENMASK(2, 0)
231*924764aaSSebastian Reichel #define RK806_PWRCTRL2_FUN GENMASK(6, 4)
232*924764aaSSebastian Reichel #define RK806_PWRCTRL3_FUN GENMASK(2, 0)
233*924764aaSSebastian Reichel
234*924764aaSSebastian Reichel static struct rk805_pin_config rk806_gpio_cfgs[] = {
235*924764aaSSebastian Reichel {
236*924764aaSSebastian Reichel .fun_reg = RK806_SLEEP_CONFIG0,
237*924764aaSSebastian Reichel .fun_msk = RK806_PWRCTRL1_FUN,
238*924764aaSSebastian Reichel .reg = RK806_SLEEP_GPIO,
239*924764aaSSebastian Reichel .val_msk = RK806_PWRCTRL1_DATA,
240*924764aaSSebastian Reichel .dir_msk = RK806_PWRCTRL1_DR,
241*924764aaSSebastian Reichel },
242*924764aaSSebastian Reichel {
243*924764aaSSebastian Reichel .fun_reg = RK806_SLEEP_CONFIG0,
244*924764aaSSebastian Reichel .fun_msk = RK806_PWRCTRL2_FUN,
245*924764aaSSebastian Reichel .reg = RK806_SLEEP_GPIO,
246*924764aaSSebastian Reichel .val_msk = RK806_PWRCTRL2_DATA,
247*924764aaSSebastian Reichel .dir_msk = RK806_PWRCTRL2_DR,
248*924764aaSSebastian Reichel },
249*924764aaSSebastian Reichel {
250*924764aaSSebastian Reichel .fun_reg = RK806_SLEEP_CONFIG1,
251*924764aaSSebastian Reichel .fun_msk = RK806_PWRCTRL3_FUN,
252*924764aaSSebastian Reichel .reg = RK806_SLEEP_GPIO,
253*924764aaSSebastian Reichel .val_msk = RK806_PWRCTRL3_DATA,
254*924764aaSSebastian Reichel .dir_msk = RK806_PWRCTRL3_DR,
255*924764aaSSebastian Reichel }
256*924764aaSSebastian Reichel };
257*924764aaSSebastian Reichel
258ea479996SJoseph Chen /* generic gpio chip */
rk805_gpio_get(struct gpio_chip * chip,unsigned int offset)259ea479996SJoseph Chen static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset)
260ea479996SJoseph Chen {
261ea479996SJoseph Chen struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
262ea479996SJoseph Chen int ret, val;
263ea479996SJoseph Chen
264ea479996SJoseph Chen ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val);
265ea479996SJoseph Chen if (ret) {
266ea479996SJoseph Chen dev_err(pci->dev, "get gpio%d value failed\n", offset);
267ea479996SJoseph Chen return ret;
268ea479996SJoseph Chen }
269ea479996SJoseph Chen
270ea479996SJoseph Chen return !!(val & pci->pin_cfg[offset].val_msk);
271ea479996SJoseph Chen }
272ea479996SJoseph Chen
rk805_gpio_set(struct gpio_chip * chip,unsigned int offset,int value)273ea479996SJoseph Chen static void rk805_gpio_set(struct gpio_chip *chip,
274ea479996SJoseph Chen unsigned int offset,
275ea479996SJoseph Chen int value)
276ea479996SJoseph Chen {
277ea479996SJoseph Chen struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
278ea479996SJoseph Chen int ret;
279ea479996SJoseph Chen
280ea479996SJoseph Chen ret = regmap_update_bits(pci->rk808->regmap,
281ea479996SJoseph Chen pci->pin_cfg[offset].reg,
282ea479996SJoseph Chen pci->pin_cfg[offset].val_msk,
283ea479996SJoseph Chen value ? pci->pin_cfg[offset].val_msk : 0);
284ea479996SJoseph Chen if (ret)
285ea479996SJoseph Chen dev_err(pci->dev, "set gpio%d value %d failed\n",
286ea479996SJoseph Chen offset, value);
287ea479996SJoseph Chen }
288ea479996SJoseph Chen
rk805_gpio_direction_input(struct gpio_chip * chip,unsigned int offset)289ea479996SJoseph Chen static int rk805_gpio_direction_input(struct gpio_chip *chip,
290ea479996SJoseph Chen unsigned int offset)
291ea479996SJoseph Chen {
292ea479996SJoseph Chen return pinctrl_gpio_direction_input(chip->base + offset);
293ea479996SJoseph Chen }
294ea479996SJoseph Chen
rk805_gpio_direction_output(struct gpio_chip * chip,unsigned int offset,int value)295ea479996SJoseph Chen static int rk805_gpio_direction_output(struct gpio_chip *chip,
296ea479996SJoseph Chen unsigned int offset, int value)
297ea479996SJoseph Chen {
298ea479996SJoseph Chen rk805_gpio_set(chip, offset, value);
299ea479996SJoseph Chen return pinctrl_gpio_direction_output(chip->base + offset);
300ea479996SJoseph Chen }
301ea479996SJoseph Chen
rk805_gpio_get_direction(struct gpio_chip * chip,unsigned int offset)302ea479996SJoseph Chen static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
303ea479996SJoseph Chen {
304ea479996SJoseph Chen struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
305ea479996SJoseph Chen unsigned int val;
306ea479996SJoseph Chen int ret;
307ea479996SJoseph Chen
308ea479996SJoseph Chen /* default output*/
309ea479996SJoseph Chen if (!pci->pin_cfg[offset].dir_msk)
3103c827873SMatti Vaittinen return GPIO_LINE_DIRECTION_OUT;
311ea479996SJoseph Chen
312ea479996SJoseph Chen ret = regmap_read(pci->rk808->regmap,
313ea479996SJoseph Chen pci->pin_cfg[offset].reg,
314ea479996SJoseph Chen &val);
315ea479996SJoseph Chen if (ret) {
316ea479996SJoseph Chen dev_err(pci->dev, "get gpio%d direction failed\n", offset);
317ea479996SJoseph Chen return ret;
318ea479996SJoseph Chen }
319ea479996SJoseph Chen
3203c827873SMatti Vaittinen if (val & pci->pin_cfg[offset].dir_msk)
3213c827873SMatti Vaittinen return GPIO_LINE_DIRECTION_OUT;
3223c827873SMatti Vaittinen
3233c827873SMatti Vaittinen return GPIO_LINE_DIRECTION_IN;
324ea479996SJoseph Chen }
325ea479996SJoseph Chen
3266e28aaabSNishka Dasgupta static const struct gpio_chip rk805_gpio_chip = {
327ea479996SJoseph Chen .label = "rk805-gpio",
328ea479996SJoseph Chen .request = gpiochip_generic_request,
329ea479996SJoseph Chen .free = gpiochip_generic_free,
330ea479996SJoseph Chen .get_direction = rk805_gpio_get_direction,
331ea479996SJoseph Chen .get = rk805_gpio_get,
332ea479996SJoseph Chen .set = rk805_gpio_set,
333ea479996SJoseph Chen .direction_input = rk805_gpio_direction_input,
334ea479996SJoseph Chen .direction_output = rk805_gpio_direction_output,
335ea479996SJoseph Chen .can_sleep = true,
336ea479996SJoseph Chen .base = -1,
337ea479996SJoseph Chen .owner = THIS_MODULE,
338ea479996SJoseph Chen };
339ea479996SJoseph Chen
340ea479996SJoseph Chen /* generic pinctrl */
rk805_pinctrl_get_groups_count(struct pinctrl_dev * pctldev)341ea479996SJoseph Chen static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
342ea479996SJoseph Chen {
343ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
344ea479996SJoseph Chen
345ea479996SJoseph Chen return pci->num_pin_groups;
346ea479996SJoseph Chen }
347ea479996SJoseph Chen
rk805_pinctrl_get_group_name(struct pinctrl_dev * pctldev,unsigned int group)348ea479996SJoseph Chen static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
349ea479996SJoseph Chen unsigned int group)
350ea479996SJoseph Chen {
351ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
352ea479996SJoseph Chen
353ea479996SJoseph Chen return pci->groups[group].name;
354ea479996SJoseph Chen }
355ea479996SJoseph Chen
rk805_pinctrl_get_group_pins(struct pinctrl_dev * pctldev,unsigned int group,const unsigned int ** pins,unsigned int * num_pins)356ea479996SJoseph Chen static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
357ea479996SJoseph Chen unsigned int group,
358ea479996SJoseph Chen const unsigned int **pins,
359ea479996SJoseph Chen unsigned int *num_pins)
360ea479996SJoseph Chen {
361ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
362ea479996SJoseph Chen
363ea479996SJoseph Chen *pins = pci->groups[group].pins;
364ea479996SJoseph Chen *num_pins = pci->groups[group].npins;
365ea479996SJoseph Chen
366ea479996SJoseph Chen return 0;
367ea479996SJoseph Chen }
368ea479996SJoseph Chen
369ea479996SJoseph Chen static const struct pinctrl_ops rk805_pinctrl_ops = {
370ea479996SJoseph Chen .get_groups_count = rk805_pinctrl_get_groups_count,
371ea479996SJoseph Chen .get_group_name = rk805_pinctrl_get_group_name,
372ea479996SJoseph Chen .get_group_pins = rk805_pinctrl_get_group_pins,
373ea479996SJoseph Chen .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
374ea479996SJoseph Chen .dt_free_map = pinctrl_utils_free_map,
375ea479996SJoseph Chen };
376ea479996SJoseph Chen
rk805_pinctrl_get_funcs_count(struct pinctrl_dev * pctldev)377ea479996SJoseph Chen static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
378ea479996SJoseph Chen {
379ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
380ea479996SJoseph Chen
381ea479996SJoseph Chen return pci->num_functions;
382ea479996SJoseph Chen }
383ea479996SJoseph Chen
rk805_pinctrl_get_func_name(struct pinctrl_dev * pctldev,unsigned int function)384ea479996SJoseph Chen static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
385ea479996SJoseph Chen unsigned int function)
386ea479996SJoseph Chen {
387ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
388ea479996SJoseph Chen
389ea479996SJoseph Chen return pci->functions[function].name;
390ea479996SJoseph Chen }
391ea479996SJoseph Chen
rk805_pinctrl_get_func_groups(struct pinctrl_dev * pctldev,unsigned int function,const char * const ** groups,unsigned int * const num_groups)392ea479996SJoseph Chen static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
393ea479996SJoseph Chen unsigned int function,
394ea479996SJoseph Chen const char *const **groups,
395ea479996SJoseph Chen unsigned int *const num_groups)
396ea479996SJoseph Chen {
397ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
398ea479996SJoseph Chen
399ea479996SJoseph Chen *groups = pci->functions[function].groups;
400ea479996SJoseph Chen *num_groups = pci->functions[function].ngroups;
401ea479996SJoseph Chen
402ea479996SJoseph Chen return 0;
403ea479996SJoseph Chen }
404ea479996SJoseph Chen
_rk805_pinctrl_set_mux(struct pinctrl_dev * pctldev,unsigned int offset,int mux)405ea479996SJoseph Chen static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
406ea479996SJoseph Chen unsigned int offset,
407ea479996SJoseph Chen int mux)
408ea479996SJoseph Chen {
409ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
410ea479996SJoseph Chen int ret;
411ea479996SJoseph Chen
412ea479996SJoseph Chen if (!pci->pin_cfg[offset].fun_msk)
413ea479996SJoseph Chen return 0;
414ea479996SJoseph Chen
415*924764aaSSebastian Reichel mux <<= ffs(pci->pin_cfg[offset].fun_msk) - 1;
416ea479996SJoseph Chen ret = regmap_update_bits(pci->rk808->regmap,
417*924764aaSSebastian Reichel pci->pin_cfg[offset].fun_reg,
418*924764aaSSebastian Reichel pci->pin_cfg[offset].fun_msk, mux);
419*924764aaSSebastian Reichel
420*924764aaSSebastian Reichel if (ret)
421*924764aaSSebastian Reichel dev_err(pci->dev, "set gpio%d func%d failed\n", offset, mux);
422ea479996SJoseph Chen
423ea479996SJoseph Chen return 0;
424ea479996SJoseph Chen }
425ea479996SJoseph Chen
rk805_pinctrl_set_mux(struct pinctrl_dev * pctldev,unsigned int function,unsigned int group)426ea479996SJoseph Chen static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
427ea479996SJoseph Chen unsigned int function,
428ea479996SJoseph Chen unsigned int group)
429ea479996SJoseph Chen {
430ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
431ea479996SJoseph Chen int mux = pci->functions[function].mux_option;
432ea479996SJoseph Chen int offset = group;
433ea479996SJoseph Chen
434ea479996SJoseph Chen return _rk805_pinctrl_set_mux(pctldev, offset, mux);
435ea479996SJoseph Chen }
436ea479996SJoseph Chen
rk805_pinctrl_gpio_request_enable(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned int offset)437*924764aaSSebastian Reichel static int rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
438*924764aaSSebastian Reichel struct pinctrl_gpio_range *range,
439*924764aaSSebastian Reichel unsigned int offset)
440*924764aaSSebastian Reichel {
441*924764aaSSebastian Reichel struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
442*924764aaSSebastian Reichel
443*924764aaSSebastian Reichel switch (pci->rk808->variant) {
444*924764aaSSebastian Reichel case RK805_ID:
445*924764aaSSebastian Reichel return _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO);
446*924764aaSSebastian Reichel case RK806_ID:
447*924764aaSSebastian Reichel return _rk805_pinctrl_set_mux(pctldev, offset, RK806_PINMUX_FUN5);
448*924764aaSSebastian Reichel }
449*924764aaSSebastian Reichel
450*924764aaSSebastian Reichel return -ENOTSUPP;
451*924764aaSSebastian Reichel }
452*924764aaSSebastian Reichel
rk805_pmx_gpio_set_direction(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned int offset,bool input)453ea479996SJoseph Chen static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
454ea479996SJoseph Chen struct pinctrl_gpio_range *range,
455ea479996SJoseph Chen unsigned int offset, bool input)
456ea479996SJoseph Chen {
457ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
458ea479996SJoseph Chen int ret;
459ea479996SJoseph Chen
460ea479996SJoseph Chen /* set direction */
461ea479996SJoseph Chen if (!pci->pin_cfg[offset].dir_msk)
462ea479996SJoseph Chen return 0;
463ea479996SJoseph Chen
464ea479996SJoseph Chen ret = regmap_update_bits(pci->rk808->regmap,
465ea479996SJoseph Chen pci->pin_cfg[offset].reg,
466ea479996SJoseph Chen pci->pin_cfg[offset].dir_msk,
467ea479996SJoseph Chen input ? 0 : pci->pin_cfg[offset].dir_msk);
468ea479996SJoseph Chen if (ret) {
469ea479996SJoseph Chen dev_err(pci->dev, "set gpio%d direction failed\n", offset);
470ea479996SJoseph Chen return ret;
471ea479996SJoseph Chen }
472ea479996SJoseph Chen
473ea479996SJoseph Chen return ret;
474ea479996SJoseph Chen }
475ea479996SJoseph Chen
476ea479996SJoseph Chen static const struct pinmux_ops rk805_pinmux_ops = {
477ea479996SJoseph Chen .get_functions_count = rk805_pinctrl_get_funcs_count,
478ea479996SJoseph Chen .get_function_name = rk805_pinctrl_get_func_name,
479ea479996SJoseph Chen .get_function_groups = rk805_pinctrl_get_func_groups,
480ea479996SJoseph Chen .set_mux = rk805_pinctrl_set_mux,
481*924764aaSSebastian Reichel .gpio_request_enable = rk805_pinctrl_gpio_request_enable,
482ea479996SJoseph Chen .gpio_set_direction = rk805_pmx_gpio_set_direction,
483ea479996SJoseph Chen };
484ea479996SJoseph Chen
rk805_pinconf_get(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * config)485ea479996SJoseph Chen static int rk805_pinconf_get(struct pinctrl_dev *pctldev,
486ea479996SJoseph Chen unsigned int pin, unsigned long *config)
487ea479996SJoseph Chen {
488ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
489ea479996SJoseph Chen enum pin_config_param param = pinconf_to_config_param(*config);
490ea479996SJoseph Chen u32 arg = 0;
491ea479996SJoseph Chen
492ea479996SJoseph Chen switch (param) {
493ea479996SJoseph Chen case PIN_CONFIG_OUTPUT:
494*924764aaSSebastian Reichel case PIN_CONFIG_INPUT_ENABLE:
495ea479996SJoseph Chen arg = rk805_gpio_get(&pci->gpio_chip, pin);
496ea479996SJoseph Chen break;
497ea479996SJoseph Chen default:
498ea479996SJoseph Chen dev_err(pci->dev, "Properties not supported\n");
499ea479996SJoseph Chen return -ENOTSUPP;
500ea479996SJoseph Chen }
501ea479996SJoseph Chen
502ea479996SJoseph Chen *config = pinconf_to_config_packed(param, (u16)arg);
503ea479996SJoseph Chen
504ea479996SJoseph Chen return 0;
505ea479996SJoseph Chen }
506ea479996SJoseph Chen
rk805_pinconf_set(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * configs,unsigned int num_configs)507ea479996SJoseph Chen static int rk805_pinconf_set(struct pinctrl_dev *pctldev,
508ea479996SJoseph Chen unsigned int pin, unsigned long *configs,
509ea479996SJoseph Chen unsigned int num_configs)
510ea479996SJoseph Chen {
511ea479996SJoseph Chen struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
512ea479996SJoseph Chen enum pin_config_param param;
513ea479996SJoseph Chen u32 i, arg = 0;
514ea479996SJoseph Chen
515ea479996SJoseph Chen for (i = 0; i < num_configs; i++) {
516ea479996SJoseph Chen param = pinconf_to_config_param(configs[i]);
517ea479996SJoseph Chen arg = pinconf_to_config_argument(configs[i]);
518ea479996SJoseph Chen
519ea479996SJoseph Chen switch (param) {
520ea479996SJoseph Chen case PIN_CONFIG_OUTPUT:
521ea479996SJoseph Chen rk805_gpio_set(&pci->gpio_chip, pin, arg);
522ea479996SJoseph Chen rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false);
523ea479996SJoseph Chen break;
524*924764aaSSebastian Reichel case PIN_CONFIG_INPUT_ENABLE:
525*924764aaSSebastian Reichel if (pci->rk808->variant != RK805_ID && arg) {
526*924764aaSSebastian Reichel rk805_pmx_gpio_set_direction(pctldev, NULL, pin, true);
527*924764aaSSebastian Reichel break;
528*924764aaSSebastian Reichel }
529*924764aaSSebastian Reichel fallthrough;
530ea479996SJoseph Chen default:
531ea479996SJoseph Chen dev_err(pci->dev, "Properties not supported\n");
532ea479996SJoseph Chen return -ENOTSUPP;
533ea479996SJoseph Chen }
534ea479996SJoseph Chen }
535ea479996SJoseph Chen
536ea479996SJoseph Chen return 0;
537ea479996SJoseph Chen }
538ea479996SJoseph Chen
539ea479996SJoseph Chen static const struct pinconf_ops rk805_pinconf_ops = {
540ea479996SJoseph Chen .pin_config_get = rk805_pinconf_get,
541ea479996SJoseph Chen .pin_config_set = rk805_pinconf_set,
542ea479996SJoseph Chen };
543ea479996SJoseph Chen
5446e28aaabSNishka Dasgupta static const struct pinctrl_desc rk805_pinctrl_desc = {
545ea479996SJoseph Chen .name = "rk805-pinctrl",
546ea479996SJoseph Chen .pctlops = &rk805_pinctrl_ops,
547ea479996SJoseph Chen .pmxops = &rk805_pinmux_ops,
548ea479996SJoseph Chen .confops = &rk805_pinconf_ops,
549ea479996SJoseph Chen .owner = THIS_MODULE,
550ea479996SJoseph Chen };
551ea479996SJoseph Chen
rk805_pinctrl_probe(struct platform_device * pdev)552ea479996SJoseph Chen static int rk805_pinctrl_probe(struct platform_device *pdev)
553ea479996SJoseph Chen {
554ea479996SJoseph Chen struct rk805_pctrl_info *pci;
555ea479996SJoseph Chen int ret;
556ea479996SJoseph Chen
557ce852837SAndy Shevchenko device_set_node(&pdev->dev, dev_fwnode(pdev->dev.parent));
558ce852837SAndy Shevchenko
559ea479996SJoseph Chen pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);
560ea479996SJoseph Chen if (!pci)
561ea479996SJoseph Chen return -ENOMEM;
562ea479996SJoseph Chen
563ea479996SJoseph Chen pci->dev = &pdev->dev;
564ea479996SJoseph Chen pci->rk808 = dev_get_drvdata(pdev->dev.parent);
565ea479996SJoseph Chen
566ea479996SJoseph Chen pci->pinctrl_desc = rk805_pinctrl_desc;
567ea479996SJoseph Chen pci->gpio_chip = rk805_gpio_chip;
568ea479996SJoseph Chen pci->gpio_chip.parent = &pdev->dev;
569ea479996SJoseph Chen
570ea479996SJoseph Chen platform_set_drvdata(pdev, pci);
571ea479996SJoseph Chen
572ea479996SJoseph Chen switch (pci->rk808->variant) {
573ea479996SJoseph Chen case RK805_ID:
574ea479996SJoseph Chen pci->pins = rk805_pins_desc;
575ea479996SJoseph Chen pci->num_pins = ARRAY_SIZE(rk805_pins_desc);
576ea479996SJoseph Chen pci->functions = rk805_pin_functions;
577ea479996SJoseph Chen pci->num_functions = ARRAY_SIZE(rk805_pin_functions);
578ea479996SJoseph Chen pci->groups = rk805_pin_groups;
579ea479996SJoseph Chen pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups);
580ea479996SJoseph Chen pci->pinctrl_desc.pins = rk805_pins_desc;
581ea479996SJoseph Chen pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc);
582ea479996SJoseph Chen pci->pin_cfg = rk805_gpio_cfgs;
583ea479996SJoseph Chen pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs);
584ea479996SJoseph Chen break;
585*924764aaSSebastian Reichel case RK806_ID:
586*924764aaSSebastian Reichel pci->pins = rk806_pins_desc;
587*924764aaSSebastian Reichel pci->num_pins = ARRAY_SIZE(rk806_pins_desc);
588*924764aaSSebastian Reichel pci->functions = rk806_pin_functions;
589*924764aaSSebastian Reichel pci->num_functions = ARRAY_SIZE(rk806_pin_functions);
590*924764aaSSebastian Reichel pci->groups = rk806_pin_groups;
591*924764aaSSebastian Reichel pci->num_pin_groups = ARRAY_SIZE(rk806_pin_groups);
592*924764aaSSebastian Reichel pci->pinctrl_desc.pins = rk806_pins_desc;
593*924764aaSSebastian Reichel pci->pinctrl_desc.npins = ARRAY_SIZE(rk806_pins_desc);
594*924764aaSSebastian Reichel pci->pin_cfg = rk806_gpio_cfgs;
595*924764aaSSebastian Reichel pci->gpio_chip.ngpio = ARRAY_SIZE(rk806_gpio_cfgs);
596*924764aaSSebastian Reichel break;
597ea479996SJoseph Chen default:
598ea479996SJoseph Chen dev_err(&pdev->dev, "unsupported RK805 ID %lu\n",
599ea479996SJoseph Chen pci->rk808->variant);
600ea479996SJoseph Chen return -EINVAL;
601ea479996SJoseph Chen }
602ea479996SJoseph Chen
603ea479996SJoseph Chen /* Add gpio chip */
604ea479996SJoseph Chen ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci);
605ea479996SJoseph Chen if (ret < 0) {
606ea479996SJoseph Chen dev_err(&pdev->dev, "Couldn't add gpiochip\n");
607ea479996SJoseph Chen return ret;
608ea479996SJoseph Chen }
609ea479996SJoseph Chen
610ea479996SJoseph Chen /* Add pinctrl */
611ea479996SJoseph Chen pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci);
612ea479996SJoseph Chen if (IS_ERR(pci->pctl)) {
613ea479996SJoseph Chen dev_err(&pdev->dev, "Couldn't add pinctrl\n");
614ea479996SJoseph Chen return PTR_ERR(pci->pctl);
615ea479996SJoseph Chen }
616ea479996SJoseph Chen
617ea479996SJoseph Chen /* Add pin range */
618ea479996SJoseph Chen ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev),
619ea479996SJoseph Chen 0, 0, pci->gpio_chip.ngpio);
620ea479996SJoseph Chen if (ret < 0) {
621ea479996SJoseph Chen dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n");
622ea479996SJoseph Chen return ret;
623ea479996SJoseph Chen }
624ea479996SJoseph Chen
625ea479996SJoseph Chen return 0;
626ea479996SJoseph Chen }
627ea479996SJoseph Chen
628ea479996SJoseph Chen static struct platform_driver rk805_pinctrl_driver = {
629ea479996SJoseph Chen .probe = rk805_pinctrl_probe,
630ea479996SJoseph Chen .driver = {
631ea479996SJoseph Chen .name = "rk805-pinctrl",
632ea479996SJoseph Chen },
633ea479996SJoseph Chen };
634ea479996SJoseph Chen module_platform_driver(rk805_pinctrl_driver);
635ea479996SJoseph Chen
636ea479996SJoseph Chen MODULE_DESCRIPTION("RK805 pin control and GPIO driver");
637*924764aaSSebastian Reichel MODULE_AUTHOR("Xu Shengfei <xsf@rock-chips.com>");
638ea479996SJoseph Chen MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>");
639ea479996SJoseph Chen MODULE_LICENSE("GPL v2");
640