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/openbmc/linux/Documentation/admin-guide/pm/
H A Dintel_pstate.rst1 .. SPDX-License-Identifier: GPL-2.0
22 Documentation/admin-guide/pm/cpufreq.rst if you have not done that yet.]
24 For the processors supported by ``intel_pstate``, the P-state concept is broader
27 information about that). For this reason, the representation of P-states used
32 ``intel_pstate`` maps its internal representation of P-states to frequencies too
38 Since the hardware P-state selection interface used by ``intel_pstate`` is
43 time the corresponding CPU is taken offline and need to be re-initialized when
47 only way to pass early-configuration-time parameters to it is via the kernel
66 -----------
69 hardware-managed P-states (HWP) support. If it works in this mode, the
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H A Dcpufreq.rst1 .. SPDX-License-Identifier: GPL-2.0
20 Operating Performance Points or P-states (in ACPI terminology). As a rule,
24 time (or the more power is drawn) by the CPU in the given P-state. Therefore
29 as possible and then there is no reason to use any P-states different from the
30 highest one (i.e. the highest-performance frequency/voltage configuration
38 put into different P-states.
41 capacity, so as to decide which P-states to put the CPUs into. Of course, since
64 information on the available P-states (or P-state ranges in some cases) and
65 access platform-specific hardware interfaces to change CPU P-states as requested
70 performance scaling algorithms for P-state selection can be represented in a
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/openbmc/linux/drivers/cpufreq/
H A Dia64-acpi-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This file provides the ACPI based P-state support. This
6 * (arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c)
28 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
59 return -ENODEV; in processor_set_pstate()
86 /* To be used only after data->acpi_data is initialized */
96 for (i = 0; i < data->acpi_data.state_count; i++) { in extract_clock()
97 if (value == data->acpi_data.states[i].status) in extract_clock()
98 return data->acpi_data.states[i].core_frequency; in extract_clock()
100 return data->acpi_data.states[i-1].core_frequency; in extract_clock()
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H A Dacpi-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * acpi-cpufreq.c - ACPI Processor P-States Driver
7 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
39 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
69 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu); in to_perf_data()
115 return -EINVAL; in boost_set_msr()
138 on_each_cpu_mask(policy->cpus, boost_set_msr_each, in set_boost()
141 cpumask_pr_args(policy->cpus), str_enabled_disabled(val)); in set_boost()
148 struct acpi_cpufreq_data *data = policy->driver_data; in show_freqdomain_cpus()
151 return -ENODEV; in show_freqdomain_cpus()
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H A Dpowernow-k8.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * (c) 2003-2006 Advanced Micro Devices, Inc.
9 u32 numps; /* number of p-states */
10 u32 batps; /* number of p-states supported on battery */
13 * vid/fid pairings, but are modified during the ->target() call
32 * used to determine valid frequency/vid/fid states */
36 * handle hotplug events - so just point at cpufreq pol->cpus
53 /* Model Specific Registers for p-state transitions. MSRs are 64-bit. For */
54 /* writes (wrmsr - opcode 0f 30), the register number is placed in ecx, and */
55 /* the value to write is placed in edx:eax. For reads (rdmsr - opcode 0f 32), */
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/openbmc/linux/tools/power/x86/x86_energy_perf_policy/
H A Dx86_energy_perf_policy.81 .\" This page Copyright (C) 2010 - 2015 Len Brown <len.brown@intel.com>
5 x86_energy_perf_policy \- Manage Energy vs. Performance Policy via x86 Model Specific Registers
10 .RB "scope: \-\-cpu\ cpu-list | \-\-pkg\ pkg-list"
12 .RB "cpu-list, pkg-list: # | #,# | #-# | all"
14 .RB "field: \-\-all | \-\-epb | \-\-hwp-epp | \-\-hwp-min | \-\-hwp-max | \-\-hwp-desired"
16 .RB "other: (\-\-force | \-\-hwp-enable | \-\-turbo-enable) value)"
18 .RB "value: # | default | performance | balance-performance | balance-power | power"
21 displays and updates energy-performance policy settings specific to
23 updates, no matter if the Linux cpufreq sub-system is enabled or not.
27 such as how aggressively the hardware enters and exits CPU idle states (C-states)
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/openbmc/linux/drivers/firmware/arm_scmi/
H A Dpowercap.c1 // SPDX-License-Identifier: GPL-2.0
8 #define pr_fmt(fmt) "SCMI Notifications POWERCAP - " fmt
115 #define THRESH_LOW(p, id) \ argument
116 (lower_32_bits((p)->states[(id)].thresholds))
117 #define THRESH_HIGH(p, id) \ argument
118 (upper_32_bits((p)->states[(id)].thresholds))
124 struct scmi_powercap_state *states; member
143 ret = ph->xops->xfer_get_init(ph, PROTOCOL_ATTRIBUTES, 0, in scmi_powercap_attributes_get()
148 ret = ph->xops->do_xfer(ph, t); in scmi_powercap_attributes_get()
152 attributes = get_unaligned_le32(t->rx.buf); in scmi_powercap_attributes_get()
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/openbmc/linux/tools/power/cpupower/utils/helpers/
H A Damd.c1 // SPDX-License-Identifier: GPL-2.0
14 /* ACPI P-States Helper Functions for AMD Processors ***************/
101 * cpu -> the cpu that gets evaluated
102 * boost_states -> how much boost states the machines support
105 * pstates -> a pointer to an array of size MAX_HW_PSTATES
107 * All available HW pstates (including boost states)
108 * no -> amount of pstates above array got filled up with
110 * returns zero on success, -1 on failure
123 return -1; in decode_pstates()
126 return -1; in decode_pstates()
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/openbmc/linux/drivers/gpu/drm/omapdrm/
H A Domap_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
7 #include <linux/dma-mapping.h>
57 if (!new_crtc_state->active) in omap_atomic_wait_for_completion()
63 dev_warn(dev->dev, in omap_atomic_wait_for_completion()
70 struct drm_device *dev = old_state->dev; in omap_atomic_commit_tail()
71 struct omap_drm_private *priv = dev->dev_private; in omap_atomic_commit_tail()
73 dispc_runtime_get(priv->dispc); in omap_atomic_commit_tail()
78 if (priv->omaprev != 0x3430) { in omap_atomic_commit_tail()
98 * OMAP3 DSS seems to have issues with the work-around above, in omap_atomic_commit_tail()
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/openbmc/linux/tools/power/cpupower/man/
H A Dcpupower-set.11 .TH CPUPOWER\-SET "1" "22/02/2011" "" "cpupower Manual"
3 cpupower\-set \- Set processor power related kernel or hardware configurations
6 .B cpupower set [ \-b VAL ]
15 described in the cpupower(1) manpage in the \-\-cpu option section. Whether an
24 \-\-perf-bias, \-b
30 The range of valid numbers is 0-15, where 0 is maximum
33 The processor uses this information in model-specific ways
34 when it must select trade-offs between performance and
37 This policy hint does not supersede Processor Performance states
38 (P-states) or CPU Idle power states (C-states), but allows
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/openbmc/linux/drivers/xen/
H A Dxen-acpi-processor.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * https://lore.kernel.org/lkml/1322673664-14642-6-git-send-email-konrad.wilk@oracle.com
35 * - as those shrink to nr_cpu_bits (which is dependent on possible_cpu), which
40 /* Mutex to protect the acpi_ids_done - for CPU hotplug use. */
48 /* Which ACPI P-State dependencies for a enumerated processor */
56 .u.set_pminfo.id = _pr->acpi_id, in push_cxx_to_hypervisor()
64 dst_cx_states = kcalloc(_pr->power.count, in push_cxx_to_hypervisor()
67 return -ENOMEM; in push_cxx_to_hypervisor()
69 for (ok = 0, i = 1; i <= _pr->power.count; i++) { in push_cxx_to_hypervisor()
70 cx = &_pr->power.states[i]; in push_cxx_to_hypervisor()
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/openbmc/linux/arch/powerpc/include/asm/
H A D8xx_immap.h10 * functional files.....but anyone else is welcome to try. -- Dan
95 /*-----------------------------------------------------------------------
96 * BR - Memory Controller: Base Register 16-9
107 #define BR_MS_GPCM 0x00000000 /* G.P.C.M. Machine Select */
108 #define BR_MS_UPMA 0x00000080 /* U.P.M.A Machine Select */
109 #define BR_MS_UPMB 0x000000c0 /* U.P.M.B Machine Select */
112 /*-----------------------------------------------------------------------
113 * OR - Memory Controller: Option Register 16-11
127 #define OR_SCY_0_CLK 0x00000000 /* 0 clock cycles wait states */
128 #define OR_SCY_1_CLK 0x00000010 /* 1 clock cycles wait states */
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/openbmc/linux/Documentation/admin-guide/thermal/
H A Dintel_powerclamp.rst6 - Arjan van de Ven <arjan@linux.intel.com>
7 - Jacob Pan <jacob.jun.pan@linux.intel.com>
12 - Goals and Objectives
15 - Idle Injection
16 - Calibration
19 - Effectiveness and Limitations
20 - Power vs Performance
21 - Scalability
22 - Calibration
23 - Comparison with Alternative Techniques
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/openbmc/linux/drivers/acpi/
H A Dprocessor_idle.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * processor_idle - idle state submodule to the ACPI processor driver
9 * - Added processor hotplug support
11 * - Added support for C3 on SMP
31 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
78 pr_notice("%s detected - limiting to C%ld max_cstate." in set_max_cstate()
79 " Override with \"processor.max_cstate=%d\"\n", id->ident, in set_max_cstate()
80 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); in set_max_cstate()
82 max_cstate = (long)id->driver_data; in set_max_cstate()
93 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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H A Dprocessor_perflib.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * processor_perflib.c - ACPI Processor P-States Library ($Revision: 71 $)
9 * - Added processor hotplug support
40 * -1 -> cpufreq low level drivers not initialized -> _PSS, etc. not called yet
42 * 0 -> cpufreq low level drivers initialized -> consider _PPC values
43 * 1 -> ignore _PPC totally -> forced by user through boot param
45 static int ignore_ppc = -1;
61 return -EINVAL; in acpi_processor_get_platform_limit()
65 * (e.g. 0 = states 0..n; 1 = states 1..n; etc. in acpi_processor_get_platform_limit()
67 status = acpi_evaluate_integer(pr->handle, "_PPC", NULL, &ppc); in acpi_processor_get_platform_limit()
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/openbmc/linux/kernel/sched/
H A Dmembarrier.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2010-2017 Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
22 * CPU1 after the IPI-induced memory barrier:
29 * b: send IPI IPI-induced mb
46 * before the IPI-induced memory barrier on CPU1.
68 * b: send IPI IPI-induced mb
80 * after the IPI-induced memory barrier on CPU1.
82 * C) Scheduling userspace thread -> kthread -> userspace thread vs membarrier
89 * b: read rq->curr->mm == NULL
110 * e: current->mm = NULL
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/openbmc/linux/arch/mips/kernel/
H A Dpm-cps.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <asm/asm-offsets.h>
17 #include <asm/mips-cps.h>
20 #include <asm/pm-cps.h>
21 #include <asm/smp-cps.h>
25 * cps_nc_entry_fn - type of a generated non-coherent state entry function
27 * @nc_ready_count: pointer to a non-coherent mapping of the core ready_count
29 * The code entering & exiting non-coherent states is generated at runtime
32 * core-specific code particularly for cache routines. If coupled_coherence
33 * is non-zero and this is the entry function for the CPS_PM_NC_WAIT state,
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/openbmc/qemu/block/
H A Dcurl.c27 #include "qemu/error-report.h"
30 #include "block/block-io.h"
60 #define CURL_BLOCK_OPT_COOKIE_SECRET "cookie-secret"
62 #define CURL_BLOCK_OPT_PASSWORD_SECRET "password-secret"
63 #define CURL_BLOCK_OPT_PROXY_USERNAME "proxy-username"
64 #define CURL_BLOCK_OPT_PROXY_PASSWORD_SECRET "proxy-password-secret"
110 CURLState states[CURL_NUM_STATES]; member
111 GHashTable *sockets; /* GINT_TO_POINTER(fd) -> socket */
133 BDRVCURLState *s = socket->s; in curl_drop_socket()
135 aio_set_fd_handler(s->aio_context, socket->fd, in curl_drop_socket()
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/openbmc/linux/net/sunrpc/auth_gss/
H A Dgss_krb5_seal.c4 * Adapted from MIT Kerberos 5-1.2.1 lib/gssapi/krb5/k5seal.c
6 * Copyright (c) 2000-2008 The Regents of the University of Michigan.
40 * Export of this software from the United States of America may require
41 * a specific license from the United States Government. It is the
79 u8 *p, flags = 0x00; in setup_token_v2() local
81 if ((ctx->flags & KRB5_CTX_FLAG_INITIATOR) == 0) in setup_token_v2()
83 if (ctx->flags & KRB5_CTX_FLAG_ACCEPTOR_SUBKEY) in setup_token_v2()
89 krb5_hdr = (u16 *)token->data; in setup_token_v2()
93 p = (u8 *)ptr; in setup_token_v2()
94 *p++ = flags; in setup_token_v2()
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/openbmc/phosphor-host-ipmid/include/ipmid/
H A Dtypes.hpp66 * Pre-req conditions for a property.
104 uint8_t assertOffset0_7; //!< Discrete assertion states(0-7).
105 uint8_t assertOffset8_14; //!< Discrete assertion states(8-14).
116 uint8_t thresholdLevelsStates; // threshold/discrete sensor states
117 uint8_t discreteReadingSensorStates; // discrete-only, optional states
281 void deallocate(T* p, size_t n) in deallocate() argument
283 OPENSSL_cleanse(p, n); in deallocate()
284 return std::allocator<T>::deallocate(p, n); in deallocate()
303 OPENSSL_cleanse(this->data(), this->size()); in ~SecureString()
322 OPENSSL_cleanse(this->data(), this->size()); in ~SecureBuffer()
/openbmc/openbmc/meta-phosphor/recipes-phosphor/state/
H A Dphosphor-state-manager-systemd-links.inc2 multi-user.target.wants/obmc-host-reset@{}.target \
3 multi-user.target.wants/phosphor-discover-system-state@{}.service \
4 obmc-host-start@{}.target.requires/obmc-host-startmin@{}.target \
5 obmc-host-start@{}.target.requires/phosphor-reset-host-reboot-attempts@{}.service \
6 obmc-host-startmin@{}.target.wants/phosphor-set-host-transition-to-running@{}.service \
7 obmc-host-stop@{}.target.wants/phosphor-set-host-transition-to-off@{}.service \
8 obmc-host-reset@{}.target.requires/phosphor-reset-host-running@{}.service \
9 obmc-host-stop@{}.target.wants/phosphor-reset-sensor-states@{}.service \
10 obmc-host-shutdown@{}.target.requires/obmc-host-stop@{}.target \
11 obmc-host-graceful-quiesce@{}.target.wants/obmc-host-quiesce@{}.target \
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/openbmc/linux/drivers/i2c/muxes/
H A Di2c-demux-pinctrl.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2015-16 by Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
6 * Copyright (C) 2015-16 by Renesas Electronics Corporation
9 * (look for filenames containing 'i2c-demux-pinctrl' in Documentation/)
40 struct i2c_demux_pinctrl_priv *priv = adap->algo_data; in i2c_demux_master_xfer()
41 struct i2c_adapter *parent = priv->chan[priv->cur_chan].parent_adap; in i2c_demux_master_xfer()
48 struct i2c_demux_pinctrl_priv *priv = adap->algo_data; in i2c_demux_functionality()
49 struct i2c_adapter *parent = priv->chan[priv->cur_chan].parent_adap; in i2c_demux_functionality()
51 return parent->algo->functionality(parent); in i2c_demux_functionality()
57 struct pinctrl *p; in i2c_demux_activate_master() local
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/openbmc/linux/drivers/base/power/
H A Ddomain.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/base/power/domain.c - Common code related to device power domains.
35 __routine = genpd->dev_ops.callback; \
54 mutex_lock(&genpd->mlock); in genpd_lock_mtx()
60 mutex_lock_nested(&genpd->mlock, depth); in genpd_lock_nested_mtx()
65 return mutex_lock_interruptible(&genpd->mlock); in genpd_lock_interruptible_mtx()
70 return mutex_unlock(&genpd->mlock); in genpd_unlock_mtx()
81 __acquires(&genpd->slock) in genpd_lock_spin()
85 spin_lock_irqsave(&genpd->slock, flags); in genpd_lock_spin()
86 genpd->lock_flags = flags; in genpd_lock_spin()
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/openbmc/u-boot/arch/x86/include/asm/
H A Dspeedstep.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2007-2009 coresystems GmbH
67 processor is 14, the lowest is always 6. This makes 5 states with the
72 /* Table of p-states for EMTTM and ACPI by decreasing performance. */
73 struct sst_state states[SPEEDSTEP_MAX_STATES]; member
/openbmc/linux/Documentation/devicetree/bindings/cpufreq/
H A Dapple,cluster-cpufreq.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
13 Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of
15 operating-points-v2 table to define the CPU performance states, with the
16 opp-level property specifying the hardware p-state index for that level.
21 - items:
22 - enum:
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