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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dbcm-ns-usb2-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/bcm-ns-usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom Northstar USB 2.0 PHY
10 To initialize USB 2.0 PHY driver needs to setup PLL correctly.
11 To do this it requires passing phandle to the USB PHY reference clock.
14 - Rafał Miłecki <rafal@milecki.pl>
18 const: brcm,ns-usb2-phy
22 - maxItems: 1
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dbrcm,cru.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <rafal@milecki.pl>
15 clocks, pinctrl, USB PHY and thermal.
20 - enum:
21 - brcm,ns-cru
22 - const: simple-mfd
29 "#address-cells":
32 "#size-cells":
[all …]
/openbmc/linux/drivers/phy/broadcom/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PHY_BCM63XX_USBH) += phy-bcm63xx-usbh.o
3 obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o
4 obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
5 obj-$(CONFIG_PHY_BCM_NS_USB2) += phy-bcm-ns-usb2.o
6 obj-$(CONFIG_PHY_BCM_NS_USB3) += phy-bcm-ns-usb3.o
7 obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o
8 obj-$(CONFIG_PHY_NS2_USB_DRD) += phy-bcm-ns2-usbdrd.o
9 obj-$(CONFIG_PHY_BRCM_SATA) += phy-brcm-sata.o
10 obj-$(CONFIG_PHY_BRCM_USB) += phy-brcm-usb-dvr.o
[all …]
H A Dphy-bcm-ns-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Broadcom Northstar USB 2.0 PHY Driver
16 #include <linux/phy/phy.h>
24 struct phy *phy; member
32 static int bcm_ns_usb2_phy_init(struct phy *phy) in bcm_ns_usb2_phy_init() argument
34 struct bcm_ns_usb2 *usb2 = phy_get_drvdata(phy); in bcm_ns_usb2_phy_init() local
35 struct device *dev = usb2->dev; in bcm_ns_usb2_phy_init()
39 err = clk_prepare_enable(usb2->ref_clk); in bcm_ns_usb2_phy_init()
45 ref_clk_rate = clk_get_rate(usb2->ref_clk); in bcm_ns_usb2_phy_init()
48 err = -EINVAL; in bcm_ns_usb2_phy_init()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dhisilicon,histb-xhci.txt6 - compatible: should be "hisilicon,hi3798cv200-xhci"
7 - reg: specifies physical base address and size of the registers
8 - interrupts : interrupt used by the controller
9 - clocks: a list of phandle + clock-specifier pairs, one for each
10 entry in clock-names
11 - clock-names: must contain
16 - resets: a list of phandle and reset specifier pairs as listed in
17 reset-names property.
18 - reset-names: must contain
20 - phys: a list of phandle + phy specifier pairs
[all …]
H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
[all …]
H A Dsnps,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 be presented as a standalone DT node with an optional vendor-specific
18 - $ref: usb-drd.yaml#
19 - if:
25 - dr_mode
29 $ref: usb-xhci.yaml#
35 - const: snps,dwc3
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dstm32mp157c-ev1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
8 #include "stm32mp157c-ed1.dts"
12 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
17 pinctrl-names = "default";
18 pinctrl-0 = <&cec_pins_a>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&i2c2_pins_a>;
25 i2c-scl-rising-time-ns = <185>;
[all …]
H A Dstih410.dtsi9 #include "stih410-clock.dtsi"
10 #include "stih407-family.dtsi"
11 #include "stih410-pinctrl.dtsi"
20 st,syscfg-eng = <&syscfg_opp 0x4 0x0>;
22 operating-points-v2 = <&cpu0_opp_table>;
26 operating-points-v2 = <&cpu0_opp_table>;
31 compatible = "operating-points-v2";
32 opp-shared;
35 opp-supported-hw = <0xffffffff 0xffffffff 0xffffffff>;
36 opp-hz = /bits/ 64 <1500000000>;
[all …]
H A Domap3-igep.dtsi11 /dts-v1/;
22 stdout-path = &uart3;
26 compatible = "ti,omap-twl4030";
31 vdd33: regulator-vdd33 {
32 compatible = "regulator-fixed";
33 regulator-name = "vdd33";
34 regulator-always-on;
41 pinctrl-single,pins = <
48 pinctrl-single,pins = <
55 pinctrl-single,pins = <
[all …]
H A Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
14 compatible = "socionext,uniphier-ld11";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <0>;
23 cpu-map {
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcom-picoitx.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/pwm/pwm.h>
17 stdout-path = "serial0:115200n8";
21 compatible = "gpio-leds";
23 led-0 {
26 default-state = "off";
50 usb-port-power-hog {
51 gpio-hog;
53 output-low;
[all …]
H A Dstm32mp15xx-dhcor-testbench.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
17 stdout-path = "serial0:115200n8";
20 sd_switch: regulator-sd_switch {
21 compatible = "regulator-gpio";
22 regulator-name = "sd_switch";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <2900000>;
25 regulator-type = "voltage";
26 regulator-always-on;
29 gpios-states = <0>;
[all …]
H A Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
[all …]
H A Dstm32h743i-eval.dts2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32h7-pinctrl.dtsi"
48 model = "STMicroelectronics STM32H743i-EVAL board";
49 compatible = "st,stm32h743i-eval", "st,stm32h743";
53 stdout-path = "serial0:115200n8";
65 vdda: regulator-vdda {
66 compatible = "regulator-fixed";
67 regulator-name = "vdda";
[all …]
H A Dstm32f769-disco.dts2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f769-pinctrl.dtsi"
46 #include <dt-bindings/input/input.h>
47 #include <dt-bindings/gpio/gpio.h>
50 model = "STMicroelectronics STM32F769-DISCO board";
51 compatible = "st,stm32f769-disco", "st,stm32f769";
55 stdout-path = "serial0:115200n8";
68 compatible = "gpio-leds";
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos54xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
28 arm_a7_pmu: arm-a7-pmu {
29 compatible = "arm,cortex-a7-pmu";
30 interrupt-parent = <&gic>;
38 arm_a15_pmu: arm-a15-pmu {
39 compatible = "arm,cortex-a15-pmu";
40 interrupt-parent = <&combiner>;
49 compatible = "arm,armv7-timer";
54 clock-frequency = <24000000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-ns.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
6 #include <dt-bindings/clock/bcm-nsp.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-overo-base.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
17 led-controller {
18 compatible = "pwm-leds";
20 led-1 {
23 max-brightness = <127>;
24 linux,default-trigger = "mmc0";
29 compatible = "ti,omap-twl4030";
37 compatible = "regulator-fixed";
38 regulator-name = "hsusb2_vbus";
39 regulator-min-microvolt = <5000000>;
[all …]
H A Domap3-igep.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 /dts-v1/;
19 stdout-path = &uart3;
23 compatible = "ti,omap-twl4030";
28 vdd33: regulator-vdd33 {
29 compatible = "regulator-fixed";
30 regulator-name = "vdd33";
31 regulator-always-on;
37 gpmc_pins: gpmc-pins {
38 pinctrl-single,pins = <
[all …]
H A Domap3-tao3530.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
26 cpu0-supply = <&vcc>;
37 compatible = "regulator-fixed";
38 regulator-name = "hsusb2_vbus";
39 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>;
42 startup-delay-us = <70000>;
45 /* HS USB Host PHY on PORT 2 */
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 interrupt-parent = <&intc>;
20 reserved-memory {
21 #address-cells = <0x1>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/socionext/
H A Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 compatible = "socionext,uniphier-ld11";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&intc>;
19 sleep_clk: sleep-clk {
20 compatible = "fixed-clock";
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
13 usb2 = &usbh;
18 clock-frequency = <996000000>;
19 operating-points-v2 = <&cpu0_opp_table>;
20 #cooling-cells = <2>;
21 nvmem-cells = <&fuse_grade>;
22 nvmem-cell-names = "speed_grade";
26 compatible = "arm,cortex-a7";
29 clock-frequency = <996000000>;
[all …]

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