arm64: dts: uniphier: Add syscon compatible string to soc-glue-debug

Add "syscon" compatible string to the nodes for soc-glue-debug
according to the DT schema.

Signed-off-by: Kunihiko Hayashi <haya

arm64: dts: uniphier: Add syscon compatible string to soc-glue-debug

Add "syscon" compatible string to the nodes for soc-glue-debug
according to the DT schema.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20230207023514.29783-8-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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arm64: dts: uniphier: Add missing reg properties for glue layer nodes

The nodes for some glue layers don't include necessary reg properties.
Add the properties according to the DT schema.

Signed-of

arm64: dts: uniphier: Add missing reg properties for glue layer nodes

The nodes for some glue layers don't include necessary reg properties.
Add the properties according to the DT schema.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20230207023514.29783-7-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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arm64: dts: uniphier: Align node names for SoC-dependent controller and PHYs with bindings

The node names for SoC-dependent controllers and PHYs should be
generic ones according to the DT schemas.

arm64: dts: uniphier: Align node names for SoC-dependent controller and PHYs with bindings

The node names for SoC-dependent controllers and PHYs should be
generic ones according to the DT schemas.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20230207023514.29783-6-hayashi.kunihiko@socionext.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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arm64: dts: uniphier: Add L2 cache node

Add a L2 cache node referenced from CPU nodes as the missing cache hierarchy
information because the following warning was issued.

cacheinfo: Unable to det

arm64: dts: uniphier: Add L2 cache node

Add a L2 cache node referenced from CPU nodes as the missing cache hierarchy
information because the following warning was issued.

cacheinfo: Unable to detect cache hierarchy for CPU 0
Early cacheinfo failed, ret = -2

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-11-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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arm64: dts: uniphier: Use GIC interrupt definitions

Use human-readable definitions for GIC interrupt type and flag, instead of
hard-coding the numbers. No functional change.

Signed-off-by: Kunihiko

arm64: dts: uniphier: Use GIC interrupt definitions

Use human-readable definitions for GIC interrupt type and flag, instead of
hard-coding the numbers. No functional change.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-6-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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arm64: dts: uniphier: Rename usb-phy node for USB2 to usb-controller

Actual phy nodes are each child node. The parent node should be
usb-controller node as a representation of the phy integration.
T

arm64: dts: uniphier: Rename usb-phy node for USB2 to usb-controller

Actual phy nodes are each child node. The parent node should be
usb-controller node as a representation of the phy integration.
This applies to the devicetree for LD11 SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042321.4817-3-hayashi.kunihiko@socionext.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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arm64: dts: uniphier: add #address-cells and #size-cells to SPI nodes

Documentation/devicetree/bindings/spi/spi-uniphier.txt requires
#address-cells and #size-cells, but they are missing in actual D

arm64: dts: uniphier: add #address-cells and #size-cells to SPI nodes

Documentation/devicetree/bindings/spi/spi-uniphier.txt requires
#address-cells and #size-cells, but they are missing in actual DT files.

Also, 'make ARCH=arm64 dtbs_check' is really noisy.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: Add XDMAC node

Add external DMA controller support implemented in UniPhier SoCs.
This supports for LD11, LD20 and PXs3.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socio

arm64: dts: uniphier: Add XDMAC node

Add external DMA controller support implemented in UniPhier SoCs.
This supports for LD11, LD20 and PXs3.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel

Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.

Fixes: 925c5c3

arm64: dts: uniphier: Set SCSSI clock and reset IDs for each channel

Currently common clock and reset IDs were used, however, each clock and
reset ID should be used for each channel.

Fixes: 925c5c32f31d ("arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: rename NAND node names to follow json-schema

Follow the standard nodename pattern "^nand-controller(@.*)?" defined
in Documentation/devicetree/bindings/mtd/nand-controller.yaml

arm64: dts: uniphier: rename NAND node names to follow json-schema

Follow the standard nodename pattern "^nand-controller(@.*)?" defined
in Documentation/devicetree/bindings/mtd/nand-controller.yaml

Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm64 dtbs_check' will show warnings like this:

nand@68000000: $nodename:0: 'nand@68000000' does not match '^nand-controller(@.*)?'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: rename aidet node names to follow json-schema

Follow the standard nodename pattern "^interrupt-controller(@[0-9a-f,]+)*$"
defined in schemas/interrupt-controller.yaml of dt-sch

arm64: dts: uniphier: rename aidet node names to follow json-schema

Follow the standard nodename pattern "^interrupt-controller(@[0-9a-f,]+)*$"
defined in schemas/interrupt-controller.yaml of dt-schema.

Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm64 dtbs_check' will show warnings like this:

aidet@5fc20000: $nodename:0: 'aidet@5fc20000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: change SD/eMMC node names to follow json-schema

Follow the standard nodename pattern "^mmc(@.*)?$" defined in
Documentation/devicetree/bindings/mmc/mmc-controller.yaml

Otherwi

arm64: dts: uniphier: change SD/eMMC node names to follow json-schema

Follow the standard nodename pattern "^mmc(@.*)?$" defined in
Documentation/devicetree/bindings/mmc/mmc-controller.yaml

Otherwise, after the dt-binding is converted to json-schema,
'make ARCH=arm64 dtbs_check' will show warnings like this:

sdhc@5a000000: $nodename:0: 'sdhc@5a000000' does not match '^mmc(@.*)?$'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add reset-names to NAND controller node

The Denali NAND controller IP has separate reset control for the
controller core and registers.

Add the reset-names, and one more phand

arm64: dts: uniphier: add reset-names to NAND controller node

The Denali NAND controller IP has separate reset control for the
controller core and registers.

Add the reset-names, and one more phandle accordingly. This is the
approved DT-binding.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add reserved-memory for secure memory

The memory regions specified by /memreserve/ are passed to
early_init_dt_reserve_memory_arch() with nomap=false, so it is
not suitable for

arm64: dts: uniphier: add reserved-memory for secure memory

The memory regions specified by /memreserve/ are passed to
early_init_dt_reserve_memory_arch() with nomap=false, so it is
not suitable for reserving memory for Trusted Firmware-A etc.

Use the more robust /reserved-memory node with the no-map property
to prevent the kernel from mapping it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: update to new Denali NAND binding

With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new c

arm64: dts: uniphier: update to new Denali NAND binding

With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.

Update DT for it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string

The 'arm,armv8' compatible string is only for software models. It adds
little value otherwise and is inconsistently used as a fal

arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string

The 'arm,armv8' compatible string is only for software models. It adds
little value otherwise and is inconsistently used as a fallback on some
platforms. Remove it from those platforms.

This fixes warnings generated by the DT schema.

Reported-by: Michal Simek <michal.simek@xilinx.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Chanho Min <chanho.min@lge.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Acked-by: Robert Richter <rrichter@cavium.com>
Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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arm64: dts: uniphier: Add USB2 PHY nodes

Add nodes of USB2 physical layer for UniPhier SoC. This supports LD11.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masah

arm64: dts: uniphier: Add USB2 PHY nodes

Add nodes of USB2 physical layer for UniPhier SoC. This supports LD11.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3

Add nodes of SPI controller for UniPhier SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Ya

arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3

Add nodes of SPI controller for UniPhier SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: uniphier: dts: add more clocks to Denali NAND controller node

Catch up with the new binding of the Denali IP where three clocks,
"nand", "nand_x", "ecc" are required.

For UniPhier SoCs, the

arm64: uniphier: dts: add more clocks to Denali NAND controller node

Catch up with the new binding of the Denali IP where three clocks,
"nand", "nand_x", "ecc" are required.

For UniPhier SoCs, the "nand_x" and "ecc" are tied up because they
are both 200MHz.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: fix input delay value for legacy mode of eMMC

The property of the legacy mode for the eMMC PHY turned out to
be wrong. Some eMMC devices are unstable due to the set-up/hold
ti

arm64: dts: uniphier: fix input delay value for legacy mode of eMMC

The property of the legacy mode for the eMMC PHY turned out to
be wrong. Some eMMC devices are unstable due to the set-up/hold
timing violation. Correct the delay value.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add syscon-phy-mode property to each ethernet node

Add syscon-phy-mode property specifying a phandle of system controller
to each ethernet node.

In addition, LD11 SoC has a bu

arm64: dts: uniphier: add syscon-phy-mode property to each ethernet node

Add syscon-phy-mode property specifying a phandle of system controller
to each ethernet node.

In addition, LD11 SoC has a built-in ethernet PHY. When we set "internal"
to phy-mode property, this built-in PHY is available.
This patch changes phy-mode property for LD11 to "internal", as default.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add clock-names and reset-names to ethernet node

Add clock-names and reset-names because this node recognizes multiple
clocks and resets. ("ether", and so on, for each)

Sugge

arm64: dts: uniphier: add clock-names and reset-names to ethernet node

Add clock-names and reset-names because this node recognizes multiple
clocks and resets. ("ether", and so on, for each)

Suggested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add syscon property for UniPhier sound system

This patch adds syscon property for specifying soc-glue core into
device-tree of LD11/LD20 SoC.

Currently, soc-glue core is used

arm64: dts: uniphier: add syscon property for UniPhier sound system

This patch adds syscon property for specifying soc-glue core into
device-tree of LD11/LD20 SoC.

Currently, soc-glue core is used for changing the state of S/PDIF
signal output pin to signal output state or Hi-Z state.

Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: use proper SPDX-License-Identifier style

According to Documentation/process/license-rules.rst, move the SPDX
License Identifier to the very top of the file. I used C++ comment

arm64: dts: uniphier: use proper SPDX-License-Identifier style

According to Documentation/process/license-rules.rst, move the SPDX
License Identifier to the very top of the file. I used C++ comment
style not only for the SPDX line but for the entire block because
this seems Linus' preference [1]. I also dropped the parentheses to
follow the examples in that document.

[1] https://lkml.org/lkml/2017/11/25/133

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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arm64: dts: uniphier: add AVE ethernet node

Add nodes of the AVE ethernet controller for LD11 and LD20 SoCs
and the boards.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-o

arm64: dts: uniphier: add AVE ethernet node

Add nodes of the AVE ethernet controller for LD11 and LD20 SoCs
and the boards.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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