xref: /openbmc/u-boot/arch/arm/dts/omap3-igep.dtsi (revision 77c07e7e)
1*8fd8f2e4SEnric Balletbo i Serra/*
2*8fd8f2e4SEnric Balletbo i Serra * Common device tree for IGEP boards based on AM/DM37x
3*8fd8f2e4SEnric Balletbo i Serra *
4*8fd8f2e4SEnric Balletbo i Serra * Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
5*8fd8f2e4SEnric Balletbo i Serra * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
6*8fd8f2e4SEnric Balletbo i Serra *
7*8fd8f2e4SEnric Balletbo i Serra * This program is free software; you can redistribute it and/or modify
8*8fd8f2e4SEnric Balletbo i Serra * it under the terms of the GNU General Public License version 2 as
9*8fd8f2e4SEnric Balletbo i Serra * published by the Free Software Foundation.
10*8fd8f2e4SEnric Balletbo i Serra */
11*8fd8f2e4SEnric Balletbo i Serra/dts-v1/;
12*8fd8f2e4SEnric Balletbo i Serra
13*8fd8f2e4SEnric Balletbo i Serra#include "omap36xx.dtsi"
14*8fd8f2e4SEnric Balletbo i Serra
15*8fd8f2e4SEnric Balletbo i Serra/ {
16*8fd8f2e4SEnric Balletbo i Serra	memory@80000000 {
17*8fd8f2e4SEnric Balletbo i Serra		device_type = "memory";
18*8fd8f2e4SEnric Balletbo i Serra		reg = <0x80000000 0x20000000>; /* 512 MB */
19*8fd8f2e4SEnric Balletbo i Serra	};
20*8fd8f2e4SEnric Balletbo i Serra
21*8fd8f2e4SEnric Balletbo i Serra	chosen {
22*8fd8f2e4SEnric Balletbo i Serra		stdout-path = &uart3;
23*8fd8f2e4SEnric Balletbo i Serra	};
24*8fd8f2e4SEnric Balletbo i Serra
25*8fd8f2e4SEnric Balletbo i Serra	sound {
26*8fd8f2e4SEnric Balletbo i Serra		compatible = "ti,omap-twl4030";
27*8fd8f2e4SEnric Balletbo i Serra		ti,model = "igep2";
28*8fd8f2e4SEnric Balletbo i Serra		ti,mcbsp = <&mcbsp2>;
29*8fd8f2e4SEnric Balletbo i Serra	};
30*8fd8f2e4SEnric Balletbo i Serra
31*8fd8f2e4SEnric Balletbo i Serra	vdd33: regulator-vdd33 {
32*8fd8f2e4SEnric Balletbo i Serra		compatible = "regulator-fixed";
33*8fd8f2e4SEnric Balletbo i Serra		regulator-name = "vdd33";
34*8fd8f2e4SEnric Balletbo i Serra		regulator-always-on;
35*8fd8f2e4SEnric Balletbo i Serra	};
36*8fd8f2e4SEnric Balletbo i Serra
37*8fd8f2e4SEnric Balletbo i Serra};
38*8fd8f2e4SEnric Balletbo i Serra
39*8fd8f2e4SEnric Balletbo i Serra&omap3_pmx_core {
40*8fd8f2e4SEnric Balletbo i Serra	gpmc_pins: pinmux_gpmc_pins {
41*8fd8f2e4SEnric Balletbo i Serra		pinctrl-single,pins = <
42*8fd8f2e4SEnric Balletbo i Serra			/* OneNAND seems to require PIN_INPUT on clock. */
43*8fd8f2e4SEnric Balletbo i Serra                        OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
44*8fd8f2e4SEnric Balletbo i Serra		>;
45*8fd8f2e4SEnric Balletbo i Serra	};
46*8fd8f2e4SEnric Balletbo i Serra
47*8fd8f2e4SEnric Balletbo i Serra	uart1_pins: pinmux_uart1_pins {
48*8fd8f2e4SEnric Balletbo i Serra		pinctrl-single,pins = <
49*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)	/* uart1_rx.uart1_rx */
50*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)	/* uart1_tx.uart1_tx */
51*8fd8f2e4SEnric Balletbo i Serra		>;
52*8fd8f2e4SEnric Balletbo i Serra	};
53*8fd8f2e4SEnric Balletbo i Serra
54*8fd8f2e4SEnric Balletbo i Serra	uart3_pins: pinmux_uart3_pins {
55*8fd8f2e4SEnric Balletbo i Serra		pinctrl-single,pins = <
56*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)	/* uart3_rx.uart3_rx */
57*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx.uart3_tx */
58*8fd8f2e4SEnric Balletbo i Serra		>;
59*8fd8f2e4SEnric Balletbo i Serra	};
60*8fd8f2e4SEnric Balletbo i Serra
61*8fd8f2e4SEnric Balletbo i Serra	mcbsp2_pins: pinmux_mcbsp2_pins {
62*8fd8f2e4SEnric Balletbo i Serra		pinctrl-single,pins = <
63*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx.mcbsp2_fsx */
64*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)	/* mcbsp2_clkx.mcbsp2_clkx */
65*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)	/* mcbsp2_dr.mcbsp2.dr */
66*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)	/* mcbsp2_dx.mcbsp2_dx */
67*8fd8f2e4SEnric Balletbo i Serra		>;
68*8fd8f2e4SEnric Balletbo i Serra	};
69*8fd8f2e4SEnric Balletbo i Serra
70*8fd8f2e4SEnric Balletbo i Serra	mmc1_pins: pinmux_mmc1_pins {
71*8fd8f2e4SEnric Balletbo i Serra		pinctrl-single,pins = <
72*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
73*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
74*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
75*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
76*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
77*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
78*8fd8f2e4SEnric Balletbo i Serra		>;
79*8fd8f2e4SEnric Balletbo i Serra	};
80*8fd8f2e4SEnric Balletbo i Serra
81*8fd8f2e4SEnric Balletbo i Serra	mmc2_pins: pinmux_mmc2_pins {
82*8fd8f2e4SEnric Balletbo i Serra		pinctrl-single,pins = <
83*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
84*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
85*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
86*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
87*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
88*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
89*8fd8f2e4SEnric Balletbo i Serra		>;
90*8fd8f2e4SEnric Balletbo i Serra	};
91*8fd8f2e4SEnric Balletbo i Serra
92*8fd8f2e4SEnric Balletbo i Serra	i2c1_pins: pinmux_i2c1_pins {
93*8fd8f2e4SEnric Balletbo i Serra		pinctrl-single,pins = <
94*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)	/* i2c1_scl.i2c1_scl */
95*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)	/* i2c1_sda.i2c1_sda */
96*8fd8f2e4SEnric Balletbo i Serra		>;
97*8fd8f2e4SEnric Balletbo i Serra	};
98*8fd8f2e4SEnric Balletbo i Serra
99*8fd8f2e4SEnric Balletbo i Serra	i2c3_pins: pinmux_i2c3_pins {
100*8fd8f2e4SEnric Balletbo i Serra		pinctrl-single,pins = <
101*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)	/* i2c3_scl.i2c3_scl */
102*8fd8f2e4SEnric Balletbo i Serra			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)	/* i2c3_sda.i2c3_sda */
103*8fd8f2e4SEnric Balletbo i Serra		>;
104*8fd8f2e4SEnric Balletbo i Serra	};
105*8fd8f2e4SEnric Balletbo i Serra};
106*8fd8f2e4SEnric Balletbo i Serra
107*8fd8f2e4SEnric Balletbo i Serra&gpmc {
108*8fd8f2e4SEnric Balletbo i Serra	pinctrl-names = "default";
109*8fd8f2e4SEnric Balletbo i Serra	pinctrl-0 = <&gpmc_pins>;
110*8fd8f2e4SEnric Balletbo i Serra
111*8fd8f2e4SEnric Balletbo i Serra	nand@0,0 {
112*8fd8f2e4SEnric Balletbo i Serra		compatible = "ti,omap2-nand";
113*8fd8f2e4SEnric Balletbo i Serra		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
114*8fd8f2e4SEnric Balletbo i Serra		interrupt-parent = <&gpmc>;
115*8fd8f2e4SEnric Balletbo i Serra		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
116*8fd8f2e4SEnric Balletbo i Serra			     <1 IRQ_TYPE_NONE>;	/* termcount */
117*8fd8f2e4SEnric Balletbo i Serra		linux,mtd-name= "micron,mt29c4g96maz";
118*8fd8f2e4SEnric Balletbo i Serra		nand-bus-width = <16>;
119*8fd8f2e4SEnric Balletbo i Serra		gpmc,device-width = <2>;
120*8fd8f2e4SEnric Balletbo i Serra		ti,nand-ecc-opt = "bch8";
121*8fd8f2e4SEnric Balletbo i Serra
122*8fd8f2e4SEnric Balletbo i Serra		gpmc,sync-clk-ps = <0>;
123*8fd8f2e4SEnric Balletbo i Serra		gpmc,cs-on-ns = <0>;
124*8fd8f2e4SEnric Balletbo i Serra		gpmc,cs-rd-off-ns = <44>;
125*8fd8f2e4SEnric Balletbo i Serra		gpmc,cs-wr-off-ns = <44>;
126*8fd8f2e4SEnric Balletbo i Serra		gpmc,adv-on-ns = <6>;
127*8fd8f2e4SEnric Balletbo i Serra		gpmc,adv-rd-off-ns = <34>;
128*8fd8f2e4SEnric Balletbo i Serra		gpmc,adv-wr-off-ns = <44>;
129*8fd8f2e4SEnric Balletbo i Serra		gpmc,we-off-ns = <40>;
130*8fd8f2e4SEnric Balletbo i Serra		gpmc,oe-off-ns = <54>;
131*8fd8f2e4SEnric Balletbo i Serra		gpmc,access-ns = <64>;
132*8fd8f2e4SEnric Balletbo i Serra		gpmc,rd-cycle-ns = <82>;
133*8fd8f2e4SEnric Balletbo i Serra		gpmc,wr-cycle-ns = <82>;
134*8fd8f2e4SEnric Balletbo i Serra		gpmc,wr-access-ns = <40>;
135*8fd8f2e4SEnric Balletbo i Serra		gpmc,wr-data-mux-bus-ns = <0>;
136*8fd8f2e4SEnric Balletbo i Serra
137*8fd8f2e4SEnric Balletbo i Serra		#address-cells = <1>;
138*8fd8f2e4SEnric Balletbo i Serra		#size-cells = <1>;
139*8fd8f2e4SEnric Balletbo i Serra
140*8fd8f2e4SEnric Balletbo i Serra		status = "okay";
141*8fd8f2e4SEnric Balletbo i Serra	};
142*8fd8f2e4SEnric Balletbo i Serra
143*8fd8f2e4SEnric Balletbo i Serra	onenand@0,0 {
144*8fd8f2e4SEnric Balletbo i Serra		compatible = "ti,omap2-onenand";
145*8fd8f2e4SEnric Balletbo i Serra		reg = <0 0 0x20000>;	/* CS0, offset 0, IO size 128K */
146*8fd8f2e4SEnric Balletbo i Serra
147*8fd8f2e4SEnric Balletbo i Serra		gpmc,sync-read;
148*8fd8f2e4SEnric Balletbo i Serra		gpmc,sync-write;
149*8fd8f2e4SEnric Balletbo i Serra		gpmc,burst-length = <16>;
150*8fd8f2e4SEnric Balletbo i Serra		gpmc,burst-wrap;
151*8fd8f2e4SEnric Balletbo i Serra		gpmc,burst-read;
152*8fd8f2e4SEnric Balletbo i Serra		gpmc,burst-write;
153*8fd8f2e4SEnric Balletbo i Serra		gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
154*8fd8f2e4SEnric Balletbo i Serra		gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
155*8fd8f2e4SEnric Balletbo i Serra		gpmc,cs-on-ns = <0>;
156*8fd8f2e4SEnric Balletbo i Serra		gpmc,cs-rd-off-ns = <96>;
157*8fd8f2e4SEnric Balletbo i Serra		gpmc,cs-wr-off-ns = <96>;
158*8fd8f2e4SEnric Balletbo i Serra		gpmc,adv-on-ns = <0>;
159*8fd8f2e4SEnric Balletbo i Serra		gpmc,adv-rd-off-ns = <12>;
160*8fd8f2e4SEnric Balletbo i Serra		gpmc,adv-wr-off-ns = <12>;
161*8fd8f2e4SEnric Balletbo i Serra		gpmc,oe-on-ns = <18>;
162*8fd8f2e4SEnric Balletbo i Serra		gpmc,oe-off-ns = <96>;
163*8fd8f2e4SEnric Balletbo i Serra		gpmc,we-on-ns = <0>;
164*8fd8f2e4SEnric Balletbo i Serra		gpmc,we-off-ns = <96>;
165*8fd8f2e4SEnric Balletbo i Serra		gpmc,rd-cycle-ns = <114>;
166*8fd8f2e4SEnric Balletbo i Serra		gpmc,wr-cycle-ns = <114>;
167*8fd8f2e4SEnric Balletbo i Serra		gpmc,access-ns = <90>;
168*8fd8f2e4SEnric Balletbo i Serra		gpmc,page-burst-access-ns = <12>;
169*8fd8f2e4SEnric Balletbo i Serra		gpmc,bus-turnaround-ns = <0>;
170*8fd8f2e4SEnric Balletbo i Serra		gpmc,cycle2cycle-delay-ns = <0>;
171*8fd8f2e4SEnric Balletbo i Serra		gpmc,wait-monitoring-ns = <0>;
172*8fd8f2e4SEnric Balletbo i Serra		gpmc,clk-activation-ns = <6>;
173*8fd8f2e4SEnric Balletbo i Serra		gpmc,wr-data-mux-bus-ns = <30>;
174*8fd8f2e4SEnric Balletbo i Serra		gpmc,wr-access-ns = <90>;
175*8fd8f2e4SEnric Balletbo i Serra		gpmc,sync-clk-ps = <12000>;
176*8fd8f2e4SEnric Balletbo i Serra
177*8fd8f2e4SEnric Balletbo i Serra		#address-cells = <1>;
178*8fd8f2e4SEnric Balletbo i Serra		#size-cells = <1>;
179*8fd8f2e4SEnric Balletbo i Serra
180*8fd8f2e4SEnric Balletbo i Serra		status = "disabled";
181*8fd8f2e4SEnric Balletbo i Serra	};
182*8fd8f2e4SEnric Balletbo i Serra};
183*8fd8f2e4SEnric Balletbo i Serra
184*8fd8f2e4SEnric Balletbo i Serra&i2c1 {
185*8fd8f2e4SEnric Balletbo i Serra	pinctrl-names = "default";
186*8fd8f2e4SEnric Balletbo i Serra	pinctrl-0 = <&i2c1_pins>;
187*8fd8f2e4SEnric Balletbo i Serra	clock-frequency = <2600000>;
188*8fd8f2e4SEnric Balletbo i Serra
189*8fd8f2e4SEnric Balletbo i Serra	twl: twl@48 {
190*8fd8f2e4SEnric Balletbo i Serra		reg = <0x48>;
191*8fd8f2e4SEnric Balletbo i Serra		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
192*8fd8f2e4SEnric Balletbo i Serra		interrupt-parent = <&intc>;
193*8fd8f2e4SEnric Balletbo i Serra
194*8fd8f2e4SEnric Balletbo i Serra		twl_audio: audio {
195*8fd8f2e4SEnric Balletbo i Serra			compatible = "ti,twl4030-audio";
196*8fd8f2e4SEnric Balletbo i Serra			codec {
197*8fd8f2e4SEnric Balletbo i Serra			};
198*8fd8f2e4SEnric Balletbo i Serra		};
199*8fd8f2e4SEnric Balletbo i Serra	};
200*8fd8f2e4SEnric Balletbo i Serra};
201*8fd8f2e4SEnric Balletbo i Serra
202*8fd8f2e4SEnric Balletbo i Serra#include "twl4030.dtsi"
203*8fd8f2e4SEnric Balletbo i Serra#include "twl4030_omap3.dtsi"
204*8fd8f2e4SEnric Balletbo i Serra
205*8fd8f2e4SEnric Balletbo i Serra&i2c3 {
206*8fd8f2e4SEnric Balletbo i Serra	pinctrl-names = "default";
207*8fd8f2e4SEnric Balletbo i Serra	pinctrl-0 = <&i2c3_pins>;
208*8fd8f2e4SEnric Balletbo i Serra};
209*8fd8f2e4SEnric Balletbo i Serra
210*8fd8f2e4SEnric Balletbo i Serra&mcbsp2 {
211*8fd8f2e4SEnric Balletbo i Serra	pinctrl-names = "default";
212*8fd8f2e4SEnric Balletbo i Serra	pinctrl-0 = <&mcbsp2_pins>;
213*8fd8f2e4SEnric Balletbo i Serra	status = "okay";
214*8fd8f2e4SEnric Balletbo i Serra};
215*8fd8f2e4SEnric Balletbo i Serra
216*8fd8f2e4SEnric Balletbo i Serra&mmc1 {
217*8fd8f2e4SEnric Balletbo i Serra	pinctrl-names = "default";
218*8fd8f2e4SEnric Balletbo i Serra	pinctrl-0 = <&mmc1_pins>;
219*8fd8f2e4SEnric Balletbo i Serra	vmmc-supply = <&vmmc1>;
220*8fd8f2e4SEnric Balletbo i Serra	vmmc_aux-supply = <&vsim>;
221*8fd8f2e4SEnric Balletbo i Serra	bus-width = <4>;
222*8fd8f2e4SEnric Balletbo i Serra	cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
223*8fd8f2e4SEnric Balletbo i Serra};
224*8fd8f2e4SEnric Balletbo i Serra
225*8fd8f2e4SEnric Balletbo i Serra&mmc3 {
226*8fd8f2e4SEnric Balletbo i Serra	status = "disabled";
227*8fd8f2e4SEnric Balletbo i Serra};
228*8fd8f2e4SEnric Balletbo i Serra
229*8fd8f2e4SEnric Balletbo i Serra&uart1 {
230*8fd8f2e4SEnric Balletbo i Serra	pinctrl-names = "default";
231*8fd8f2e4SEnric Balletbo i Serra	pinctrl-0 = <&uart1_pins>;
232*8fd8f2e4SEnric Balletbo i Serra};
233*8fd8f2e4SEnric Balletbo i Serra
234*8fd8f2e4SEnric Balletbo i Serra&uart3 {
235*8fd8f2e4SEnric Balletbo i Serra	pinctrl-names = "default";
236*8fd8f2e4SEnric Balletbo i Serra	pinctrl-0 = <&uart3_pins>;
237*8fd8f2e4SEnric Balletbo i Serra};
238*8fd8f2e4SEnric Balletbo i Serra
239*8fd8f2e4SEnric Balletbo i Serra&twl_gpio {
240*8fd8f2e4SEnric Balletbo i Serra	ti,use-leds;
241*8fd8f2e4SEnric Balletbo i Serra};
242*8fd8f2e4SEnric Balletbo i Serra
243*8fd8f2e4SEnric Balletbo i Serra&usb_otg_hs {
244*8fd8f2e4SEnric Balletbo i Serra	interface-type = <0>;
245*8fd8f2e4SEnric Balletbo i Serra	usb-phy = <&usb2_phy>;
246*8fd8f2e4SEnric Balletbo i Serra	phys = <&usb2_phy>;
247*8fd8f2e4SEnric Balletbo i Serra	phy-names = "usb2-phy";
248*8fd8f2e4SEnric Balletbo i Serra	mode = <3>;
249*8fd8f2e4SEnric Balletbo i Serra	power = <50>;
250*8fd8f2e4SEnric Balletbo i Serra};
251