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/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,ovl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt2701-disp-ovl
26 - mediatek,mt8173-disp-ovl
27 - mediatek,mt8183-disp-ovl
28 - mediatek,mt8192-disp-ovl
[all …]
H A Dmediatek,rdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 data into DMA. It provides real time data to the back-end panel
26 - enum:
27 - mediatek,mt2701-disp-rdma
28 - mediatek,mt8173-disp-rdma
29 - mediatek,mt8183-disp-rdma
[all …]
H A Dmediatek,color.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
25 - enum:
26 - mediatek,mt2701-disp-color
27 - mediatek,mt8167-disp-color
28 - mediatek,mt8173-disp-color
29 - items:
[all …]
H A Dmediatek,aal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8173-disp-aal
26 - mediatek,mt8183-disp-aal
27 - items:
28 - enum:
[all …]
H A Dmediatek,gamma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8173-disp-gamma
26 - mediatek,mt8183-disp-gamma
27 - items:
28 - enum:
[all …]
H A Dmediatek,od.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt2712-disp-od
26 - mediatek,mt8173-disp-od
27 - items:
28 - const: mediatek,mt6795-disp-od
[all …]
H A Dmediatek,wdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8173-disp-wdma
26 - items:
27 - const: mediatek,mt6795-disp-wdma
28 - const: mediatek,mt8173-disp-wdma
[all …]
H A Dmediatek,split.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
24 - enum:
25 - mediatek,mt8173-disp-split
26 - items:
27 - const: mediatek,mt6795-disp-split
28 - const: mediatek,mt8173-disp-split
[all …]
H A Dmediatek,ufoe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
25 - enum:
26 - mediatek,mt8173-disp-ufoe
27 - items:
28 - const: mediatek,mt6795-disp-ufoe
29 - const: mediatek,mt8173-disp-ufoe
[all …]
H A Dmediatek,merge.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
14 Mediatek display merge, namely MERGE, is used to merge two slice-per-line
15 inputs into one side-by-side output.
24 - enum:
25 - mediatek,mt8173-disp-merge
26 - mediatek,mt8195-disp-merge
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmediatek,mutex.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display
27 - mediatek,mt2701-disp-mutex
28 - mediatek,mt2712-disp-mutex
29 - mediatek,mt6795-disp-mutex
30 - mediatek,mt8167-disp-mutex
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dmediatek,pwm-disp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jitao Shi <jitao.shi@mediatek.com>
11 - Xinlei Lee <xinlei.lee@mediatek.com>
14 - $ref: pwm.yaml#
19 - enum:
20 - mediatek,mt2701-disp-pwm
21 - mediatek,mt6595-disp-pwm
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/mt8173-clk.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/memory/mt8173-larb-port.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/power/mt8173-power.h>
13 #include <dt-bindings/reset/mt8173-resets.h>
14 #include <dt-bindings/gce/mt8173-gce.h>
15 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/gce/mt8186-gce.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/memory/mt8186-memory-port.h>
12 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
13 #include <dt-bindings/power/mt8186-power.h>
[all …]
H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
[all …]
/openbmc/linux/drivers/gpu/drm/mediatek/
H A Dmtk_drm_drv.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/dma-mapping.h>
50 if (info->num_planes != 1) in mtk_drm_mode_fb_create()
51 return ERR_PTR(-EINVAL); in mtk_drm_mode_fb_create()
316 { .compatible = "mediatek,mt2701-mmsys",
318 { .compatible = "mediatek,mt7623-mmsys",
320 { .compatible = "mediatek,mt2712-mmsys",
322 { .compatible = "mediatek,mt8167-mmsys",
324 { .compatible = "mediatek,mt8173-mmsys",
326 { .compatible = "mediatek,mt8183-mmsys",
[all …]
H A Dmtk_disp_color.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/soc/mediatek/mtk-cmdq.h>
22 #define DISP_COLOR_START(comp) ((comp)->data->color_offset)
34 * struct mtk_disp_color - DISP_COLOR driver structure
50 return clk_prepare_enable(color->clk); in mtk_color_clk_enable()
57 clk_disable_unprepare(color->clk); in mtk_color_clk_disable()
66 mtk_ddp_write(cmdq_pkt, w, &color->cmdq_reg, color->regs, DISP_COLOR_WIDTH(color)); in mtk_color_config()
67 mtk_ddp_write(cmdq_pkt, h, &color->cmdq_reg, color->regs, DISP_COLOR_HEIGHT(color)); in mtk_color_config()
75 color->regs + DISP_COLOR_CFG_MAIN); in mtk_color_start()
76 writel(0x1, color->regs + DISP_COLOR_START(color)); in mtk_color_start()
[all …]
H A Dmtk_disp_aal.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/soc/mediatek/mtk-cmdq.h>
39 return clk_prepare_enable(aal->clk); in mtk_aal_clk_enable()
46 clk_disable_unprepare(aal->clk); in mtk_aal_clk_disable()
55 mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_SIZE); in mtk_aal_config()
56 mtk_ddp_write(cmdq_pkt, w << 16 | h, &aal->cmdq_reg, aal->regs, DISP_AAL_OUTPUT_SIZE); in mtk_aal_config()
63 if (aal->data && aal->data->has_gamma) in mtk_aal_gamma_set()
64 mtk_gamma_set_common(aal->regs, state, false); in mtk_aal_gamma_set()
71 writel(AAL_EN, aal->regs + DISP_AAL_EN); in mtk_aal_start()
78 writel_relaxed(0x0, aal->regs + DISP_AAL_EN); in mtk_aal_stop()
[all …]
H A Dmtk_disp_gamma.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/soc/mediatek/mtk-cmdq.h>
34 * struct mtk_disp_gamma - DISP_GAMMA driver structure
47 return clk_prepare_enable(gamma->clk); in mtk_gamma_clk_enable()
54 clk_disable_unprepare(gamma->clk); in mtk_gamma_clk_disable()
65 if (state->gamma_lut) { in mtk_gamma_set_common()
70 lut = (struct drm_color_lut *)state->gamma_lut->data; in mtk_gamma_set_common()
78 diff[0] = (lut[i].red >> 6) - (lut[i - 1].red >> 6); in mtk_gamma_set_common()
79 diff[1] = (lut[i].green >> 6) - (lut[i - 1].green >> 6); in mtk_gamma_set_common()
80 diff[2] = (lut[i].blue >> 6) - (lut[i - 1].blue >> 6); in mtk_gamma_set_common()
[all …]
H A Dmtk_disp_rdma.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/soc/mediatek/mtk-cmdq.h>
52 #define RDMA_FIFO_SIZE(rdma) ((rdma)->data->fifo_size)
78 * struct mtk_disp_rdma - DISP_RDMA driver structure
96 writel(0x0, priv->regs + DISP_REG_RDMA_INT_STATUS); in mtk_disp_rdma_irq_handler()
98 if (!priv->vblank_cb) in mtk_disp_rdma_irq_handler()
101 priv->vblank_cb(priv->vblank_cb_data); in mtk_disp_rdma_irq_handler()
110 unsigned int tmp = readl(rdma->regs + reg); in rdma_update_bits()
113 writel(tmp, rdma->regs + reg); in rdma_update_bits()
122 rdma->vblank_cb = vblank_cb; in mtk_rdma_register_vblank_cb()
[all …]
H A Dmtk_disp_ovl.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <linux/soc/mediatek/mtk-cmdq.h>
47 #define DISP_REG_OVL_ADDR(ovl, n) ((ovl)->data->addr + 0x20 * (n))
48 #define DISP_REG_OVL_HDR_ADDR(ovl, n) ((ovl)->data->addr + 0x20 * (n) + 0x04)
49 #define DISP_REG_OVL_HDR_PITCH(ovl, n) ((ovl)->data->addr + 0x20 * (n) + 0x08)
62 #define OVL_CON_CLRFMT_RGB565(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \
64 #define OVL_CON_CLRFMT_RGB888(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \
120 * struct mtk_disp_ovl - DISP_OVL driver structure
139 writel(0x0, priv->regs + DISP_REG_OVL_INTSTA); in mtk_disp_ovl_irq_handler()
141 if (!priv->vblank_cb) in mtk_disp_ovl_irq_handler()
[all …]
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright © 2017-2020 MediaTek Inc.
10 #include <dt-bindings/memory/mt2701-larb-port.h>
19 compatible = "mediatek,mt7623-g3dsys",
20 "mediatek,mt2701-g3dsys",
23 #clock-cells = <1>;
24 #reset-cells = <1>;
28 compatible = "mediatek,mt7623-mali", "arm,mali-450";
41 interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1",
46 clock-names = "bus", "core";
[all …]
/openbmc/linux/drivers/pwm/
H A Dpwm-mtk-disp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MediaTek display pulse-width-modulation controller driver.
25 #define PWM_PERIOD_MASK ((1 << PWM_PERIOD_BIT_WIDTH) - 1)
61 void __iomem *address = mdp->base + offset; in mtk_disp_pwm_update_bits()
78 if (state->polarity != PWM_POLARITY_NORMAL) in mtk_disp_pwm_apply()
79 return -EINVAL; in mtk_disp_pwm_apply()
81 if (!state->enabled && mdp->enabled) { in mtk_disp_pwm_apply()
83 mdp->data->enable_mask, 0x0); in mtk_disp_pwm_apply()
84 clk_disable_unprepare(mdp->clk_mm); in mtk_disp_pwm_apply()
85 clk_disable_unprepare(mdp->clk_main); in mtk_disp_pwm_apply()
[all …]
/openbmc/linux/drivers/soc/mediatek/
H A Dmtk-mutex.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/soc/mediatek/mtk-mmsys.h>
13 #include <linux/soc/mediatek/mtk-mutex.h>
14 #include <linux/soc/mediatek/mtk-cmdq.h>
722 if (!mtx->mutex[i].claimed) { in mtk_mutex_get()
723 mtx->mutex[i].claimed = true; in mtk_mutex_get()
724 return &mtx->mutex[i]; in mtk_mutex_get()
727 return ERR_PTR(-EBUSY); in mtk_mutex_get()
734 mutex[mutex->id]); in mtk_mutex_put()
736 WARN_ON(&mtx->mutex[mutex->id] != mutex); in mtk_mutex_put()
[all …]
/openbmc/linux/drivers/pmdomain/mediatek/
H A Dmtk-scpsys.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <dt-bindings/power/mt2701-power.h>
17 #include <dt-bindings/power/mt2712-power.h>
18 #include <dt-bindings/power/mt6797-power.h>
19 #include <dt-bindings/power/mt7622-power.h>
20 #include <dt-bindings/power/mt7623a-power.h>
21 #include <dt-bindings/power/mt8173-power.h>
28 #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
37 #define SPM_AUDIO_PWR_CON 0x029c /* MT8173, MT2712 */
72 #define PWR_STATUS_MFG_2D BIT(22) /* MT8173 */
[all …]

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