Home
last modified time | relevance | path

Searched +full:mbox +full:- +full:rx (Results 1 – 25 of 277) sorted by relevance

12345678910>>...12

/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
26 interrupt configuration registers, and have a rx and tx interrupt source per
28 appropriate programming of the rx and tx interrupt sources on the appropriate
35 lines can also be routed to different processor sub-systems on DRA7xx as they
49 within a SoC. The sub-mailboxes (actual communication channels) are
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
[all …]
H A Dhisilicon,hi6220-mailbox.txt13 --------------------
14 - compatible: Shall be "hisilicon,hi6220-mbox"
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
23 slot_id: Slot id used either for TX or RX
26 TX/RX interrupt to application processor,
28 - interrupts: Contains the interrupt information for the mailbox
33 --------------------
34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
40 --------
[all …]
H A Dbrcm,iproc-pdc-mbox.txt7 - compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for
9 - reg: Should contain PDC registers location and length.
10 - interrupts: Should contain the IRQ line for the PDC.
11 - #mbox-cells: 1
12 - brcm,rx-status-len: Length of metadata preceding received frames, in bytes.
15 - brcm,use-bcm-hdr: present if a BCM header precedes each frame.
18 pdc0: iproc-pdc0@612c0000 {
19 compatible = "brcm,iproc-pdc-mbox";
22 #mbox-cells = <1>; /* one cell per mailbox channel */
23 brcm,rx-status-len = <32>;
[all …]
/openbmc/linux/drivers/media/platform/amphion/
H A Dvpu_mbox.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2020-2021 NXP
19 struct vpu_mbox *rx = container_of(cl, struct vpu_mbox, cl); in vpu_mbox_rx_callback() local
20 struct vpu_core *core = container_of(rx, struct vpu_core, rx); in vpu_mbox_rx_callback()
25 static int vpu_mbox_request_channel(struct device *dev, struct vpu_mbox *mbox) in vpu_mbox_request_channel() argument
30 if (!dev || !mbox) in vpu_mbox_request_channel()
31 return -EINVAL; in vpu_mbox_request_channel()
32 if (mbox->ch) in vpu_mbox_request_channel()
35 cl = &mbox->cl; in vpu_mbox_request_channel()
36 cl->dev = dev; in vpu_mbox_request_channel()
[all …]
/openbmc/linux/drivers/firmware/tegra/
H A Dbpmp-tegra186.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <soc/tegra/bpmp-abi.h>
16 #include "bpmp-private.h"
28 } tx, rx; member
33 } mbox; member
41 priv = container_of(client, struct tegra186_bpmp, mbox.client); in mbox_client_to_bpmp()
43 return priv->parent; in mbox_client_to_bpmp()
50 err = tegra_ivc_read_get_next_frame(channel->ivc, &channel->ib); in tegra186_bpmp_is_message_ready()
52 iosys_map_clear(&channel->ib); in tegra186_bpmp_is_message_ready()
63 err = tegra_ivc_write_get_next_frame(channel->ivc, &channel->ob); in tegra186_bpmp_is_channel_free()
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j721e-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019-2020 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
20 reserved_memory: reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
28 no-map;
31 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
32 compatible = "shared-dma-pool";
[all …]
H A Dk3-am642-tqma64xxl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany.
7 #include "k3-am642.dtsi"
18 /* 1G RAM - default variant */
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
34 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
[all …]
H A Dk3-j784s4-evm.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include "k3-j784s4.dtsi"
15 compatible = "ti,j784s4-evm", "ti,j784s4";
19 stdout-path = "serial2:115200n8";
39 reserved_memory: reserved-memory {
40 #address-cells = <2>;
[all …]
H A Dk3-j7200-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j7200.dtsi"
18 reserved_memory: reserved-memory {
19 #address-cells = <2>;
20 #size-cells = <2>;
26 no-map;
29 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
30 compatible = "shared-dma-pool";
[all …]
H A Dk3-j721e-beagleboneai64.dts1 // SPDX-License-Identifier: GPL-2.0
3 * https://beagleboard.org/ai-64
4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include "k3-j721e.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
16 #include <dt-bindings/phy/phy-cadence.h>
[all …]
/openbmc/linux/drivers/mailbox/
H A Dzynqmp-ipi-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/arm-smccc.h>
15 #include <linux/mailbox/zynqmp-ipi-message.h>
53 #define IPI_MB_CHNL_RX 1 /* IPI mailbox RX channel */
56 * struct zynqmp_ipi_mchan - Description of a Xilinx ZynqMP IPI mailbox channel
76 * struct zynqmp_ipi_mbox - Description of a ZynqMP IPI mailbox
82 * @mbox: mailbox Controller
83 * @mchans: array for channels, tx channel and rx channel.
90 struct mbox_controller mbox; member
95 * struct zynqmp_ipi_pdata - Description of z ZynqMP IPI agent platform data.
[all …]
H A Dimx-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
24 /* TX0/RX0/RXDB[0-3] */
35 /* Please not change TX & RX */
38 IMX_MU_TYPE_RX = 1, /* Rx */
40 IMX_MU_TYPE_RXDB = 3, /* Rx doorbell */
85 struct mbox_controller mbox; member
108 int (*rx)(struct imx_mu_priv *priv, struct imx_mu_con_priv *cp); member
118 #define IMX_MU_xSR_GIPn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(28 + (3 - (x))))
119 #define IMX_MU_xSR_RFn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(24 + (3 - (x))))
120 #define IMX_MU_xSR_TEn(type, x) (type & IMX_MU_V2 ? BIT(x) : BIT(20 + (3 - (x))))
[all …]
H A Dti-msgmgr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2022 Texas Instruments Incorporated - https://www.ti.com/
22 #include <linux/soc/ti/ti-msgmgr.h>
41 * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor
53 * struct ti_msgmgr_desc - Description of message manager integration
92 * struct ti_queue_inst - Description of a queue instance
96 * @irq: IRQ for Rx Queue
104 * @polled_rx_mode: Use polling for rx instead of interrupts
122 * struct ti_msgmgr_inst - Description of a Message Manager Instance
132 * @mbox: Mailbox Controller
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Ddra74x.dtsi2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
18 compatible = "arm,cortex-a15";
20 operating-points-v2 = <&cpu0_opp_table>;
25 compatible = "arm,cortex-a15-pmu";
26 interrupt-parent = <&wakeupgen>;
42 #address-cells = <1>;
43 #size-cells = <1>;
44 utmi-mode = <2>;
53 interrupt-names = "peripheral",
56 maximum-speed = "high-speed";
[all …]
H A Ddra72x.dtsi2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
16 compatible = "arm,cortex-a15-pmu";
17 interrupt-parent = <&wakeupgen>;
26 reg-names = "dss", "pll1_clkctrl", "pll1";
30 clock-names = "fck", "video1_clk";
35 ti,mbox-tx = <6 2 2>;
36 ti,mbox-rx = <4 2 2>;
40 ti,mbox-tx = <5 2 2>;
41 ti,mbox-rx = <1 2 2>;
48 ti,mbox-tx = <6 2 2>;
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap2420.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
15 compatible = "ti,omap2-l4", "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "ti,omap2-prcm";
25 #address-cells = <1>;
26 #size-cells = <0>;
34 compatible = "ti,omap2-scm", "simple-bus";
36 #address-cells = <1>;
[all …]
H A Ddra72x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
20 compatible = "arm,cortex-a15-pmu";
21 interrupt-parent = <&wakeupgen>;
27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
28 compatible = "ti,sysc-omap4", "ti,sysc";
31 reg-names = "rev", "sysc";
32 ti,sysc-midle = <SYSC_IDLE_FORCE>,
34 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
37 clock-names = "fck";
[all …]
H A Ddra74x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
16 compatible = "arm,cortex-a15";
18 operating-points-v2 = <&cpu0_opp_table>;
21 clock-names = "cpu";
23 clock-latency = <300000>; /* From omap-cpufreq driver */
26 #cooling-cells = <2>; /* min followed by max */
28 vbb-supply = <&abb_mpu>;
40 compatible = "arm,cortex-a15-pmu";
41 interrupt-parent = <&wakeupgen>;
[all …]
H A Domap2430.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
15 compatible = "ti,omap2-l4-wkup", "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "ti,omap2-prcm";
25 #address-cells = <1>;
26 #size-cells = <0>;
34 compatible = "ti,omap2-scm", "simple-bus";
36 #address-cells = <1>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Damphion,vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ming Qian <ming.qian@nxp.com>
12 - Shijie Qin <shijie.qin@nxp.com>
14 description: |-
20 pattern: "^vpu@[0-9a-f]+$"
24 - enum:
25 - nxp,imx8qm-vpu
26 - nxp,imx8qxp-vpu
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-vpu.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 #address-cells = <1>;
9 #size-cells = <1>;
12 power-domains = <&pd IMX_SC_R_VPU>;
16 compatible = "fsl,imx6sx-mu";
19 #mbox-cells = <2>;
20 power-domains = <&pd IMX_SC_R_VPU_MU_0>;
25 compatible = "fsl,imx6sx-mu";
28 #mbox-cells = <2>;
29 power-domains = <&pd IMX_SC_R_VPU_MU_1>;
[all …]
/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Dmbox.h1 /* SPDX-License-Identifier: GPL-2.0 */
37 #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull))
39 #define MBOX_RSP_TIMEOUT 6000 /* Time(ms) to wait for mbox response */
41 #define MBOX_MSG_ALIGN 16 /* Align mbox msg start to 16bytes */
54 void *mbase; /* This dev's mbox region */
65 void *hwbase; /* Mbox region advertised by HW */
67 u64 trigger; /* Trigger mbox notification */
68 u16 tr_shift; /* Mbox trigger shift */
69 u64 rx_start; /* Offset of Rx region in mbox memory */
70 u64 tx_start; /* Offset of Tx region in mbox memory */
[all …]
/openbmc/linux/drivers/net/wireless/ti/wl18xx/
H A Devent.c1 // SPDX-License-Identifier: GPL-2.0-only
67 skb = cfg80211_vendor_event_alloc(wl->hw->wiphy, NULL, 20, in wlcore_smart_config_sync_event()
73 return -EMSGSIZE; in wlcore_smart_config_sync_event()
88 skb = cfg80211_vendor_event_alloc(wl->hw->wiphy, NULL, in wlcore_smart_config_decode_event()
96 return -EMSGSIZE; in wlcore_smart_config_decode_event()
118 struct wl18xx_event_mailbox *mbox = wl->mbox; in wl18xx_process_mailbox_events() local
121 vector = le32_to_cpu(mbox->events_vector); in wl18xx_process_mailbox_events()
122 wl1271_debug(DEBUG_EVENT, "MBOX vector: 0x%x", vector); in wl18xx_process_mailbox_events()
126 mbox->number_of_scan_results); in wl18xx_process_mailbox_events()
128 if (wl->scan_wlvif) in wl18xx_process_mailbox_events()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/firmware/
H A Darm,scmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
31 - description: SCMI compliant firmware with mailbox transport
33 - const: arm,scmi
34 - description: SCMI compliant firmware with ARM SMC/HVC transport
36 - const: arm,scmi-smc
37 - description: SCMI compliant firmware with ARM SMC/HVC transport
38 with shmem address(4KB-page, offset) as parameters
[all …]
/openbmc/u-boot/arch/arm/mach-bcm283x/
H A Dmbox.c1 // SPDX-License-Identifier: GPL-2.0+
8 #include <asm/arch/mbox.h>
23 printf("mbox: Illegal mbox data 0x%08x\n", send); in bcm2835_mbox_call_raw()
24 return -1; in bcm2835_mbox_call_raw()
30 val = readl(&regs->status); in bcm2835_mbox_call_raw()
34 printf("mbox: Timeout draining stale responses\n"); in bcm2835_mbox_call_raw()
35 return -1; in bcm2835_mbox_call_raw()
37 val = readl(&regs->read); in bcm2835_mbox_call_raw()
43 val = readl(&regs->status); in bcm2835_mbox_call_raw()
47 printf("mbox: Timeout waiting for send space\n"); in bcm2835_mbox_call_raw()
[all …]

12345678910>>...12