Home
last modified time | relevance | path

Searched +full:invert +full:- +full:enable (Results 1 – 25 of 494) sorted by relevance

12345678910>>...20

/openbmc/u-boot/drivers/video/meson/
H A Dmeson_dw_hdmi.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 * Bit 12 RW i2s_ws_inv:1=Invert i2s_ws; 0=No invert. Default 0.
31 * Bit 11 RW i2s_clk_inv: 1=Invert i2s_clk; 0=No invert. Default 0.
32 * Bit 10 RW spdif_clk_inv: 1=Invert spdif_clk; 0=No invert. Default 0.
33 * Bit 9 RW tmds_clk_inv: 1=Invert tmds_clk; 0=No invert. Default 0.
34 * Bit 8 RW pixel_clk_inv: 1=Invert pixel_clk; 0=No invert. Default 0.
35 * Bit 4 RW cec_clk_en: 1=enable cec_clk; 0=disable. Default 0.
36 * Bit 3 RW i2s_clk_en: 1=enable i2s_clk; 0=disable. Default 0.
37 * Bit 2 RW spdif_clk_en: 1=enable spdif_clk; 0=disable. Default 0.
38 * Bit 1 RW tmds_clk_en: 1=enable tmds_clk; 0=disable. Default 0.
[all …]
/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_dw_hdmi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * Bit 15-10: RW Reserved. Default 1 starting from G12A
33 * Bit 31 RW free_clk_en: 0=Enable clock gating for power saving; 1= Disable
34 * Bit 12 RW i2s_ws_inv:1=Invert i2s_ws; 0=No invert. Default 0.
35 * Bit 11 RW i2s_clk_inv: 1=Invert i2s_clk; 0=No invert. Default 0.
36 * Bit 10 RW spdif_clk_inv: 1=Invert spdif_clk; 0=No invert. Default 0.
37 * Bit 9 RW tmds_clk_inv: 1=Invert tmds_clk; 0=No invert. Default 0.
38 * Bit 8 RW pixel_clk_inv: 1=Invert pixel_clk; 0=No invert. Default 0.
39 * Bit 7 RW hdcp22_skpclk_en: starting from G12A, 1=enable; 0=disable
40 * Bit 6 RW hdcp22_esmclk_en: starting from G12A, 1=enable; 0=disable
[all …]
H A Dmeson_dw_mipi_dsi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 /* Top-level registers */
33 * 1=Enable IP's edpihalt signal to suspend VencL;
35 * [2] RW clock_freerun: Apply to auto-clock gate only. Default 0.
36 * 0=Default, use auto-clock gating to save power;
37 * 1=use free-run clock, disable auto-clock gating, for debug mode.
39 * have auto-clock gating. 1=Enable pixclk. Default 0.
41 * have auto-clock gating. 1=Enable sysclk. Default 0.
50 * 0=16-bit RGB565 config 1;
51 * 1=16-bit RGB565 config 2;
[all …]
/openbmc/linux/drivers/macintosh/ams/
H A Dams-input.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2006 Michael Hanselmann (linux-kernel@hansmi.ch)
20 MODULE_PARM_DESC(joystick, "Enable the input class device on module load");
22 static bool invert; variable
23 module_param(invert, bool, S_IWUSR | S_IRUGO);
24 MODULE_PARM_DESC(invert, "Invert input data on X and Y axis");
36 x -= ams_info.xcalib; in ams_idev_poll()
37 y -= ams_info.ycalib; in ams_idev_poll()
38 z -= ams_info.zcalib; in ams_idev_poll()
40 input_report_abs(idev, ABS_X, invert ? -x : x); in ams_idev_poll()
[all …]
/openbmc/u-boot/include/
H A Dpwm.h1 /* SPDX-License-Identifier: GPL-2.0+ */
16 * set_config() - Set the PWM configuration
22 * @return 0 if OK, -ve on error
28 * set_enable() - Enable or disable the PWM
32 * @enable: true to enable, false to disable
33 * @return 0 if OK, -ve on error
35 int (*set_enable)(struct udevice *dev, uint channel, bool enable);
37 * set_invert() - Set the PWM invert
41 * @polarity: true to invert, false to keep normal polarity
42 * @return 0 if OK, -ve on error
[all …]
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/tslib/
H A Dtslib_1.23.bb9 LICENSE = "LGPL-2.0-or-later & GPL-2.0-or-later"
15 …s://github.com/kergoth/tslib/releases/download/${PV}/tslib-${PV}.tar.xz;downloadfilename=tslib-${P…
25 PACKAGECONFIG ??= "debounce dejitter evthres iir linear median pthres skip lowpass invert variance …
26 PACKAGECONFIG[debounce] = "--enable-debounce,--disable-debounce"
27 PACKAGECONFIG[dejitter] = "--enable-dejitter,--disable-dejitter"
28 PACKAGECONFIG[evthres] = "--enable-evthres,--disable-evthres"
29 PACKAGECONFIG[iir] = "--enable-iir,--disable-iir"
30 PACKAGECONFIG[linear] = "--enable-linear,--disable-linear"
31 PACKAGECONFIG[median] = "--enable-median,--disable-median"
32 PACKAGECONFIG[pthres] = "--enable-pthres,--disable-pthres"
[all …]
/openbmc/linux/drivers/clk/qcom/
H A Dclk-branch.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/clk-provider.h>
14 #include "clk-branch.h"
20 if (!br->hwcg_reg) in clk_branch_in_hwcg_mode()
23 regmap_read(br->clkr.regmap, br->hwcg_reg, &val); in clk_branch_in_hwcg_mode()
25 return !!(val & BIT(br->hwcg_bit)); in clk_branch_in_hwcg_mode()
30 bool invert = (br->halt_check == BRANCH_HALT_ENABLE); in clk_branch_check_halt() local
33 regmap_read(br->clkr.regmap, br->halt_reg, &val); in clk_branch_check_halt()
35 val &= BIT(br->halt_bit); in clk_branch_check_halt()
36 if (invert) in clk_branch_check_halt()
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dtda7419.c1 // SPDX-License-Identifier: GPL-2.0-only
131 unsigned int invert:1; member
136 if (tvc->reg == tvc->rreg) in tda7419_vol_is_stereo()
146 (struct tda7419_vol_control *)kcontrol->private_value; in tda7419_vol_info()
148 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in tda7419_vol_info()
149 uinfo->count = tda7419_vol_is_stereo(tvc) ? 2 : 1; in tda7419_vol_info()
150 uinfo->value.integer.min = tvc->min; in tda7419_vol_info()
151 uinfo->value.integer.max = tvc->max; in tda7419_vol_info()
158 unsigned int invert) in tda7419_vol_get_value() argument
162 if (invert) in tda7419_vol_get_value()
[all …]
H A Dmax98926.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98926.c -- ALSA SoC MAX98926 driver
4 * Copyright 2013-15 Maxim Integrated Products
76 { 0x36, 0x00 }, /* Block Enable */
78 { 0x38, 0x00 }, /* Global Enable */
122 SND_SOC_DAPM_DAC("Amp Enable", NULL, MAX98926_BLOCK_ENABLE,
124 SND_SOC_DAPM_SUPPLY("Global Enable", MAX98926_GLOBAL_ENABLE,
126 SND_SOC_DAPM_SUPPLY("VI Enable", MAX98926_BLOCK_ENABLE,
130 SND_SOC_DAPM_PGA("BST Enable", MAX98926_BLOCK_ENABLE,
152 {"VI Enable", NULL, "DAI_OUT"},
[all …]
H A Dda9055.c1 // SPDX-License-Identifier: GPL-2.0-or-later
59 /* Input - Gain, Select and Filter Registers */
72 /* Output - Gain, Select and Filter Registers */
289 0x0, 0x10, TLV_DB_SCALE_ITEM(-5400, 0, 0),
290 /* -54dB to 15dB */
291 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
296 /* -78dB to 12dB */
297 0x08, 0x7f, TLV_DB_SCALE_ITEM(-7800, 75, 0)
306 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, -600, 600, 0);
307 static const DECLARE_TLV_DB_SCALE(mixin_gain_tlv, -450, 150, 0);
[all …]
/openbmc/linux/drivers/video/fbdev/
H A Dcyber2000fb.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1998-2000 Russell King
77 #define EXT_FUNC_CTL_EXTREGENBL 0x80 /* enable access to 0xbcxxx */
80 #define PCI_BM_CTL_ENABLE 0x01 /* enable bus-master */
81 #define PCI_BM_CTL_BURST 0x02 /* enable burst */
82 #define PCI_BM_CTL_BACK2BACK 0x04 /* enable back to back */
199 #define EXT_CAP_MODE1_8BIT 0x01 /* enable 8bit capture mode */
226 #define EXT_LATCH1_VAFC_EN 0x01 /* enable VAFC */
250 #define EXT_X_START 0xc5 /* ext->screen, 16 bits */
251 #define EXT_X_END 0xc7 /* ext->screen, 16 bits */
[all …]
/openbmc/linux/sound/isa/cs423x/
H A Dcs4236_lib.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * -----
10 * -----
20 * D7-D5: version
21 * D4-D0: chip id
22 * 11101 - CS4235
23 * 01011 - CS4236B
24 * 01000 - CS4237B
25 * 01001 - CS4238B
26 * 11110 - CS4239
[all …]
/openbmc/linux/Documentation/devicetree/bindings/input/
H A Dazoteq,iqs7222.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
21 - azoteq,iqs7222a
22 - azoteq,iqs7222b
23 - azoteq,iqs7222c
24 - azoteq,iqs7222d
29 irq-gpios:
32 Specifies the GPIO connected to the device's active-low RDY output.
[all …]
/openbmc/linux/drivers/irqchip/
H A Dirq-st.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * This is a re-write of Christophe Kerello's PMU driver.
10 #include <dt-bindings/interrupt-controller/irq-st.h>
45 .compatible = "st,stih407-irq-syscfg",
54 struct st_irq_syscfg *ddata = dev_get_drvdata(&pdev->dev); in st_irq_xlate()
56 /* Set the device enable bit. */ in st_irq_xlate()
59 ddata->config |= ST_A9_IRQ_EN_EXT_0; in st_irq_xlate()
62 ddata->config |= ST_A9_IRQ_EN_EXT_1; in st_irq_xlate()
65 ddata->config |= ST_A9_IRQ_EN_EXT_2; in st_irq_xlate()
68 ddata->config |= ST_A9_IRQ_EN_CTI_0; in st_irq_xlate()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/ti/
H A Dautoidle.txt3 Binding status: Unstable - ABI compatibility may be broken in the future
9 or fixed-factor.
11 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
14 - reg : offset for the register controlling the autoidle
15 - ti,autoidle-shift : bit shift of the autoidle enable bit
16 - ti,invert-autoidle-bit : autoidle is enabled by setting the bit to 0
20 #clock-cells = <0>;
21 compatible = "ti,divider-clock";
23 ti,max-div = <31>;
24 ti,autoidle-shift = <8>;
[all …]
/openbmc/u-boot/drivers/video/
H A Dmvebu_lcd.c1 // SPDX-License-Identifier: GPL-2.0+
113 for (i = 0; i < dram->num_cs; i++) { in mvebu_lcd_conf_mbus_registers()
114 const struct mbus_dram_window *cs = dram->cs + i; in mvebu_lcd_conf_mbus_registers()
115 writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) | in mvebu_lcd_conf_mbus_registers()
116 (dram->mbus_dram_target_id << 4) | 1, in mvebu_lcd_conf_mbus_registers()
119 writel(cs->base & 0xffff0000, regs + MVEBU_LCD_WIN_BASE(i)); in mvebu_lcd_conf_mbus_registers()
128 int x = lcd_info->x_res; in mvebu_lcd_register_init()
129 int y = lcd_info->y_res; in mvebu_lcd_register_init()
144 * end (currently 1GB-64MB but also may be 2GB-64MB). in mvebu_lcd_register_init()
147 writel(lcd_info->fb_base, regs + MVEBU_LCD_CFG_GRA_START_ADDR0); in mvebu_lcd_register_init()
[all …]
/openbmc/u-boot/doc/
H A DREADME.bus_vcxk1 SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2008-2009
4 * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
5 * Jens Scharsig <esw@bus-elektronik.de>
8 U-Boot vcxk video controller driver
15 -----------------------------------------------------------------------
16 EB+CPU5282-T1 | MCF5282 | BuS Elektronik GmbH & Co. KG
17 EB+MCF-EVB123 | MCF5282 | BuS Elektronik GmbH & Co. KG
22 --------------------
37 define this option to enable double buffering (needs 16KiB RAM)
[all …]
/openbmc/linux/drivers/s390/net/
H A Dqeth_l3_sys.c1 // SPDX-License-Identifier: GPL-2.0
24 if ((proto == QETH_PROT_IPV4 && !in4_pton(buf, -1, addr, -1, &end)) || in qeth_l3_string_to_ipaddr()
25 (proto == QETH_PROT_IPV6 && !in6_pton(buf, -1, addr, -1, &end))) in qeth_l3_string_to_ipaddr()
26 return -EINVAL; in qeth_l3_string_to_ipaddr()
33 switch (route->type) { in qeth_l3_dev_route_show()
39 if (card->info.broadcast_capable == QETH_BROADCAST_WITHOUT_ECHO) in qeth_l3_dev_route_show()
44 if (card->info.broadcast_capable == QETH_BROADCAST_WITHOUT_ECHO) in qeth_l3_dev_route_show()
49 if (card->info.broadcast_capable == QETH_BROADCAST_WITHOUT_ECHO) in qeth_l3_dev_route_show()
63 return qeth_l3_dev_route_show(card, &card->options.route4, buf); in qeth_l3_dev_route4_show()
70 enum qeth_routing_types old_route_type = route->type; in qeth_l3_dev_route_store()
[all …]
/openbmc/linux/sound/isa/
H A Dopl3sa2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Yamaha OPL3-SA[2,3] soundcards
26 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
28 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_ISAPNP; /* Enable this card */ variable
30 static bool isapnp[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
43 MODULE_PARM_DESC(index, "Index value for OPL3-SA soundcard.");
45 MODULE_PARM_DESC(id, "ID string for OPL3-SA soundcard.");
46 module_param_array(enable, bool, NULL, 0444);
47 MODULE_PARM_DESC(enable, "Enable OPL3-SA soundcard.");
53 MODULE_PARM_DESC(port, "Port # for OPL3-SA driver.");
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,fimd.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,s3c2443-fimd
19 - samsung,s3c6400-fimd
20 - samsung,s5pv210-fimd
[all …]
/openbmc/u-boot/drivers/phy/marvell/
H A Dcomphy_a3700.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2016 Marvell International Ltd.
67 /*-----------------------------------------------------------*/
144 for (timeout = PLL_LOCK_TIMEOUT; timeout > 0; timeout--) { in comphy_poll_reg()
165 static int comphy_pcie_power_up(u32 speed, u32 invert) in comphy_pcie_power_up() argument
172 * 1. Enable max PLL. in comphy_pcie_power_up()
192 * 5. Enable idle sync in comphy_pcie_power_up()
197 * 6. Enable the output of 100M/125M/500M clock in comphy_pcie_power_up()
203 * 7. Enable TX in comphy_pcie_power_up()
226 * 10. Check the Polarity invert bit in comphy_pcie_power_up()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,q6dsp-lpass-ports.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
18 - qcom,q6afe-dais
20 '#sound-dai-cells':
23 '#address-cells':
26 '#size-cells':
31 '^dai@[0-9]+$':
[all …]
/openbmc/u-boot/drivers/pwm/
H A Dsunxi_pwm.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2017-2018 Vasily Khoruzhick <anarsoul@gmail.com>
23 bool invert; member
60 priv->invert = polarity; in sunxi_pwm_set_invert()
69 struct sunxi_pwm *regs = priv->regs; in sunxi_pwm_set_config()
85 if ((period - 1 <= SUNXI_PWM_CH0_PERIOD_MAX) && in sunxi_pwm_set_config()
93 if (best_period - 1 > SUNXI_PWM_CH0_PERIOD_MAX) { in sunxi_pwm_set_config()
95 return -EINVAL; in sunxi_pwm_set_config()
100 if (priv->prescaler != best_prescaler) { in sunxi_pwm_set_config()
102 v = readl(&regs->ctrl); in sunxi_pwm_set_config()
[all …]
/openbmc/linux/include/sound/
H A Dsoc-jack.h1 /* SPDX-License-Identifier: GPL-2.0
3 * soc-jack.h
12 * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
16 * @invert: if non-zero then pin is enabled when status is not reported
23 bool invert; member
27 * struct snd_soc_jack_zone - Describes voltage zones of jack detection
45 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
54 * @invert: report presence in low state
56 * @wake: enable as wake source
67 int invert; member
/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dnxp,pca9685-pwm.txt1 NXP PCA9685 16-channel 12-bit PWM LED controller
5 - compatible: "nxp,pca9685-pwm"
6 - #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
12 - invert (bool): boolean to enable inverted logic
13 - open-drain (bool): boolean to configure outputs with open-drain structure;
14 if omitted use totem-pole structure
22 compatible = "nxp,pca9685-pwm";
23 #pwm-cells = <2>;
25 invert;
26 open-drain;

12345678910>>...20