/openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | fsl,imx8m-noc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interconnect/fsl,imx8m-noc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peng Fan <peng.fan@nxp.com> 18 for normal (non-secure) world. 20 The buses are based on externally licensed IPs such as ARM NIC-301 and 27 - items: 28 - enum: 29 - fsl,imx8mm-nic [all …]
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/fsl/ |
H A D | imx8m-ddrc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/fsl/imx8m-ddrc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peng Fan <peng.fan@nxp.com> 13 The DDRC block is integrated in i.MX8M for interfacing with DDR based 18 switching is implemented by TF-A code which runs from a SRAM area. 20 The Linux driver for the DDRC doesn't even map registers (they're included 27 - enum: 28 - fsl,imx8mn-ddrc [all …]
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mm-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2019-2020 NXP 6 /dts-v1/; 8 #include <dt-bindings/usb/pd.h> 9 #include "imx8mm-evk.dtsi" 13 compatible = "fsl,imx8mm-evk", "fsl,imx8mm"; 20 &ddrc { 21 operating-points-v2 = <&ddrc_opp_table>; 23 ddrc_opp_table: opp-table { 24 compatible = "operating-points-v2"; [all …]
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H A D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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H A D | imx8mm-kontron-sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include "imx8mm.dtsi" 10 compatible = "kontron,imx8mm-sl", "fsl,imx8mm"; 23 stdout-path = &uart3; 28 cpu-supply = <®_vdd_arm>; 32 cpu-supply = <®_vdd_arm>; 36 cpu-supply = <®_vdd_arm>; 40 cpu-supply = <®_vdd_arm>; 43 &ddrc { 44 operating-points-v2 = <&ddrc_opp_table>; [all …]
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H A D | imx8mm-kontron-osm-s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include "imx8mm.dtsi" 10 model = "Kontron OSM-S i.MX8MM (N802X SOM)"; 11 compatible = "kontron,imx8mm-osm-s", "fsl,imx8mm"; 29 stdout-path = &uart3; 34 cpu-supply = <®_vdd_arm>; 38 cpu-supply = <®_vdd_arm>; 42 cpu-supply = <®_vdd_arm>; 46 cpu-supply = <®_vdd_arm>; [all …]
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H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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H A D | imx8mm-phycore-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include "imx8mm.dtsi" 8 #include <dt-bindings/net/ti-dp83867.h> 11 model = "PHYTEC phyCORE-i.MX8MM"; 12 compatible = "phytec,imx8mm-phycore-som", "fsl,imx8mm"; 24 reg_vdd_3v3_s: regulator-vdd-3v3-s { 25 compatible = "regulator-fixed"; 26 regulator-always-on; 27 regulator-boot-on; 28 regulator-max-microvolt = <3300000>; [all …]
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H A D | imx8mm-data-modul-edm-sbc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/net/qca-ar803x.h> 9 #include <dt-bindings/phy/phy-imx8-pcie.h> 10 #include "imx8mm.dtsi" 14 compatible = "dmo,imx8mm-data-modul-edm-sbc", "fsl,imx8mm"; 22 stdout-path = &uart3; 32 compatible = "pwm-backlight"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&pinctrl_panel_backlight>; [all …]
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H A D | imx8mm-var-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "imx8mm.dtsi" 10 model = "Variscite VAR-SOM-MX8MM module"; 11 compatible = "variscite,var-som-mx8mm", "fsl,imx8mm"; 14 stdout-path = &uart4; 22 reg_eth_phy: regulator-eth-phy { 23 compatible = "regulator-fixed"; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&pinctrl_reg_eth_phy>; 26 regulator-name = "eth_phy_pwr"; [all …]
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H A D | imx8mm-venice-gw7904.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/phy/phy-imx8-pcie.h> 13 #include "imx8mm.dtsi" 17 compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm"; 20 stdout-path = &uart2; 28 gpio-keys { [all …]
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H A D | imx8mm-venice-gw7903.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/phy/phy-imx8-pcie.h> 13 #include "imx8mm.dtsi" 17 compatible = "gw,imx8mm-gw7903", "fsl,imx8mm"; 25 stdout-path = &uart2; 33 gpio-keys { [all …]
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H A D | imx8mm-innocomm-wb15.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "imx8mm.dtsi" 7 #include <dt-bindings/phy/phy-imx8-pcie.h> 10 reg_modem: regulator-modem { 11 compatible = "regulator-fixed"; 12 pinctrl-names = "default"; 13 pinctrl-0 = <&pinctrl_modem_regulator>; 14 regulator-min-microvolt = <3300000>; 15 regulator-max-microvolt = <3300000>; 16 regulator-name = "epdev_on"; [all …]
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H A D | imx8mm-venice-gw7901.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/phy/phy-imx8-pcie.h> 13 #include "imx8mm.dtsi" 17 compatible = "gw,imx8mm-gw7901", "fsl,imx8mm"; 30 stdout-path = &uart2; 38 gpio-keys { [all …]
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H A D | imx8mm-venice-gw7902.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/phy/phy-imx8-pcie.h> 14 #include "imx8mm.dtsi" 18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm"; 27 stdout-path = &uart2; [all …]
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H A D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/power/imx8mp-power.h> 8 #include <dt-bindings/reset/imx8mp-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interconnect/fsl,imx8mp.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 15 #include "imx8mp-pinfunc.h" [all …]
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H A D | imx8mm-verdin.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 6 #include <dt-bindings/phy/phy-imx8-pcie.h> 7 #include <dt-bindings/pwm/pwm.h> 8 #include "imx8mm.dtsi" 12 stdout-path = &uart1; 21 compatible = "pwm-backlight"; 22 brightness-levels = <0 45 63 88 119 158 203 255>; 23 default-brightness-level = <4>; 25 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; 26 pinctrl-names = "default"; [all …]
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/openbmc/linux/drivers/interconnect/imx/ |
H A D | imx8mm.c | 1 // SPDX-License-Identifier: GPL-2.0 6 * Copyright (c) 2019-2020, NXP 13 #include <dt-bindings/interconnect/imx8mm.h> 20 .phandle_name = "fsl,ddrc", 100 .name = "imx8mm-interconnect", 107 MODULE_ALIAS("platform:imx8mm-interconnect");
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/openbmc/linux/ |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
/openbmc/ |
D | opengrok1.0.log | 1 2025-03-17 03:00:37.547-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-03-17 03:00:37.671-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |
D | opengrok2.0.log | 1 2025-03-16 03:00:36.730-0500 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler 2 2025-03-16 03:00:36.828-0500 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, - [all...] |