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/openbmc/linux/drivers/gpu/drm/i915/
H A DKconfig.profile2 int "Default timeout for requests (ms)"
5 Configures the default timeout after which any user submissions will
13 May be 0 to disable the timeout.
16 int "Timeout for unsignaled foreign fences (ms, jiffy granularity)"
21 make forward progress. This value specifies the timeout used for an
24 May be 0 to disable the timeout, and rely on the foreign fence being
28 int "Runtime autosuspend delay for userspace GGTT mmaps (ms)"
35 that complements the runtime-pm autosuspend and provides a lower
42 int "Interval between heartbeat pulses (ms)"
46 check the health of the GPU and undertake regular house-keeping of
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H A Dintel_pcode.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2013-2021 Intel Corporation
16 return -ENODEV; in gen6_check_mailbox_status()
18 return -ENXIO; in gen6_check_mailbox_status()
21 return -EOVERFLOW; in gen6_check_mailbox_status()
23 return -ETIMEDOUT; in gen6_check_mailbox_status()
36 return -ENXIO; in gen7_check_mailbox_status()
38 return -ETIMEDOUT; in gen7_check_mailbox_status()
40 return -EINVAL; in gen7_check_mailbox_status()
42 return -ENXIO; in gen7_check_mailbox_status()
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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd9576-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd9576-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 powering the R-Car series processors.
21 - rohm,bd9576
22 - rohm,bd9573
32 rohm,vout1-en-low:
35 controlled by a GPIO. This is dictated by state of vout1-en pin during
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/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Ddevlink_linecard.sh2 # SPDX-License-Identifier: GPL-2.0
5 # LC_SLOT - If not set, all probed line cards are going to be tested,
41 devlink lc show $DEVLINK_DEV lc $lc -j | jq -e -r ".[][][].state"
48 local timeout=$3 # ms
50 busywait "$timeout" until_lc_state_is_not "$state" lc_state_get "$lc"
57 local timeout=$3 # ms
59 busywait "$timeout" until_lc_state_is "$state" lc_state_get "$lc"
75 devlink port -j | jq -e -r ".[][] | select(.lc==$lc) | .port" | wc -l
82 local timeout=$3 # ms
84 busywait "$timeout" until_lc_port_count_is "$port_count" lc_port_count_get "$lc"
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/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_82598.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
18 static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw,
21 static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
25 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
26 * @hw: pointer to the HW structure
28 * The defaults for 82598 should be in the range of 50us to 50ms,
29 * however the hardware default for these parts is 500us to 1ms which is less
30 * than the 10ms recommended by the pci-e spec. To address this we need to
31 * increase the value to either 10ms to 250ms for capability version 1 config,
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H A Dixgbe_82599.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
19 static void ixgbe_disable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
20 static void ixgbe_enable_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
21 static void ixgbe_flap_tx_laser_multispeed_fiber(struct ixgbe_hw *hw);
24 static s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
27 static void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
28 static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
30 static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
33 static s32 ixgbe_setup_copper_link_82599(struct ixgbe_hw *hw,
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/openbmc/linux/drivers/net/wireless/intersil/orinoco/
H A Dorinoco_pci.c4 * (i.e. these are not PCMCIA cards in a PCMCIA-to-PCI bridge).
14 * Some of this code is "inspired" by linux-wlan-ng-0.1.10, but nothing
15 * has been copied from it. linux-wlan-ng-0.1.10 is originally :
20 * (C) Copyright David Gibson, IBM Corp. 2002-2003.
63 * Those times are straight from wlan-ng, and it is claimed that they
65 #define HERMES_PCI_COR_ONT (250) /* ms */
66 #define HERMES_PCI_COR_OFFT (500) /* ms */
67 #define HERMES_PCI_COR_BUSYT (500) /* ms */
72 * This is the part of the code that is strongly inspired from wlan-ng
77 * need only around 245 iteration of the loop to do 250 ms delay.
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/openbmc/linux/drivers/net/ethernet/atheros/atl1e/
H A Datl1e_hw.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
19 int atl1e_check_eeprom_exist(struct atl1e_hw *hw) in atl1e_check_eeprom_exist() argument
23 value = AT_READ_REG(hw, REG_SPI_FLASH_CTRL); in atl1e_check_eeprom_exist()
26 AT_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value); in atl1e_check_eeprom_exist()
28 value = AT_READ_REGW(hw, REG_PCIE_CAP_LIST); in atl1e_check_eeprom_exist()
32 void atl1e_hw_set_mac_addr(struct atl1e_hw *hw) in atl1e_hw_set_mac_addr() argument
36 * 00-0B-6A-F6-00-DC in atl1e_hw_set_mac_addr()
40 value = (((u32)hw->mac_addr[2]) << 24) | in atl1e_hw_set_mac_addr()
41 (((u32)hw->mac_addr[3]) << 16) | in atl1e_hw_set_mac_addr()
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/openbmc/linux/drivers/rtc/
H A Drtc-jz4740.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
9 #include <linux/clk-provider.h>
75 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
82 return readl_poll_timeout(rtc->base + JZ_REG_RTC_CTRL, ctrl, in jz4740_rtc_wait_write_ready()
95 writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()
97 return readl_poll_timeout(rtc->base + JZ_REG_RTC_WENR, ctrl, in jz4780_rtc_enable_write()
106 if (rtc->type >= ID_JZ4760) in jz4740_rtc_reg_write()
111 writel(val, rtc->base + reg); in jz4740_rtc_reg_write()
123 spin_lock_irqsave(&rtc->lock, flags); in jz4740_rtc_ctrl_set_bits()
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/openbmc/linux/drivers/net/ethernet/intel/igb/
H A De1000_82575.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
46 static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw);
47 static s32 igb_reset_mdicnfg_82580(struct e1000_hw *hw);
48 static s32 igb_validate_nvm_checksum_82580(struct e1000_hw *hw);
49 static s32 igb_update_nvm_checksum_82580(struct e1000_hw *hw);
50 static s32 igb_validate_nvm_checksum_i350(struct e1000_hw *hw);
51 static s32 igb_update_nvm_checksum_i350(struct e1000_hw *hw);
55 /* Due to a hw errata, if the host tries to configure the VFTA register
61 * igb_write_vfta_i350 - Write value to VLAN filter table
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/openbmc/qemu/hw/misc/
H A Dmac_via.c4 * Copyright (c) 2011-2018 Laurent Vivier
5 * Copyright (c) 2018 Mark Cave-Ayland
7 * Some parts from hw/misc/macio/cuda.c
9 * Copyright (c) 2004-2007 Fabrice Bellard
12 * some parts from linux-2.6.29, arch/m68k/include/asm/mac_via.h
15 * See the COPYING file in the top-level directory.
19 #include "exec/address-spaces.h"
21 #include "hw/sysbus.h"
22 #include "hw/irq.h"
24 #include "hw/misc/mac_via.h"
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/openbmc/linux/drivers/net/wireless/ti/wl1251/
H A Dps.c1 // SPDX-License-Identifier: GPL-2.0-only
13 /* in ms */
26 mutex_lock(&wl->mutex); in wl1251_elp_work()
28 if (wl->elp || wl->station_mode == STATION_ACTIVE_MODE) in wl1251_elp_work()
33 wl->elp = true; in wl1251_elp_work()
36 mutex_unlock(&wl->mutex); in wl1251_elp_work()
46 if (wl->station_mode != STATION_ACTIVE_MODE) { in wl1251_ps_elp_sleep()
48 ieee80211_queue_delayed_work(wl->hw, &wl->elp_work, delay); in wl1251_ps_elp_sleep()
54 unsigned long timeout, start; in wl1251_ps_elp_wakeup() local
57 cancel_delayed_work(&wl->elp_work); in wl1251_ps_elp_wakeup()
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/openbmc/linux/drivers/scsi/csiostor/
H A Dcsio_mb.c4 * Copyright (c) 2008-2012 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
51 * csio_mb_fw_retval - FW return value from a mailbox response.
60 hdr = (struct fw_cmd_hdr *)(mbp->mb); in csio_mb_fw_retval()
62 return FW_CMD_RETVAL_G(ntohl(hdr->lo)); in csio_mb_fw_retval()
66 * csio_mb_hello - FW HELLO command helper
67 * @hw: The HW structure
76 csio_mb_hello(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo, in csio_mb_hello() argument
80 struct fw_hello_cmd *cmdp = (struct fw_hello_cmd *)(mbp->mb); in csio_mb_hello()
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/openbmc/linux/drivers/net/wireless/ath/ath12k/
H A Dreg.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
11 #define ATH12K_2GHZ_CH01_11 REG_RULE(2412 - 10, 2462 + 10, 40, 0, 20, 0)
12 #define ATH12K_5GHZ_5150_5350 REG_RULE(5150 - 10, 5350 + 10, 80, 0, 30,\
14 #define ATH12K_5GHZ_5725_5850 REG_RULE(5725 - 10, 5850 + 10, 80, 0, 30,\
31 static bool ath12k_regdom_changes(struct ieee80211_hw *hw, char *alpha2) in ath12k_regdom_changes() argument
35 regd = rcu_dereference_rtnl(hw->wiphy->regd); in ath12k_regdom_changes()
43 return memcmp(regd->alpha2, alpha2, 2) != 0; in ath12k_regdom_changes()
49 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); in ath12k_reg_notifier() local
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/openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dpll.c1 // SPDX-License-Identifier: GPL-2.0-only
41 return -EBUSY; in dss_pll_register()
61 if (dss_plls[i] && strcmp(dss_plls[i]->name, name) == 0) in dss_pll_find()
72 r = clk_prepare_enable(pll->clkin); in dss_pll_enable()
76 if (pll->regulator) { in dss_pll_enable()
77 r = regulator_enable(pll->regulator); in dss_pll_enable()
82 r = pll->ops->enable(pll); in dss_pll_enable()
89 if (pll->regulator) in dss_pll_enable()
90 regulator_disable(pll->regulator); in dss_pll_enable()
92 clk_disable_unprepare(pll->clkin); in dss_pll_enable()
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/openbmc/linux/drivers/watchdog/
H A Dbd9576_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/mfd/rohm-bd957x.h>
37 gpiod_set_value_cansleep(priv->gpiod_en, 0); in bd9576_wdt_disable()
45 gpiod_set_value_cansleep(priv->gpiod_ping, 1); in bd9576_wdt_ping()
46 gpiod_set_value_cansleep(priv->gpiod_ping, 0); in bd9576_wdt_ping()
55 gpiod_set_value_cansleep(priv->gpiod_en, 1); in bd9576_wdt_start()
97 return -EINVAL; in find_closest_fast()
113 return -EINVAL; in find_closest_slow_by_fast()
141 return -EINVAL; in find_closest_slow()
156 struct device *dev = priv->dev; in bd957x_set_wdt_mode()
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H A Ddb8500_wdt.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2011-2013
5 * Author: Mathieu Poirier <mathieu.poirier@linaro.org> for ST-Ericsson
6 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
19 #include <linux/mfd/dbx500-prcmu.h>
24 #define WATCHDOG_MAX28 268435 /* 28 bit resolution in ms == 268435.455 s */
26 static unsigned int timeout = WATCHDOG_TIMEOUT; variable
27 module_param(timeout, uint, 0);
28 MODULE_PARM_DESC(timeout,
29 "Watchdog timeout in seconds. default="
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/openbmc/linux/drivers/platform/x86/intel/atomisp2/
H A Dpm.c1 // SPDX-License-Identifier: GPL-2.0
10 * Copyright (C) 2010-2017 Intel Corporation. All rights reserved.
38 unsigned long timeout; in isp_set_power() local
46 * There should be no IUNIT access while power-down is in isp_set_power()
47 * in progress. HW sighting: 4567865. in isp_set_power()
48 * Wait up to 50 ms for the IUNIT to shut down. in isp_set_power()
51 timeout = jiffies + msecs_to_jiffies(50); in isp_set_power()
62 } while (time_before(jiffies, timeout)); in isp_set_power()
64 dev_err(&dev->dev, "IUNIT power-%s timeout.\n", enable ? "on" : "off"); in isp_set_power()
65 return -EBUSY; in isp_set_power()
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/openbmc/linux/drivers/spi/
H A Dspi-sprd-adi.c4 * SPDX-License-Identifier: GPL-2.0
36 #define REG_ADI_CHN_ADDR(id) (0x44 + (id - 2) * 4)
69 /* Timeout (ms) for the trylock of hardware spinlocks */
125 /* Use default timeout 50 ms that converts to watchdog values */
159 if (reg >= sadi->data->slave_addr_size) { in sprd_adi_check_addr()
160 dev_err(sadi->dev, in sprd_adi_check_addr()
163 return -EINVAL; in sprd_adi_check_addr()
171 u32 timeout = ADI_FIFO_DRAIN_TIMEOUT; in sprd_adi_drain_fifo() local
175 sts = readl_relaxed(sadi->base + REG_ADI_ARM_FIFO_STS); in sprd_adi_drain_fifo()
180 } while (--timeout); in sprd_adi_drain_fifo()
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/openbmc/linux/drivers/net/wireless/ath/ath11k/
H A Dreg.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
12 #define ATH11K_2GHZ_CH01_11 REG_RULE(2412 - 10, 2462 + 10, 40, 0, 20, 0)
13 #define ATH11K_5GHZ_5150_5350 REG_RULE(5150 - 10, 5350 + 10, 80, 0, 30,\
15 #define ATH11K_5GHZ_5725_5850 REG_RULE(5725 - 10, 5850 + 10, 80, 0, 30,\
36 regd = rcu_dereference_rtnl(ar->hw->wiphy->regd); in ath11k_regdom_changes()
44 return memcmp(regd->alpha2, alpha2, 2) != 0; in ath11k_regdom_changes()
50 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); in ath11k_reg_notifier() local
53 struct ath11k *ar = hw->priv; in ath11k_reg_notifier()
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/openbmc/linux/drivers/net/ethernet/marvell/
H A Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
167 IS_HW_ERR = 1<<31, /* Interrupt HW Error */
169 IS_PA_TO_RX1 = 1<<29, /* Packet Arb Timeout Rx1 */
170 IS_PA_TO_RX2 = 1<<28, /* Packet Arb Timeout Rx2 */
171 IS_PA_TO_TX1 = 1<<27, /* Packet Arb Timeout Tx1 */
172 IS_PA_TO_TX2 = 1<<26, /* Packet Arb Timeout Tx2 */
215 /* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */
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/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dchannel.c25 struct ath_hw *ah = sc->sc_ah; in ath_set_channel()
27 struct ieee80211_hw *hw = sc->hw; in ath_set_channel() local
29 struct cfg80211_chan_def *chandef = &sc->cur_chan->chandef; in ath_set_channel()
30 struct ieee80211_channel *chan = chandef->chan; in ath_set_channel()
31 int pos = chan->hw_value; in ath_set_channel()
33 int old_pos = -1; in ath_set_channel()
36 if (test_bit(ATH_OP_INVALID, &common->op_flags)) in ath_set_channel()
37 return -EIO; in ath_set_channel()
39 if (ah->curchan) in ath_set_channel()
40 old_pos = ah->curchan - &ah->channels[0]; in ath_set_channel()
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/openbmc/linux/drivers/scsi/qla2xxx/
H A Dqla_nx2.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2014 QLogic Corporation
36 return readl((void __iomem *) (ha->nx_pcibase + addr)); in qla8044_rd_reg()
42 writel(val, (void __iomem *)((ha)->nx_pcibase + addr)); in qla8044_wr_reg()
49 struct qla_hw_data *ha = vha->hw; in qla8044_rd_direct()
62 struct qla_hw_data *ha = vha->hw; in qla8044_wr_direct()
73 struct qla_hw_data *ha = vha->hw; in qla8044_set_win_base()
75 qla8044_wr_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum), addr); in qla8044_set_win_base()
76 val = qla8044_rd_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum)); in qla8044_set_win_base()
92 struct qla_hw_data *ha = vha->hw; in qla8044_rd_reg_indirect()
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/openbmc/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_fw.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2014-2019 Intel Corporation
22 struct intel_uncore *uncore = gt->uncore; in guc_prepare_xfer()
29 if (GRAPHICS_VER_FULL(uncore->i915) < IP_VER(12, 50)) in guc_prepare_xfer()
36 if (IS_GEN9_LP(uncore->i915)) in guc_prepare_xfer()
41 if (GRAPHICS_VER(uncore->i915) == 9) { in guc_prepare_xfer()
60 return -ENOMEM; in guc_xfer_rsa_mmio()
74 intel_guc_ggtt_offset(guc, guc_fw->rsa_data)); in guc_xfer_rsa_vma()
79 /* Copy RSA signature from the fw image to HW for verification */
83 if (guc_fw->rsa_data) in guc_xfer_rsa()
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/openbmc/linux/drivers/iio/imu/bno055/
H A Dbno055_ser_core.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2021-2022 Istituto Italiano di Tecnologia
33 * +------+------+-----+-----+----- ... ----+
35 * +------+------+-----+-----+----- ... ----+
38 * +------+----------+
40 * +------+----------+
45 * sw resets - bno055 on serial bus basically requires the hw reset pin).
48 * +------+------+-----+-----+
50 * +------+------+-----+-----+
53 * +------+-----+----- ... ----+
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