| /openbmc/linux/Documentation/devicetree/bindings/media/ |
| H A D | mediatek,mdp3-rsz.yaml | 25 mediatek,gce-client-reg:
29 - description: phandle of GCE
30 - description: GCE subsys id
33 description: The register of client driver can be configured by gce with
34 4 arguments defined in this property. Each GCE subsys id is mapping to
35 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
37 mediatek,gce-events:
40 to gce. The event id is defined in the gce header
41 include/dt-bindings/gce/<chip>-gce.h of each chips.
50 - mediatek,gce-client-reg
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| H A D | mediatek,mdp3-rdma.yaml | 29 mediatek,gce-client-reg:
33 - description: phandle of GCE
34 - description: GCE subsys id
37 description: The register of client driver can be configured by gce with
38 4 arguments defined in this property. Each GCE subsys id is mapping to
39 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
41 mediatek,gce-events:
44 to gce. The event id is defined in the gce header
45 include/dt-bindings/gce/<chip>-gce.h of each chips.
70 - mediatek,gce-client-reg
[all …]
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| H A D | mediatek,mdp3-wrot.yaml | 25 mediatek,gce-client-reg:
29 - description: phandle of GCE
30 - description: GCE subsys id
33 description: The register of client driver can be configured by gce with
34 4 arguments defined in this property. Each GCE subsys id is mapping to
35 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
37 mediatek,gce-events:
40 to gce. The event id is defined in the gce header
41 include/dt-bindings/gce/<chip>-gce.h of each chips.
59 - mediatek,gce-client-reg
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/soc/mediatek/ |
| H A D | mediatek,ccorr.yaml | 25 mediatek,gce-client-reg:
29 - description: phandle of GCE
30 - description: GCE subsys id
33 description: The register of client driver can be configured by gce with
34 4 arguments defined in this property. Each GCE subsys id is mapping to
35 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
37 mediatek,gce-events:
40 to gce. The event id is defined in the gce header
41 include/dt-bindings/gce/<chip>-gce.h of each chips.
50 - mediatek,gce-client-reg
[all …]
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| H A D | mediatek,wdma.yaml | 26 mediatek,gce-client-reg:
30 - description: phandle of GCE
31 - description: GCE subsys id
34 description: The register of client driver can be configured by gce with
35 4 arguments defined in this property. Each GCE subsys id is mapping to
36 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
38 mediatek,gce-events:
41 to gce. The event id is defined in the gce header
42 include/dt-bindings/gce/<chip>-gce.h of each chips.
57 - mediatek,gce-client-reg
[all …]
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| H A D | mediatek,mutex.yaml | 56 mediatek,gce-events:
59 to gce. The event id is defined in the gce header
60 include/dt-bindings/gce/<chip>-gce.h of each chips.
63 mediatek,gce-client-reg:
67 - description: phandle of GCE
68 - description: GCE subsys id
71 description: The register of client driver can be configured by gce with
72 4 arguments defined in this property. Each GCE subsys id is mapping to
73 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
107 #include <dt-bindings/gce/mt8173-gce.h>
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| /openbmc/linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | mediatek,gce-mailbox.yaml | 4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml#
13 The Global Command Engine (GCE) is used to help read/write registers with
15 vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
21 - mediatek,mt6779-gce
22 - mediatek,mt8173-gce
23 - mediatek,mt8183-gce
24 - mediatek,mt8186-gce
25 - mediatek,mt8188-gce
26 - mediatek,mt8192-gce
27 - mediatek,mt8195-gce
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/ |
| H A D | mediatek,mmsys.yaml | 70 Using mailbox to communicate with GCE, it should have this
72 Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
76 mediatek,gce-client-reg:
78 The register of client driver can be configured by gce with 4 arguments
79 defined in this property, such as phandle of gce, subsys id,
82 register which is defined in the gce header
83 include/dt-bindings/gce/<chip>-gce.h.
103 #include <dt-bindings/gce/mt8173-gce.h>
111 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
112 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/display/mediatek/ |
| H A D | mediatek,mdp-rdma.yaml | 42 mediatek,gce-client-reg:
44 The register of display function block to be set by gce. There are 4 arguments,
45 such as gce node, subsys id, offset and register size. The subsys id that is
46 mapping to the register of display function blocks is defined in the gce header
47 include/dt-bindings/gce/<chip>-gce.h of each chips.
51 - description: phandle of GCE
52 - description: GCE subsys id
63 - mediatek,gce-client-reg
72 #include <dt-bindings/gce/mt8195-gce.h>
86 mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
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| H A D | mediatek,postmask.yaml | 47 mediatek,gce-client-reg:
48 description: The register of client driver can be configured by gce with
49 4 arguments defined in this property, such as phandle of gce, subsys id,
50 register offset and size. Each GCE subsys id is mapping to a client
51 defined in the header include/dt-bindings/gce/<chip>-gce.h.
69 #include <dt-bindings/gce/mt8192-gce.h>
81 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>;
|
| H A D | mediatek,wdma.yaml | 50 mediatek,gce-client-reg:
51 description: The register of client driver can be configured by gce with
52 4 arguments defined in this property, such as phandle of gce, subsys id,
53 register offset and size. Each GCE subsys id is mapping to a client
54 defined in the header include/dt-bindings/gce/<chip>-gce.h.
73 #include <dt-bindings/gce/mt8173-gce.h>
87 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>;
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| H A D | mediatek,dither.yaml | 50 mediatek,gce-client-reg:
51 description: The register of client driver can be configured by gce with
52 4 arguments defined in this property, such as phandle of gce, subsys id,
53 register offset and size. Each GCE subsys id is mapping to a client
54 defined in the header include/dt-bindings/gce/<chip>-gce.h.
72 #include <dt-bindings/gce/mt8183-gce.h>
84 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x2000 0x1000>;
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| H A D | mediatek,ccorr.yaml | 49 mediatek,gce-client-reg:
50 description: The register of client driver can be configured by gce with
51 4 arguments defined in this property, such as phandle of gce, subsys id,
52 register offset and size. Each GCE subsys id is mapping to a client
53 defined in the header include/dt-bindings/gce/<chip>-gce.h.
71 #include <dt-bindings/gce/mt8183-gce.h>
83 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xf000 0x1000>;
|
| H A D | mediatek,gamma.yaml | 54 mediatek,gce-client-reg:
55 description: The register of client driver can be configured by gce with
56 4 arguments defined in this property, such as phandle of gce, subsys id,
57 register offset and size. Each GCE subsys id is mapping to a client
58 defined in the header include/dt-bindings/gce/<chip>-gce.h.
76 #include <dt-bindings/gce/mt8173-gce.h>
88 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x6000 0x1000>;
|
| H A D | mediatek,aal.yaml | 55 mediatek,gce-client-reg:
56 description: The register of client driver can be configured by gce with
57 4 arguments defined in this property, such as phandle of gce, subsys id,
58 register offset and size. Each GCE subsys id is mapping to a client
59 defined in the header include/dt-bindings/gce/<chip>-gce.h.
77 #include <dt-bindings/gce/mt8173-gce.h>
89 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>;
|
| H A D | mediatek,ovl-2l.yaml | 52 mediatek,gce-client-reg:
53 description: The register of client driver can be configured by gce with
54 4 arguments defined in this property, such as phandle of gce, subsys id,
55 register offset and size. Each GCE subsys id is mapping to a client
56 defined in the header include/dt-bindings/gce/<chip>-gce.h.
75 #include <dt-bindings/gce/mt8183-gce.h>
89 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>;
|
| H A D | mediatek,color.yaml | 58 mediatek,gce-client-reg:
59 description: The register of client driver can be configured by gce with
60 4 arguments defined in this property, such as phandle of gce, subsys id,
61 register offset and size. Each GCE subsys id is mapping to a client
62 defined in the header include/dt-bindings/gce/<chip>-gce.h.
80 #include <dt-bindings/gce/mt8173-gce.h>
92 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x3000 0x1000>;
|
| H A D | mediatek,dsc.yaml | 41 mediatek,gce-client-reg:
43 The register of client driver can be configured by gce with 4 arguments
44 defined in this property, such as phandle of gce, subsys id,
47 register which is defined in the gce header
48 include/dt-bindings/gce/<chip>-gce.h.
66 #include <dt-bindings/gce/mt8195-gce.h>
78 mediatek,gce-client-reg = <&gce1 SUBSYS_1c00XXXX 0x9000 0x1000>;
|
| H A D | mediatek,ovl.yaml | 68 mediatek,gce-client-reg:
69 description: The register of client driver can be configured by gce with
70 4 arguments defined in this property, such as phandle of gce, subsys id,
71 register offset and size. Each GCE subsys id is mapping to a client
72 defined in the header include/dt-bindings/gce/<chip>-gce.h.
91 #include <dt-bindings/gce/mt8173-gce.h>
105 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;
|
| H A D | mediatek,rdma.yaml | 81 mediatek,gce-client-reg:
82 description: The register of client driver can be configured by gce with
83 4 arguments defined in this property, such as phandle of gce, subsys id,
84 register offset and size. Each GCE subsys id is mapping to a client
85 defined in the header include/dt-bindings/gce/<chip>-gce.h.
104 #include <dt-bindings/gce/mt8173-gce.h>
119 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>;
|
| H A D | mediatek,ethdr.yaml | 99 mediatek,gce-client-reg:
103 description: The register of display function block to be set by gce.
104 There are 4 arguments in this property, gce node, subsys id, offset and
105 register size. The subsys id is defined in the gce header of each chips
106 include/dt-bindings/gce/<chip>-gce.h, mapping to the register of display
117 - mediatek,gce-client-reg
125 #include <dt-bindings/gce/mt8195-gce.h>
145 mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x4000 0x1000>,
|
| H A D | mediatek,merge.yaml | 68 mediatek,gce-client-reg:
69 description: The register of client driver can be configured by gce with
70 4 arguments defined in this property, such as phandle of gce, subsys id,
71 register offset and size. Each GCE subsys id is mapping to a client
72 defined in the header include/dt-bindings/gce/<chip>-gce.h.
|
| /openbmc/linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8173.dtsi | 14 #include <dt-bindings/gce/mt8173-gce.h>
617 gce: mailbox@10212000 { label
618 compatible = "mediatek,mt8173-gce";
622 clock-names = "gce";
995 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
996 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
997 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
1072 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;
1082 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>;
1092 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>;
[all …]
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| H A D | mt8183.dtsi | 9 #include <dt-bindings/gce/mt8183-gce.h>
1066 gce: mailbox@10238000 { label
1067 compatible = "mediatek,mt8183-gce";
1072 clock-names = "gce";
1659 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
1660 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
1661 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
1667 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
1668 mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>,
1674 mboxes = <&gce 20 CMDQ_THR_PRIO_LOWEST 0>,
[all …]
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| /openbmc/linux/include/dt-bindings/gce/ |
| H A D | mt8173-gce.h | 11 /* GCE HW thread priority */
15 /* GCE SUBSYS */
20 /* GCE HW EVENT */
|