11c82407aSHoulong Wei /* SPDX-License-Identifier: GPL-2.0 */ 21c82407aSHoulong Wei /* 31c82407aSHoulong Wei * Copyright (c) 2018 MediaTek Inc. 41c82407aSHoulong Wei * Author: Houlong Wei <houlong.wei@mediatek.com> 51c82407aSHoulong Wei * 61c82407aSHoulong Wei */ 71c82407aSHoulong Wei 81c82407aSHoulong Wei #ifndef _DT_BINDINGS_GCE_MT8173_H 91c82407aSHoulong Wei #define _DT_BINDINGS_GCE_MT8173_H 101c82407aSHoulong Wei 111c82407aSHoulong Wei /* GCE HW thread priority */ 121c82407aSHoulong Wei #define CMDQ_THR_PRIO_LOWEST 0 131c82407aSHoulong Wei #define CMDQ_THR_PRIO_HIGHEST 1 141c82407aSHoulong Wei 151c82407aSHoulong Wei /* GCE SUBSYS */ 161c82407aSHoulong Wei #define SUBSYS_1400XXXX 1 171c82407aSHoulong Wei #define SUBSYS_1401XXXX 2 181c82407aSHoulong Wei #define SUBSYS_1402XXXX 3 191c82407aSHoulong Wei 201c82407aSHoulong Wei /* GCE HW EVENT */ 211c82407aSHoulong Wei #define CMDQ_EVENT_DISP_OVL0_SOF 11 221c82407aSHoulong Wei #define CMDQ_EVENT_DISP_OVL1_SOF 12 231c82407aSHoulong Wei #define CMDQ_EVENT_DISP_RDMA0_SOF 13 241c82407aSHoulong Wei #define CMDQ_EVENT_DISP_RDMA1_SOF 14 251c82407aSHoulong Wei #define CMDQ_EVENT_DISP_RDMA2_SOF 15 261c82407aSHoulong Wei #define CMDQ_EVENT_DISP_WDMA0_SOF 16 271c82407aSHoulong Wei #define CMDQ_EVENT_DISP_WDMA1_SOF 17 281c82407aSHoulong Wei #define CMDQ_EVENT_DISP_OVL0_EOF 39 291c82407aSHoulong Wei #define CMDQ_EVENT_DISP_OVL1_EOF 40 301c82407aSHoulong Wei #define CMDQ_EVENT_DISP_RDMA0_EOF 41 311c82407aSHoulong Wei #define CMDQ_EVENT_DISP_RDMA1_EOF 42 321c82407aSHoulong Wei #define CMDQ_EVENT_DISP_RDMA2_EOF 43 331c82407aSHoulong Wei #define CMDQ_EVENT_DISP_WDMA0_EOF 44 341c82407aSHoulong Wei #define CMDQ_EVENT_DISP_WDMA1_EOF 45 351c82407aSHoulong Wei #define CMDQ_EVENT_MUTEX0_STREAM_EOF 53 361c82407aSHoulong Wei #define CMDQ_EVENT_MUTEX1_STREAM_EOF 54 371c82407aSHoulong Wei #define CMDQ_EVENT_MUTEX2_STREAM_EOF 55 381c82407aSHoulong Wei #define CMDQ_EVENT_MUTEX3_STREAM_EOF 56 391c82407aSHoulong Wei #define CMDQ_EVENT_MUTEX4_STREAM_EOF 57 401c82407aSHoulong Wei #define CMDQ_EVENT_DISP_RDMA0_UNDERRUN 63 411c82407aSHoulong Wei #define CMDQ_EVENT_DISP_RDMA1_UNDERRUN 64 421c82407aSHoulong Wei #define CMDQ_EVENT_DISP_RDMA2_UNDERRUN 65 431c82407aSHoulong Wei 441c82407aSHoulong Wei #endif 45