| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cmd_errata.c | 21 * erratum document, the value at each offset should be 2.
42 printf("Work-around for Erratum A004849 is not enabled\n"); in check_erratum_a4849()
53 * For P4080, the erratum document says that the value at offset 0x108 in check_erratum_a4849()
63 printf("Work-around for Erratum A004849 is not enabled\n"); in check_erratum_a4849()
67 /* Everything matches, so the erratum work-around was applied */ in check_erratum_a4849()
69 printf("Work-around for Erratum A004849 enabled\n"); in check_erratum_a4849()
103 printf("Work-around for Erratum A004580 is " in check_erratum_a4580()
110 /* Everything matches, so the erratum work-around was applied */ in check_erratum_a4580()
112 printf("Work-around for Erratum A004580 enabled\n"); in check_erratum_a4580()
126 puts("Work-around for Erratum A007212 enabled\n"); in check_erratum_a007212()
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| H A D | cpu_init_early.c | 116 * Work Around for IFC Erratum A-003549. This issue is P1010 in cpu_init_early_f()
127 * Work Around for IFC Erratum A003399, issue will hit only when execution in cpu_init_early_f()
153 * access (Erratum IFC-A002769) in cpu_init_early_f()
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| /openbmc/linux/arch/arm64/kernel/ |
| H A D | cpu_errata.c | 101 /* ... or if the system is affected by an erratum */ in cpu_enable_trap_ctr_access()
498 .desc = "ARM erratum 832075",
508 .desc = "ARM erratum 834220",
517 .desc = "ARM erratum 843419",
526 .desc = "ARM erratum 845719",
541 .desc = "Cavium erratum 27456",
548 .desc = "Cavium erratum 30115",
562 .desc = "Qualcomm Technologies Falkor/Kryo erratum 1003",
571 .desc = "Qualcomm erratum 1009, or ARM erratum 1286807, 2441009",
581 .desc = "ARM erratum 858921",
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| /openbmc/linux/arch/arm64/ |
| H A D | Kconfig | 427 implementation suffers from an additional erratum where hardware
445 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
467 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
470 Under certain conditions this erratum can cause a clean line eviction
489 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
495 address, then this erratum might cause a clean cache line to be
512 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
517 maintenance operation to the same address, then this erratum might
533 erratum 832075 on Cortex-A57 parts up to r1p2.
552 erratum 834220 on Cortex-A57 parts up to r1p2.
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| /openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/ |
| H A D | Kconfig | 70 Workaround for DDR erratum A008850
75 Workaround for USB PHY erratum A008997
80 Workaround for USB PHY erratum A009007
85 Workaround for USB PHY erratum A009008
90 Workaround for USB PHY erratum A009798
93 bool "Workaround for PCIe erratum A010315"
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| /openbmc/linux/Documentation/devicetree/bindings/timer/ |
| H A D | arm,arch_timer.yaml | 71 allwinner,erratum-unknown1:
73 description: Indicates the presence of an erratum found in Allwinner SoCs,
77 fsl,erratum-a008585:
79 description: Indicates the presence of QorIQ erratum A-008585, which says
84 hisilicon,erratum-161010101:
86 description: Indicates the presence of Hisilicon erratum 161010101, which
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| /openbmc/linux/arch/arm/ |
| H A D | Kconfig | 630 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
639 r1p* erratum. If a code sequence containing an ARM/Thumb
656 erratum. For very specific sequences of memory operations, it is
672 erratum. Any asynchronous access to the L2 cache may encounter a
687 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
703 (r2p0..r2p2) erratum. Under certain conditions, specific to the
721 r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
731 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
733 As a consequence of this erratum, some TLB entries which should be
744 (r2p*) erratum. Under very rare conditions, a faulty
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| /openbmc/linux/arch/arm/mach-omap2/ |
| H A D | dma.c | 89 * Erratum ID: Not Available in configure_dma_errata()
98 * Erratum ID: Not Available in configure_dma_errata()
119 * Erratum ID: i378: OMAP2+: sDMA Channel is not disabled in configure_dma_errata()
127 * Erratum ID: i541: sDMA FIFO draining does not finish in configure_dma_errata()
138 * Erratum ID: i88 : Special programming model needed to disable DMA in configure_dma_errata()
147 * Erratum 3.2/3.3: sometimes 0 is returned if CSAC/CDAC is in configure_dma_errata()
153 * Erratum ID: Not Available in configure_dma_errata()
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| /openbmc/linux/Documentation/admin-guide/hw-vuln/ |
| H A D | multihit.rst | 4 iTLB multihit is an erratum where some processors may incur a machine check
9 exploit this erratum to perform a denial of service attack.
15 Variations of this erratum are present on most Intel Core and Xeon processor
16 models. The erratum is not present on:
62 Attacks against the iTLB multihit erratum can be mounted from malicious
91 Enumeration of the erratum
107 This erratum can be mitigated by restricting the use of large page sizes to
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| /openbmc/linux/drivers/iommu/arm/arm-smmu/ |
| H A D | arm-smmu-impl.c | 61 * Cavium CN88xx erratum #27704. in cavium_cfg_probe()
66 dev_notice(smmu->dev, "\tenabling workaround for Cavium erratum 27704\n"); in cavium_cfg_probe()
154 * Marvell Armada-AP806 erratum #582743. in mrvl_mmu500_readq()
164 * Marvell Armada-AP806 erratum #582743. in mrvl_mmu500_writeq()
174 * Armada-AP806 erratum #582743. in mrvl_mmu500_cfg_probe()
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| /openbmc/linux/drivers/clocksource/ |
| H A D | Kconfig | 330 bool "Workaround for Freescale/NXP Erratum A-008585"
335 This option enables a workaround for Freescale/NXP Erratum
338 fsl,erratum-a008585 property is found in the timer node.
341 bool "Workaround for Hisilicon Erratum 161010101"
346 This option enables a workaround for Hisilicon Erratum
347 161010101. The workaround will be active if the hisilicon,erratum-161010101
351 bool "Workaround for Cortex-A73 erratum 858921"
362 bool "Workaround for Allwinner A64 erratum UNKNOWN1"
369 allwinner,erratum-unknown1 property is found in the timer node.
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| H A D | arm_arch_timer.c | 304 * Theoretically the erratum should not occur more than twice in succession
460 .id = "fsl,erratum-a008585",
461 .desc = "Freescale erratum a005858",
471 .id = "hisilicon,erratum-161010101",
472 .desc = "HiSilicon erratum 161010101",
481 .desc = "HiSilicon erratum 161010101",
492 .desc = "ARM erratum 858921",
502 .id = "allwinner,erratum-unknown1",
503 .desc = "Allwinner erratum UNKNOWN1",
514 .desc = "ARM erratum 1418040",
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| /openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | Kconfig | 325 bool "Workaround for USB PHY erratum A008997"
330 Workaround for USB PHY erratum A009007
333 bool "Workaround for USB PHY erratum A009008"
336 bool "Workaround for USB PHY erratum A009798"
339 bool "Workaround for PCIe erratum A010315"
342 bool "Workaround for PIN MUX erratum A010539"
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| /openbmc/linux/arch/arm/mach-tegra/ |
| H A D | reset-handler.S | 158 orr r0, r0, #1 << 14 @ erratum 716044
161 orr r0, r0, #1 << 4 @ erratum 742230
162 orr r0, r0, #1 << 11 @ erratum 751472
174 orr r0, r0, #1 << 6 @ erratum 743622
175 orr r0, r0, #1 << 11 @ erratum 751472
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| /openbmc/linux/tools/perf/util/ |
| H A D | amd-sample-raw.c | 47 * Erratum #1238 workaround is to ignore MSRC001_1030[IbsIcMiss] in pr_ibs_fetch_ctl()
48 * Erratum #1347 workaround is to use table provided in erratum in pr_ibs_fetch_ctl()
162 * Erratum #1293 in pr_ibs_op_data3()
205 * Erratum #1293: ignore op_data2 if DcMissNoMabAlloc or SwPf are set in amd_dump_ibs_op()
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| /openbmc/linux/arch/arm64/include/asm/ |
| H A D | arch_gicv3.h | 45 * Cavium ThunderX erratum 23154
51 * Erratum 38545
63 * erratum 23154 is not applicable.
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| /openbmc/linux/Documentation/devicetree/bindings/net/nfc/ |
| H A D | ti,trf7970a.yaml | 30 Specify that the trf7970a being used has the "EN2 RF" erratum
38 Specify that the trf7970a being used has the "IRQ Status Read" erratum
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| /openbmc/linux/drivers/hwtracing/coresight/ |
| H A D | coresight-trbe.c | 73 * TRBE erratum list
78 * a given CPU is affected by the erratum. Unlike the other erratum
85 * TRBE erratum. We map the given cpucap into a TRBE internal number
90 * - Streamlined detection of erratum across the system
375 * When the TRBE is affected by an erratum that could make it in trbe_min_trace_buf_size()
693 * erratum which forces the PAGE_SIZE alignment on the TRBPTR, and thus in trbe_get_trace_size()
695 * 64bytes. Thus we ignore the potential triggering of the erratum in trbe_get_trace_size()
716 * If the TRBE is affected by the following erratum, we must fill in trbe_get_trace_size()
884 * beginning of the ring-buffer (normal-BASE). But with the erratum, in trbe_apply_work_around_before_enable()
910 * driver to move it, assuming that the erratum was triggered and in trbe_apply_work_around_before_enable()
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| /openbmc/u-boot/drivers/spi/ |
| H A D | kirkwood_spi.c | 283 * Erratum description: (Erratum NO. FE-9144572) The device in mvebu_spi_50mhz_ac_timing_erratum()
285 * However, due to this erratum, when the device core clock is in mvebu_spi_50mhz_ac_timing_erratum()
289 * Erratum Workaround: in mvebu_spi_50mhz_ac_timing_erratum()
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| /openbmc/linux/arch/mips/include/asm/ |
| H A D | timex.h | 43 * On R4000/R4400 an erratum exists such that if the cycle counter is
47 * There is a suggested workaround and also the erratum can't strike if
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| /openbmc/linux/Documentation/devicetree/bindings/i2c/ |
| H A D | i2c-mpc.yaml | 50 fsl,i2c-erratum-a004447:
53 Indicates the presence of QorIQ erratum A-004447, which
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| /openbmc/u-boot/arch/arm/cpu/armv8/ |
| H A D | generic_timer.c | 25 * FSL erratum A-008585 says that the ARM generic timer counter "has the
51 * This erratum sometimes flips the lower 11 bits of the counter value
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | fsl-fman.txt | 113 - fsl,erratum-a050385
117 erratum A050385 which indicates that DMA transactions that are
297 - fsl,erratum-a009885
301 erratum describing that the contents of MDIO_DATA may
306 - fsl,erratum-a011043
309 Definition: Indicates the presence of the A011043 erratum
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| /openbmc/linux/arch/x86/kernel/cpu/ |
| H A D | amd.c | 73 static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) in cpu_has_amd_erratum() argument
75 int osvw_id = *erratum++; in cpu_has_amd_erratum()
95 while ((range = *erratum++)) in cpu_has_amd_erratum()
771 /* F16h erratum 793, CVE-2013-6885 */ in early_init_amd()
776 * Check whether the machine is affected by erratum 400. This is in early_init_amd()
826 * (AMD Erratum #110, docId: 25759). in init_amd_k8()
890 * Apply erratum 665 fix unconditionally so machines without a BIOS in init_amd_ln()
980 * Work around Erratum 1386. The XSAVES instruction malfunctions in in fix_erratum_1386()
1027 /* Erratum 1076: CPB feature bit not being set in CPUID. */ in init_amd_zen1()
1190 * susceptible to erratum #1054 "Instructions Retired Performance in init_amd()
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| /openbmc/linux/arch/powerpc/boot/dts/fsl/ |
| H A D | qoriq-fman3l-0.dtsi | 82 fsl,erratum-a009885;
90 fsl,erratum-a009885;
|