10a37cf8fSYork Sunconfig ARCH_LS1021A 24a444176SYork Sun bool 358008cbaSMichal Simek select SYS_FSL_DDR_BE if SYS_FSL_DDR 458008cbaSMichal Simek select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR 5ba1b6fb5SYork Sun select SYS_FSL_ERRATUM_A008378 6ba1b6fb5SYork Sun select SYS_FSL_ERRATUM_A008407 7*15809705SAlison Wang select SYS_FSL_ERRATUM_A008850 8e10d1142SRan Wang select SYS_FSL_ERRATUM_A008997 90e8a4264SRan Wang select SYS_FSL_ERRATUM_A009007 1083fa7118SRan Wang select SYS_FSL_ERRATUM_A009008 11ba1b6fb5SYork Sun select SYS_FSL_ERRATUM_A009663 12c1853f6fSRan Wang select SYS_FSL_ERRATUM_A009798 13ba1b6fb5SYork Sun select SYS_FSL_ERRATUM_A009942 140a37cf8fSYork Sun select SYS_FSL_ERRATUM_A010315 1563b2316cSAshish Kumar select SYS_FSL_HAS_CCI400 16d26e34c4SYork Sun select SYS_FSL_HAS_DDR3 if SYS_FSL_DDR 17d26e34c4SYork Sun select SYS_FSL_HAS_DDR4 if SYS_FSL_DDR 182c2e2c9eSYork Sun select SYS_FSL_HAS_SEC 192c2e2c9eSYork Sun select SYS_FSL_SEC_COMPAT_5 2090b80386SYork Sun select SYS_FSL_SEC_LE 2158008cbaSMichal Simek select SYS_FSL_SRDS_1 2258008cbaSMichal Simek select SYS_HAS_SERDES 2358008cbaSMichal Simek imply CMD_PCI 24fedb428cSSimon Glass imply SCSI 259fd95ef0STuomas Tynkkynen imply SCSI_AHCI 265e8bd7e1SYork Sun 27fb2bf8c2SYork Sunmenu "LS102xA architecture" 28fb2bf8c2SYork Sun depends on ARCH_LS1021A 29fb2bf8c2SYork Sun 3019538f30SHou Zhiqiangconfig FSL_PCIE_COMPAT 3119538f30SHou Zhiqiang string "PCIe compatible of Kernel DT" 3219538f30SHou Zhiqiang depends on PCIE_LAYERSCAPE 3319538f30SHou Zhiqiang default "fsl,ls1021a-pcie" if ARCH_LS1021A 3419538f30SHou Zhiqiang help 3519538f30SHou Zhiqiang This compatible is used to find pci controller node in Kernel DT 3619538f30SHou Zhiqiang to complete fixup. 3719538f30SHou Zhiqiang 385e8bd7e1SYork Sunconfig LS1_DEEP_SLEEP 394a444176SYork Sun bool "Deep sleep" 404a444176SYork Sun depends on ARCH_LS1021A 41fb2bf8c2SYork Sun 42b4b60d06SYork Sunconfig MAX_CPUS 43b4b60d06SYork Sun int "Maximum number of CPUs permitted for LS102xA" 44b4b60d06SYork Sun depends on ARCH_LS1021A 45b4b60d06SYork Sun default 2 46b4b60d06SYork Sun help 47b4b60d06SYork Sun Set this number to the maximum number of possible CPUs in the SoC. 48b4b60d06SYork Sun SoCs may have multiple clusters with each cluster may have multiple 49b4b60d06SYork Sun ports. If some ports are reserved but higher ports are used for 50b4b60d06SYork Sun cores, count the reserved ports. This will allocate enough memory 51b4b60d06SYork Sun in spin table to properly handle all cores. 52b4b60d06SYork Sun 5372ccd31eSYork Sunconfig SECURE_BOOT 5472ccd31eSYork Sun bool "Secure Boot" 5572ccd31eSYork Sun help 5672ccd31eSYork Sun Enable Freescale Secure Boot feature. Normally selected 5772ccd31eSYork Sun by defconfig. If unsure, do not change. 5872ccd31eSYork Sun 5963b2316cSAshish Kumarconfig SYS_CCI400_OFFSET 6063b2316cSAshish Kumar hex "Offset for CCI400 base" 6163b2316cSAshish Kumar depends on SYS_FSL_HAS_CCI400 6263b2316cSAshish Kumar default 0x180000 6363b2316cSAshish Kumar help 6463b2316cSAshish Kumar Offset for CCI400 base. 6563b2316cSAshish Kumar CCI400 base addr = CCSRBAR + CCI400_OFFSET 6663b2316cSAshish Kumar 67*15809705SAlison Wangconfig SYS_FSL_ERRATUM_A008850 68*15809705SAlison Wang bool 69*15809705SAlison Wang help 70*15809705SAlison Wang Workaround for DDR erratum A008850 71*15809705SAlison Wang 72e10d1142SRan Wangconfig SYS_FSL_ERRATUM_A008997 73e10d1142SRan Wang bool 74e10d1142SRan Wang help 75e10d1142SRan Wang Workaround for USB PHY erratum A008997 76e10d1142SRan Wang 770e8a4264SRan Wangconfig SYS_FSL_ERRATUM_A009007 780e8a4264SRan Wang bool 790e8a4264SRan Wang help 800e8a4264SRan Wang Workaround for USB PHY erratum A009007 810e8a4264SRan Wang 8283fa7118SRan Wangconfig SYS_FSL_ERRATUM_A009008 8383fa7118SRan Wang bool 8483fa7118SRan Wang help 8583fa7118SRan Wang Workaround for USB PHY erratum A009008 8683fa7118SRan Wang 87c1853f6fSRan Wangconfig SYS_FSL_ERRATUM_A009798 88c1853f6fSRan Wang bool 89c1853f6fSRan Wang help 90c1853f6fSRan Wang Workaround for USB PHY erratum A009798 91c1853f6fSRan Wang 92fb2bf8c2SYork Sunconfig SYS_FSL_ERRATUM_A010315 93fb2bf8c2SYork Sun bool "Workaround for PCIe erratum A010315" 94fb2bf8c2SYork Sun 9563b2316cSAshish Kumarconfig SYS_FSL_HAS_CCI400 9663b2316cSAshish Kumar bool 9763b2316cSAshish Kumar 98f534b8f5SYork Sunconfig SYS_FSL_SRDS_1 99f534b8f5SYork Sun bool 100f534b8f5SYork Sun 101f534b8f5SYork Sunconfig SYS_FSL_SRDS_2 102f534b8f5SYork Sun bool 103f534b8f5SYork Sun 104f534b8f5SYork Sunconfig SYS_HAS_SERDES 105f534b8f5SYork Sun bool 106f534b8f5SYork Sun 10725af7dc1SYork Sunconfig SYS_FSL_IFC_BANK_COUNT 10825af7dc1SYork Sun int "Maximum banks of Integrated flash controller" 10925af7dc1SYork Sun depends on ARCH_LS1021A 11025af7dc1SYork Sun default 8 11125af7dc1SYork Sun 112ba1b6fb5SYork Sunconfig SYS_FSL_ERRATUM_A008407 113ba1b6fb5SYork Sun bool 114ba1b6fb5SYork Sun 115fb2bf8c2SYork Sunendmenu 116