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/openbmc/u-boot/doc/device-tree-bindings/serial/
H A Dmxc-serial.txt4 - compatible: must be "fsl,imx7d-uart"
5 - reg: start address and size of the registers
8 - fsl,dte-mode: use DTE mode
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dfsl-imx-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <festevam@gmail.com>
13 - $ref: serial.yaml#
14 - $ref: rs485.yaml#
19 - const: fsl,imx1-uart
20 - const: fsl,imx21-uart
21 - items:
[all …]
/openbmc/qemu/hw/i386/
H A Damd_iommu.c2 * QEMU emulation of AMD IOMMU (AMD-Vi)
4 * Copyright (C) 2011 Eduard - Gabriel Munteanu
30 #include "qemu/error-report.h"
33 #include "hw/i386/apic-msidef.h"
34 #include "hw/qdev-properties.h"
37 /* used AMD-Vi MMIO registers */
63 AMDVIState *iommu_state; /* AMDVI - one per machine */
83 if (s->xtsup) { in amdvi_extended_feature_register()
94 stq_le_p(&s->mmior[addr], val); in amdvi_set_quad()
95 stq_le_p(&s->romask[addr], romask); in amdvi_set_quad()
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2014-2022 Toradex
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pwm/pwm.h>
22 compatible = "pwm-backlight";
23 brightness-levels = <0 45 63 88 119 158 203 255>;
24 default-brightness-level = <4>;
25 enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_gpio_bl_on>;
[all …]
H A Dimx6dl-eckelmann-ci4x10.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
15 compatible = "eckelmann,imx6dl-ci4x10", "fsl,imx6dl";
18 stdout-path = &uart3;
26 rmii_clk: clock-rmii {
28 compatible = "fixed-clock";
29 #clock-cells = <0>;
30 clock-frequency = <50000000>;
31 clock-output-names = "enet_ref_pad";
[all …]
H A Dimx6ull-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2018-2022 Toradex
16 compatible = "pwm-backlight";
17 brightness-levels = <0 4 8 16 32 64 128 255>;
18 default-brightness-level = <6>;
19 enable-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_gpio_bl_on>;
22 power-supply = <&reg_3v3>;
28 compatible = "gpio-usb-b-connector", "usb-b-connector";
[all …]
H A Dimx6qdl-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Copyright 2014-2022 Toradex
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pwm/pwm.h>
16 compatible = "pwm-backlight";
17 brightness-levels = <0 45 63 88 119 158 203 255>;
18 default-brightness-level = <4>;
19 enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_gpio_bl_on>;
[all …]
H A Dmba6ulx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 model = "TQ-Systems MBA6ULx Baseboard";
18 stdout-path = &uart1;
22 compatible = "pwm-backlight";
23 power-supply = <&reg_mba6ul_3v3>;
24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>;
29 compatible = "gpio-beeper";
33 gpio_buttons: gpio-keys {
[all …]
H A Dimx6q-arm2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
13 compatible = "fsl,imx6q-arm2", "fsl,imx6q";
20 reg_3p3v: regulator-3p3v {
21 compatible = "regulator-fixed";
22 regulator-name = "3P3V";
23 regulator-min-microvolt = <3300000>;
24 regulator-max-microvolt = <3300000>;
25 regulator-always-on;
[all …]
H A Dimx53-cx9020.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * based on imx53-qsb.dts
7 /dts-v1/;
15 stdout-path = &uart2;
24 display-0 {
25 #address-cells =<1>;
26 #size-cells = <0>;
27 compatible = "fsl,imx-parallel-display";
28 interface-pix-fmt = "rgb24";
29 pinctrl-names = "default";
[all …]
H A Dimx7-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2016-2022 Toradex
6 #include <dt-bindings/pwm/pwm.h>
15 brightness-levels = <0 45 63 88 119 158 203 255>;
16 compatible = "pwm-backlight";
17 default-brightness-level = <4>;
18 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_bl_on>;
21 power-supply = <&reg_module_3v3>;
[all …]
/openbmc/linux/drivers/i2c/busses/
H A Di2c-sh_mobile.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-19 Wolfram Sang <wsa@sang-engineering.com>
8 * Portions of the code based on out-of-tree driver i2c-sh7343.c
15 #include <linux/dma-mapping.h>
32 /* IRQ: DTE WAIT */
39 /* IRQ: DTE WAIT WAIT */
40 /* ICIC: -DTE */
46 /* IRQ: DTE WAIT WAIT WAIT */
47 /* ICIC: -DTE */
51 /* 3 bytes or more, +---------+ gets repeated */
[all …]
/openbmc/linux/include/uapi/linux/
H A Datmsap.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* atmsap.h - ATM Service Access Point addressing definitions */
4 /* Written 1995-1999 by Werner Almesberger, EPFL LRC/ICA */
24 #define ATM_L2_ISO1745 0x01 /* Basic mode ISO 1745 */
25 #define ATM_L2_Q291 0x02 /* ITU-T Q.291 (Rec. I.441) */
26 #define ATM_L2_X25_LL 0x06 /* ITU-T X.25, link layer */
27 #define ATM_L2_X25_ML 0x07 /* ITU-T X.25, multilink */
28 #define ATM_L2_LAPB 0x08 /* Extended LAPB, half-duplex (Rec. T.71) */
33 #define ATM_L2_X75 0x0d /* ITU-T X.75, SLP */
34 #define ATM_L2_Q922 0x0e /* ITU-T Q.922 */
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/openbmc/u-boot/board/toradex/apalis_imx6/
H A DKconfig32 default "-512"
38 pf0100_otp_prog - Program the OTP fuses on the PMIC PF0100
46 The UARTs must be used in DCE mode, RTS/CTS are swapped and
48 This option configures DCE mode unconditionally. Whithout this
49 option the config block stating V1.0 HW selects DCE mode,
50 otherwise the UARTs are configuered in DTE mode.
/openbmc/u-boot/arch/arm/dts/
H A Dimx6ull-colibri.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
12 compatible = "toradex,imx6ull-colibri", "fsl,imx6ull";
15 stdout-path = &uart1;
18 reg_module_3v3: regulator-module-3v3 {
19 compatible = "regulator-fixed";
20 regulator-always-on;
21 regulator-name = "+V3.3";
22 regulator-min-microvolt = <3300000>;
[all …]
H A Dimx6ull-14x14-evk.dts9 /dts-v1/;
15 compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull";
18 stdout-path = &uart1;
26 compatible = "pwm-backlight";
28 brightness-levels = <0 4 8 16 32 64 128 255>;
29 default-brightness-level = <6>;
34 compatible = "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "regulator-fixed";
[all …]
H A Dimx7-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * Copyright 2016-2019 Toradex AG
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
11 pinctrl-names = "default", "gpio";
12 pinctrl-0 = <&pinctrl_i2c1>;
13 pinctrl-1 = <&pinctrl_i2c1_gpio>;
14 sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
15 scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
25 pinctrl-names = "default", "gpio";
[all …]
H A Dimx53-cx9020.dts1 // SPDX-License-Identifier: GPL-2.0+ OR X11
8 /dts-v1/;
17 model = "Beckhoff CX9020-0100 i.MX53";
18 compatible = "fsl,imx53-qsb", "fsl,imx53";
21 stdout-path = &uart2;
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_hog>;
29 imx53-qsb {
185 pinctrl-names = "default";
186 uart-has-rtscts;
[all …]
/openbmc/linux/drivers/net/wan/
H A Dwanxl.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * - Only DTE (external clock) support with NRZ and NRZI encodings
10 * - wanXL100 will require minor driver modifications, no access to hw
29 #include <linux/dma-mapping.h>
42 /* MAILBOX #1 - PUTS COMMANDS */
45 #define MBX1_CMD_BSWAP 0x8C000001 /* little-endian Byte Swap Mode */
47 #define MBX1_CMD_BSWAP 0x8C000000 /* big-endian Byte Swap Mode */
50 /* MAILBOX #2 - DRAM SIZE */
57 int node; /* physical port #0 - 3 */
78 struct port ports[]; /* 1 - 4 port structures follow */
[all …]
/openbmc/linux/drivers/iommu/amd/
H A Diommu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
8 #define pr_fmt(fmt) "AMD-Vi: " fmt
14 #include <linux/pci-ats.h>
19 #include <linux/dma-map-ops.h>
20 #include <linux/dma-direct.h>
21 #include <linux/iommu-helper.h>
23 #include <linux/amd-iommu.h>
30 #include <linux/io-pgtable.h>
42 #include "../dma-iommu.h"
[all …]
/openbmc/linux/Documentation/networking/
H A Dgeneric-hdlc.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - Normal (routed) and Ethernet-bridged (Ethernet device emulation)
16 - ARP support (no InARP support in the kernel - there is an
17 experimental InARP user-space daemon available on:
20 2. raw HDLC - either IP (IPv4) interface or Ethernet device emulation
25 Generic HDLC is a protocol driver only - it needs a low-level driver
28 Ethernet device emulation (using HDLC or Frame-Relay PVC) is compatible
40 gcc -O2 -Wall -o sethdlc sethdlc.c
44 Use sethdlc to set physical interface, clock rate, HDLC mode used,
59 In Frame Relay mode, ifconfig master hdlc device up (without assigning
[all …]
H A Dlapb-module.rst1 .. SPDX-License-Identifier: GPL-2.0
11 Changed (Henner Eisen, 2000-10-29): int return value for data_indication()
25 ----------
37 -----------------------------
59 ------------------------
74 unsigned int mode;
84 The mode variable is a bit field used for setting (at present) three values.
92 2 DTE/DCE operation (0=LAPB_DTE 1=LAPB_DCE)
93 3-31 Reserved, must be 0.
99 LAPB are different to indicate the mode of operation, the default is Single
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra20-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra20-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra20-pinmux
19 - description: tri-state registers
20 - description: mux register
21 - description: pull-up/down registers
[all …]
/openbmc/qemu/include/hw/net/
H A Dmii.h8 * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com>
25 #define MII_BMCR 0 /* Basic mode control register */
26 #define MII_BMSR 1 /* Basic mode status register */
34 #define MII_CTRL1000 9 /* 1000BASE-T control */
35 #define MII_STAT1000 10 /* 1000BASE-T status */
54 #define MII_BMCR_FD (1 << 8) /* Set duplex mode */
59 #define MII_BMSR_100TX_FD (1 << 14) /* Can do 100mbps, full-duplex */
60 #define MII_BMSR_100TX_HD (1 << 13) /* Can do 100mbps, half-duplex */
61 #define MII_BMSR_10T_FD (1 << 12) /* Can do 10mbps, full-duplex */
62 #define MII_BMSR_10T_HD (1 << 11) /* Can do 10mbps, half-duplex */
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-trimslice.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
6 #include "tegra20-cpu-opp.dtsi"
19 stdout-path = "serial0:115200n8";
30 vdd-supply = <&hdmi_vdd_reg>;
31 pll-supply = <&hdmi_pll_reg>;
33 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
34 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
40 pinctrl-names = "default";
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