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/openbmc/linux/Documentation/devicetree/bindings/display/sprd/
H A Dsprd,display-subsystem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/sprd/sprd,display-subsystem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kevin Tang <kevin.tang@unisoc.com>
14 DPU devices or other display interface nodes that comprise the
15 graphics subsystem.
17 Unisoc's display pipeline have several components as below description,
18 multi display controllers and corresponding physical interfaces.
19 For different display scenarios, dpu0 and dpu1 maybe binding to different
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/openbmc/linux/Documentation/devicetree/bindings/display/rockchip/
H A Drockchip-drm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-drm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sandy Huang <hjc@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
15 vop devices or other display interface nodes that comprise the
16 graphics subsystem.
20 const: rockchip,display-subsystem
23 $ref: /schemas/types.yaml#/definitions/phandle-array
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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dst,stih4xx.txt3 - sti-vtg: video timing generator
5 - compatible: "st,vtg"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
8 - interrupts : VTG interrupt number to the CPU.
9 - st,slave: phandle on a slave vtg
11 - sti-vtac: video timing advanced inter dye communication Rx and TX
13 - compatible: "st,vtac-main" or "st,vtac-aux"
14 - reg: Physical base address of the IP registers and length of memory mapped region.
15 - clocks: from common clock binding: handle hardware IP needed clocks, the
17 See ../clocks/clock-bindings.txt for details.
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/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Mobile Display SubSystem (MDSS)
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
11 - Rob Clark <robdclark@gmail.com>
14 This is the bindings documentation for the Mobile Display Subsystem(MDSS) that
15 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
19 pattern: "^display-subsystem@[0-9a-f]+$"
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H A Dqcom,sc8280xp-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc8280xp-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC8280XP Mobile Display Subsystem
10 - Bjorn Andersson <andersson@kernel.org>
13 Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
14 sub-blocks like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sc8280xp-mdss
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H A Dmdss-common.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/mdss-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display MDSS common properties
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
11 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
12 - Rob Clark <robdclark@gmail.com>
15 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
16 sub-blocks like DPU display controller, DSI and DP interfaces etc.
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H A Dqcom,sm6125-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6125-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6125 Display MDSS
10 - Marijn Suijten <marijn.suijten@somainline.org>
13 SM6125 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
14 like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sm6125-mdss
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H A Dqcom,sm6375-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6375-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6375 Display MDSS
10 - Konrad Dybcio <konrad.dybcio@linaro.org>
13 SM6375 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
14 like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sm6375-mdss
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H A Dqcom,qcm2290-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QCM220 Display MDSS
10 - Loic Poulain <loic.poulain@linaro.org>
13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,qcm2290-mdss
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H A Dqcom,sm6350-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6350-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6350 Display MDSS
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 SM6350 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
14 like DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
20 const: qcom,sm6350-mdss
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H A Dqcom,sm6115-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM6115 Display MDSS
10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14 sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sm6115-mdss
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H A Dqcom,sm8350-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sm8350-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SM8350 Display MDSS
10 - Robert Foss <robert.foss@linaro.org>
13 MSM Mobile Display Subsystem(MDSS) that encapsulates sub-blocks like
14 DPU display controller, DSI and DP interfaces etc.
16 $ref: /schemas/display/msm/mdss-common.yaml#
21 - const: qcom,sm8350-mdss
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/openbmc/linux/drivers/clk/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
119 Say Y if you want to support multimedia devices such as display,
222 SD/eMMC, display, graphics, camera etc.
230 SD/eMMC, display, graphics, camera etc.
240 SD/eMMC, display, graphics, camera etc.
248 SD/eMMC, display, graphics, camera etc.
289 Say Y if you want to support multimedia devices such as display,
298 SD/eMMC, display, graphics, camera etc.
316 Say Y if you want to support multimedia devices such as display,
333 Say Y if you want to support multimedia devices such as display,
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/openbmc/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl-imx-drm.txt5 IPU or other display interface nodes that comprise the graphics subsystem.
8 - compatible: Should be "fsl,imx-display-subsystem"
9 - ports: Should contain a list of phandles pointing to display interface ports
14 display-subsystem {
15 compatible = "fsl,imx-display-subsystem";
24 - compatible: Should be "fsl,<chip>-ipu" where <chip> is one of
25 - imx51
26 - imx53
27 - imx6q
28 - imx6qp
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/openbmc/linux/arch/x86/platform/atom/
H A Dpunit_atom_debug.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * blocks, Image Signal Processing, video processing, display, DSP etc.)
17 #include <asm/intel-family.h>
20 /* Subsystem config/status Video processor */
22 /* Subsystem config/status ISP (Image Signal Processor) */
24 /* Subsystem config/status Input/output controller */
35 /* Shift bits for getting status for Valley View/Baytrail display */
38 /* Subsystem config/status display for Cherry Trail SOC */
40 /* Shift bits for getting status for display */
50 { "DISPLAY", CHT_DSP_SSS, SSS_SHIFT },
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/openbmc/linux/drivers/video/fbdev/mmp/fb/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "fb driver for Marvell MMP Display Subsystem"
8 fb driver for Marvell MMP Display Subsystem
/openbmc/linux/drivers/video/fbdev/mmp/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Marvell MMP Display Subsystem support"
6 Marvell Display Subsystem support.
/openbmc/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,omap2-dss.txt1 Texas Instruments OMAP2 Display Subsystem
4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
5 description about OMAP Display Subsystem bindings.
8 --------
11 - compatible: "ti,omap2-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
16 - Video port for DPI output
19 - data-lines: number of lines used
23 -----
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H A Dti,omap-dss.txt1 Texas Instruments OMAP Display Subsystem
5 -------------------
7 This document is a generic description of the OMAP Display Subsystem bindings.
11 The OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and
18 DISPC is the display controller, which reads pixels from the memory and outputs
25 -----------
36 -------
39 name for each display. If no aliases are defined, a semi-random number is used
40 for the display.
43 -------
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H A Dti,dra7-dss.txt1 Texas Instruments DRA7x Display Subsystem
4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
5 description about OMAP Display Subsystem bindings.
8 --------
11 - compatible: "ti,dra7-dss"
12 - reg: address and length of the register spaces for 'dss'
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
16 - syscon: phandle to control module core syscon node
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H A Dti,omap3-dss.txt1 Texas Instruments OMAP3 Display Subsystem
4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
5 description about OMAP Display Subsystem bindings.
8 --------
11 - compatible: "ti,omap3-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - Video ports:
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H A Dti,k2g-dss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments K2G Display Subsystem
11 - Jyri Sarha <jsarha@ti.com>
12 - Tomi Valkeinen <tomi.valkeinen@ti.com>
15 The K2G DSS is an ultra-light version of TI Keystone Display
16 SubSystem. It has only one output port and video plane. The
21 const: ti,k2g-dss
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H A Dti,omap5-dss.txt1 Texas Instruments OMAP5 Display Subsystem
4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
5 description about OMAP Display Subsystem bindings.
8 --------
11 - compatible: "ti,omap5-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - DISPC
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/openbmc/linux/Documentation/driver-api/
H A Dsm501.rst11 asynchronous serial ports, audio functions, and a dual display video interface.
15 ----
29 The core re-uses the platform device system as the platform device
31 need to create a new bus-type and the associated code to go with it.
35 ---------
42 maximum possible resource allocation can be made to the video subsystem
43 as this is by-far the most resource-sensitive of the on-chip functions.
46 buffers once a display mode is chosen. Indeed when a video mode change
47 occurs the memory footprint of the video subsystem changes.
49 Since video memory is difficult to move without changing the display
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/openbmc/linux/Documentation/admin-guide/media/
H A Dplatform-cardlist.rst1 .. SPDX-License-Identifier: GPL-2.0
17 am437x-vpfe TI AM437x VPFE
18 aspeed-video Aspeed AST2400 and AST2500
19 atmel-isc ATMEL Image Sensor Controller (ISC)
20 atmel-isi ATMEL Image Sensor Interface (ISI)
24 cdns-csi2rx Cadence MIPI-CSI2 RX Controller
25 cdns-csi2tx Cadence MIPI-CSI2 TX Controller
26 coda-vpu Chips&Media Coda multi-standard codec IP
29 exynos-fimc-is EXYNOS4x12 FIMC-IS (Imaging Subsystem)
30 exynos-fimc-lite EXYNOS FIMC-LITE camera interface
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