1efdbd734SRob HerringTexas Instruments OMAP Display Subsystem 2efdbd734SRob Herring======================================== 3efdbd734SRob Herring 4efdbd734SRob HerringGeneric Description 5efdbd734SRob Herring------------------- 6efdbd734SRob Herring 7efdbd734SRob HerringThis document is a generic description of the OMAP Display Subsystem bindings. 8efdbd734SRob HerringBinding details for each OMAP SoC version are described in respective binding 9efdbd734SRob Herringdocumentation. 10efdbd734SRob Herring 11efdbd734SRob HerringThe OMAP Display Subsystem (DSS) hardware consists of DSS Core, DISPC module and 12efdbd734SRob Herringa number of encoder modules. All DSS versions contain DSS Core and DISPC, but 13efdbd734SRob Herringthe encoder modules vary. 14efdbd734SRob Herring 15efdbd734SRob HerringThe DSS Core is the parent of the other DSS modules, and manages clock routing, 16efdbd734SRob Herringintegration to the SoC, etc. 17efdbd734SRob Herring 18efdbd734SRob HerringDISPC is the display controller, which reads pixels from the memory and outputs 19efdbd734SRob Herringa RGB pixel stream to encoders. 20efdbd734SRob Herring 21efdbd734SRob HerringThe encoder modules encode the received RGB pixel stream to a video output like 22efdbd734SRob HerringHDMI, MIPI DPI, etc. 23efdbd734SRob Herring 24efdbd734SRob HerringVideo Ports 25efdbd734SRob Herring----------- 26efdbd734SRob Herring 27efdbd734SRob HerringThe DSS Core and the encoders have video port outputs. The structure of the 28efdbd734SRob Herringvideo ports is described in Documentation/devicetree/bindings/graph.txt, 29efdbd734SRob Herringand the properties for the ports and endpoints for each encoder are 30efdbd734SRob Herringdescribed in the SoC's DSS binding documentation. 31efdbd734SRob Herring 32efdbd734SRob HerringThe video ports are used to describe the connections to external hardware, like 33efdbd734SRob Herringpanels or external encoders. 34efdbd734SRob Herring 35efdbd734SRob HerringAliases 36efdbd734SRob Herring------- 37efdbd734SRob Herring 38efdbd734SRob HerringThe board dts file may define aliases for displays to assign "displayX" style 39efdbd734SRob Herringname for each display. If no aliases are defined, a semi-random number is used 40efdbd734SRob Herringfor the display. 41efdbd734SRob Herring 42efdbd734SRob HerringExample 43efdbd734SRob Herring------- 44efdbd734SRob Herring 45efdbd734SRob HerringA shortened example of the DSS description for OMAP4, with non-relevant parts 46efdbd734SRob Herringremoved, defined in omap4.dtsi: 47efdbd734SRob Herring 48efdbd734SRob Herringdss: dss@58000000 { 49efdbd734SRob Herring compatible = "ti,omap4-dss"; 50efdbd734SRob Herring reg = <0x58000000 0x80>; 51efdbd734SRob Herring status = "disabled"; 52efdbd734SRob Herring ti,hwmods = "dss_core"; 53efdbd734SRob Herring clocks = <&dss_dss_clk>; 54efdbd734SRob Herring clock-names = "fck"; 55efdbd734SRob Herring #address-cells = <1>; 56efdbd734SRob Herring #size-cells = <1>; 57efdbd734SRob Herring ranges; 58efdbd734SRob Herring 59efdbd734SRob Herring dispc@58001000 { 60efdbd734SRob Herring compatible = "ti,omap4-dispc"; 61efdbd734SRob Herring reg = <0x58001000 0x1000>; 62efdbd734SRob Herring interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 63efdbd734SRob Herring ti,hwmods = "dss_dispc"; 64efdbd734SRob Herring clocks = <&dss_dss_clk>; 65efdbd734SRob Herring clock-names = "fck"; 66efdbd734SRob Herring }; 67efdbd734SRob Herring 68efdbd734SRob Herring hdmi: encoder@58006000 { 69efdbd734SRob Herring compatible = "ti,omap4-hdmi"; 70efdbd734SRob Herring reg = <0x58006000 0x200>, 71efdbd734SRob Herring <0x58006200 0x100>, 72efdbd734SRob Herring <0x58006300 0x100>, 73efdbd734SRob Herring <0x58006400 0x1000>; 74efdbd734SRob Herring reg-names = "wp", "pll", "phy", "core"; 75efdbd734SRob Herring interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 76efdbd734SRob Herring status = "disabled"; 77efdbd734SRob Herring ti,hwmods = "dss_hdmi"; 78efdbd734SRob Herring clocks = <&dss_48mhz_clk>, <&dss_sys_clk>; 79efdbd734SRob Herring clock-names = "fck", "sys_clk"; 80efdbd734SRob Herring }; 81efdbd734SRob Herring}; 82efdbd734SRob Herring 83efdbd734SRob HerringA shortened example of the board description for OMAP4 Panda board, defined in 84efdbd734SRob Herringomap4-panda.dts. 85efdbd734SRob Herring 86efdbd734SRob HerringThe Panda board has a DVI and a HDMI connector, and the board contains a TFP410 87efdbd734SRob Herringchip (MIPI DPI to DVI encoder) and a TPD12S015 chip (HDMI ESD protection & level 88efdbd734SRob Herringshifter). The video pipelines for the connectors are formed as follows: 89efdbd734SRob Herring 90efdbd734SRob HerringDSS Core --(MIPI DPI)--> TFP410 --(DVI)--> DVI Connector 91efdbd734SRob HerringOMAP HDMI --(HDMI)--> TPD12S015 --(HDMI)--> HDMI Connector 92efdbd734SRob Herring 93efdbd734SRob Herring/ { 94efdbd734SRob Herring aliases { 95efdbd734SRob Herring display0 = &dvi0; 96efdbd734SRob Herring display1 = &hdmi0; 97efdbd734SRob Herring }; 98efdbd734SRob Herring 99efdbd734SRob Herring tfp410: encoder@0 { 100efdbd734SRob Herring compatible = "ti,tfp410"; 101efdbd734SRob Herring gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* 0, power-down */ 102efdbd734SRob Herring 103efdbd734SRob Herring pinctrl-names = "default"; 104efdbd734SRob Herring pinctrl-0 = <&tfp410_pins>; 105efdbd734SRob Herring 106efdbd734SRob Herring ports { 107efdbd734SRob Herring #address-cells = <1>; 108efdbd734SRob Herring #size-cells = <0>; 109efdbd734SRob Herring 110efdbd734SRob Herring port@0 { 111efdbd734SRob Herring reg = <0>; 112efdbd734SRob Herring 113efdbd734SRob Herring tfp410_in: endpoint@0 { 114efdbd734SRob Herring remote-endpoint = <&dpi_out>; 115efdbd734SRob Herring }; 116efdbd734SRob Herring }; 117efdbd734SRob Herring 118efdbd734SRob Herring port@1 { 119efdbd734SRob Herring reg = <1>; 120efdbd734SRob Herring 121efdbd734SRob Herring tfp410_out: endpoint@0 { 122efdbd734SRob Herring remote-endpoint = <&dvi_connector_in>; 123efdbd734SRob Herring }; 124efdbd734SRob Herring }; 125efdbd734SRob Herring }; 126efdbd734SRob Herring }; 127efdbd734SRob Herring 128efdbd734SRob Herring dvi0: connector@0 { 129efdbd734SRob Herring compatible = "dvi-connector"; 130efdbd734SRob Herring label = "dvi"; 131efdbd734SRob Herring 132efdbd734SRob Herring i2c-bus = <&i2c3>; 133efdbd734SRob Herring 134efdbd734SRob Herring port { 135efdbd734SRob Herring dvi_connector_in: endpoint { 136efdbd734SRob Herring remote-endpoint = <&tfp410_out>; 137efdbd734SRob Herring }; 138efdbd734SRob Herring }; 139efdbd734SRob Herring }; 140efdbd734SRob Herring 141efdbd734SRob Herring tpd12s015: encoder@1 { 142efdbd734SRob Herring compatible = "ti,tpd12s015"; 143efdbd734SRob Herring 144efdbd734SRob Herring pinctrl-names = "default"; 145efdbd734SRob Herring pinctrl-0 = <&tpd12s015_pins>; 146efdbd734SRob Herring 147efdbd734SRob Herring gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>, /* 60, CT CP HPD */ 148efdbd734SRob Herring <&gpio2 9 GPIO_ACTIVE_HIGH>, /* 41, LS OE */ 149efdbd734SRob Herring <&gpio2 31 GPIO_ACTIVE_HIGH>; /* 63, HPD */ 150efdbd734SRob Herring 151efdbd734SRob Herring ports { 152efdbd734SRob Herring #address-cells = <1>; 153efdbd734SRob Herring #size-cells = <0>; 154efdbd734SRob Herring 155efdbd734SRob Herring port@0 { 156efdbd734SRob Herring reg = <0>; 157efdbd734SRob Herring 158efdbd734SRob Herring tpd12s015_in: endpoint@0 { 159efdbd734SRob Herring remote-endpoint = <&hdmi_out>; 160efdbd734SRob Herring }; 161efdbd734SRob Herring }; 162efdbd734SRob Herring 163efdbd734SRob Herring port@1 { 164efdbd734SRob Herring reg = <1>; 165efdbd734SRob Herring 166efdbd734SRob Herring tpd12s015_out: endpoint@0 { 167efdbd734SRob Herring remote-endpoint = <&hdmi_connector_in>; 168efdbd734SRob Herring }; 169efdbd734SRob Herring }; 170efdbd734SRob Herring }; 171efdbd734SRob Herring }; 172efdbd734SRob Herring 173efdbd734SRob Herring hdmi0: connector@1 { 174efdbd734SRob Herring compatible = "hdmi-connector"; 175efdbd734SRob Herring label = "hdmi"; 176efdbd734SRob Herring 177efdbd734SRob Herring port { 178efdbd734SRob Herring hdmi_connector_in: endpoint { 179efdbd734SRob Herring remote-endpoint = <&tpd12s015_out>; 180efdbd734SRob Herring }; 181efdbd734SRob Herring }; 182efdbd734SRob Herring }; 183efdbd734SRob Herring}; 184efdbd734SRob Herring 185efdbd734SRob Herring&dss { 186efdbd734SRob Herring status = "ok"; 187efdbd734SRob Herring 188efdbd734SRob Herring pinctrl-names = "default"; 189efdbd734SRob Herring pinctrl-0 = <&dss_dpi_pins>; 190efdbd734SRob Herring 191efdbd734SRob Herring port { 192efdbd734SRob Herring dpi_out: endpoint { 193efdbd734SRob Herring remote-endpoint = <&tfp410_in>; 194efdbd734SRob Herring data-lines = <24>; 195efdbd734SRob Herring }; 196efdbd734SRob Herring }; 197efdbd734SRob Herring}; 198efdbd734SRob Herring 199efdbd734SRob Herring&hdmi { 200efdbd734SRob Herring status = "ok"; 201efdbd734SRob Herring vdda-supply = <&vdac>; 202efdbd734SRob Herring 203efdbd734SRob Herring pinctrl-names = "default"; 204efdbd734SRob Herring pinctrl-0 = <&dss_hdmi_pins>; 205efdbd734SRob Herring 206efdbd734SRob Herring port { 207efdbd734SRob Herring hdmi_out: endpoint { 208efdbd734SRob Herring remote-endpoint = <&tpd12s015_in>; 209efdbd734SRob Herring }; 210efdbd734SRob Herring }; 211efdbd734SRob Herring}; 212