/openbmc/u-boot/board/d-link/dns325/ |
H A D | kwbimage.cfg | 1 # SPDX-License-Identifier: GPL-2.0+ 9 # Written-by: Prafulla Wadaskar <prafulla@marvell.com> 10 # Refer doc/README.kwbimage for more details about how-to configure 22 # Configure RGMII-0 interface pad voltage to 1.8V 27 # bit13-0: 0xc30, 3120 DDR2 clks refresh rate 28 # bit23-14: 0 required 31 # bit29-26: 0 required 32 # bit31-30: 0b01 required 35 # bit3-0: 0 required 39 # bit11-7: 0 required [all …]
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/openbmc/u-boot/board/buffalo/lsxl/ |
H A D | kwbimage-lschl.cfg | 1 # SPDX-License-Identifier: GPL-2.0+ 5 # Refer doc/README.kwbimage for more details about how-to configure 15 # Configure RGMII-0/1 interface pad voltage to 1.8V 28 # bit13-0: 0x618, 1560 DDR2 clks refresh rate 29 # bit23-14: 0 required 32 # bit29-26: 0 required 33 # bit31-30: 0b01 required 37 # bit3-0: 0 required 41 # bit11-7: 0 required 45 # bit17-15: 0 required [all …]
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H A D | kwbimage-lsxhl.cfg | 1 # SPDX-License-Identifier: GPL-2.0+ 5 # Refer doc/README.kwbimage for more details about how-to configure 15 # Configure RGMII-0/1 interface pad voltage to 1.8V 28 # bit13-0: 0x618, 1560 DDR2 clks refresh rate 29 # bit23-14: 0 required 32 # bit29-26: 0 required 33 # bit31-30: 0b01 required 37 # bit3-0: 0 required 41 # bit11-7: 0 required 45 # bit17-15: 0 required [all …]
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/openbmc/u-boot/board/keymile/km_arm/ |
H A D | kwbimage-memphis.cfg | 1 # SPDX-License-Identifier: GPL-2.0+ 4 # Heiko Schocher, DENX Software Engineering, hs@denx.de. 8 # Refer doc/README.kwbimage for more details about how-to configure 16 # bit 3-0: MPPSel0 2, NF_IO[2] 17 # bit 7-4: MPPSel1 2, NF_IO[3] 18 # bit 12-8: MPPSel2 2, NF_IO[4] 19 # bit 15-12: MPPSel3 2, NF_IO[5] 20 # bit 19-16: MPPSel4 1, NF_IO[6] 21 # bit 23-20: MPPSel5 1, NF_IO[7] 22 # bit 27-24: MPPSel6 1, SYSRST_O [all …]
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H A D | kwbimage_128M16_1.cfg | 1 # SPDX-License-Identifier: GPL-2.0+ 4 # Heiko Schocher, DENX Software Engineering, hs@denx.de. 12 # Refer doc/README.kwbimage for more details about how-to configure 20 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2]) 21 # bit 7-4: 2, MPPSel1 SPI_SI (1=NF_IO[3]) 22 # bit 12-8: 2, MPPSel2 SPI_SCK (1=NF_IO[4]) 23 # bit 15-12: 2, MPPSel3 SPI_SO (1=NF_IO[5]) 24 # bit 19-16: 1, MPPSel4 NF_IO[6] 25 # bit 23-20: 1, MPPSel5 NF_IO[7] 26 # bit 27-24: 1, MPPSel6 SYSRST_O [all …]
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H A D | kwbimage_256M8_1.cfg | 1 # SPDX-License-Identifier: GPL-2.0+ 7 # Refer doc/README.kwbimage for more details about how-to configure 10 # This configuration applies to COGE5 design (ARM-part) 11 # Two 8-Bit devices are connected on the 16-Bit bus on the same 12 # chip-select. The supported devices are 13 # MT47H256M8EB-3IT:C 14 # MT47H256M8EB-25EIT:C 20 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2]) 21 # bit 7-4: 2, MPPSel1 SPI_MOSI (1=NF_IO[3]) 22 # bit 12-8: 2, MPPSel2 SPI_SCK (1=NF_IO[4]) [all …]
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Logging/ |
H A D | IPMI.interface.yaml | 6 type followed by type-specific information. The type-specific information 8 adding the SEL record), sensor number, event direction and event-specific 12 events it requires a generator ID (0x20 for BMC), sensor D-Bus path, event 13 direction (assertion or de-assertion), and event specific data. For OEM type 19 - name: IpmiSelAdd 23 - name: Message 27 - name: Path 31 - name: SELData 35 - name: Assert 38 An indicator if the SEL event is asserting or de-asserting. [all …]
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/openbmc/u-boot/board/technexion/pico-imx6ul/ |
H A D | pico-imx6ul.c | 1 // SPDX-License-Identifier: GPL-2.0+ 10 #include <asm/arch/imx-regs.h> 12 #include <asm/arch/mx6-pins.h> 15 #include <asm/mach-imx/iomux-v3.h> 73 * According to KSZ8081MNX-RNB manual: in board_eth_init() 75 * minimum of 500μs. The strap-in pin values are read and updated in board_eth_init() 76 * at the de-assertion of reset. in board_eth_init() 82 * According to KSZ8081MNX-RNB manual: in board_eth_init() 83 * After the de-assertion of reset, wait a minimum of 100μs before in board_eth_init() 96 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, in setup_fec() [all …]
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/openbmc/dbus-sensors/src/ |
H A D | Thresholds.cpp | 11 #include <phosphor-logging/lg2.hpp> 75 if (std::visit(VariantToStringVisitor(), labelFind->second) != in parseThresholdsFromConfig() 93 (std::visit(VariantToIntVisitor(), indexFind->second) != in parseThresholdsFromConfig() 105 std::visit(VariantToDoubleVisitor(), hysteresisFind->second); in parseThresholdsFromConfig() 120 std::visit(VariantToUnsignedIntVisitor(), severityFind->second); in parseThresholdsFromConfig() 123 std::visit(VariantToStringVisitor(), directionFind->second); in parseThresholdsFromConfig() 132 double val = std::visit(VariantToDoubleVisitor(), valueFind->second); in parseThresholdsFromConfig() 148 conn->async_method_call( in persistThreshold() 166 std::visit(VariantToStringVisitor(), labelFind->second); in persistThreshold() 183 VariantToUnsignedIntVisitor(), severityFind->second); in persistThreshold() [all …]
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/openbmc/u-boot/board/toradex/apalis_t30/ |
H A D | apalis_t30.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * (C) Copyright 2014-2018 10 #include <asm/arch-tegra/ap.h> 11 #include <asm/arch-tegra/tegra.h> 17 #include "../common/tdx-common.h" 19 #include "pinmux-config-apalis_t30.h" 45 (gd->ram_size == 0x40000000) ? 1 : 2); in checkboard() 69 /* Initialize any non-default pad configs (APB_MISC_GP regs) */ in pinmux_init() 129 if (index == 2) { /* I210 Gigabit Ethernet Controller (On-module) */ in tegra_pcie_board_port_reset() 157 * Guaranteed Until 900 us After PEX_PERST# De-assertion in tegra_pcie_board_port_reset()
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/openbmc/u-boot/drivers/pci/ |
H A D | pcie_imx.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Freescale i.MX6 PCI Express Root-Complex driver 5 * Copyright (C) 2013 Marek Vasut <marex@denx.de> 8 * pci-imx6.c: Sean Cross <xobs@kosagi.com> 9 * pcie-designware.c: Jingoo Han <jg1.han@samsung.com> 42 /* PCIe Port Logic registers (memory-mapped) */ 63 /* PHY registers (not memory-mapped) */ 115 return -ETIMEDOUT; in pcie_phy_poll_ack() 143 /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */ 200 /* wait for ack de-assertion */ in pcie_phy_write() [all …]
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/openbmc/u-boot/board/toradex/apalis-tk1/ |
H A D | apalis-tk1.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (c) 2016-2018 Toradex, Inc. 8 #include <asm/arch-tegra/ap.h> 17 #include "../common/tdx-common.h" 18 #include "pinmux-config-apalis-tk1.h" 76 return -EINVAL; in as3722_sd_enable() 94 return -EINVAL; in as3722_ldo_enable() 98 ldo -= 8; in as3722_ldo_enable() 150 if (index == 1) { /* I210 Gigabit Ethernet Controller (On-module) */ in tegra_pcie_board_port_reset() 235 * Until 900 us After PEX_PERST# De-assertion in tegra_pcie_board_port_reset()
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/openbmc/u-boot/board/kosagi/novena/ |
H A D | novena_spl.c | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * Copyright (C) 2014 Marek Vasut <marex@denx.de> 12 #include <asm/arch/mx6-ddr.h> 13 #include <asm/arch/mx6-pins.h> 16 #include <asm/mach-imx/boot_mode.h> 17 #include <asm/mach-imx/iomux-v3.h> 18 #include <asm/mach-imx/mxc_i2c.h> 25 #include <asm/arch/mx6-ddr.h> 132 * Use imx6 internal pull-ups to drive PHY mode pins during PHY reset in novena_spl_setup_iomux_enet() 133 * de-assertion. The intention is to use weak signal drivers (pull-ups) in novena_spl_setup_iomux_enet() [all …]
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/openbmc/u-boot/drivers/misc/ |
H A D | ds4510.c | 1 // SPDX-License-Identifier: GPL-2.0 8 * and 4 programmable non-volatile GPIO pins. 38 wrlen = DS4510_EEPROM_PAGE_SIZE - in ds4510_mem_write() 43 return -1; in ds4510_mem_write() 50 count -= wrlen; in ds4510_mem_write() 68 * nv = 0 - Writes to SEEPROM registers behave like EEPROM 69 * nv = 1 - Writes to SEEPROM registers behave like SRAM 76 return -1; in ds4510_see_write() 87 * Write de-assertion of reset signal delay 94 return -1; in ds4510_rstdelay_write() [all …]
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/openbmc/qemu/hw/char/ |
H A D | stm32l4x5_usart.c | 4 * Copyright (c) 2023 Arnaud Minier <arnaud.minier@telecom-paris.fr> 5 * Copyright (c) 2023 Inès Varhol <ines.varhol@telecom-paris.fr> 7 * SPDX-License-Identifier: GPL-2.0-or-later 10 * See the COPYING file in the top-level directory. 15 * for STM32L4x5 and STM32L4x6 advanced Arm ® -based 32-bit MCUs. 22 #include "chardev/char-fe.h" 23 #include "chardev/char-serial.h" 28 #include "hw/qdev-clock.h" 29 #include "hw/qdev-properties.h" 30 #include "hw/qdev-properties-system.h" [all …]
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/openbmc/ipmitool/include/ipmitool/ |
H A D | ipmi_sdr.h | 22 * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED. 48 #define tos32(val, bits) ((val & ((1<<((bits)-1)))) ? (-((val) & (1<<((bits)-1))) | (val)) : (va… 192 uint16_t assert_event; /* assertion event mask */ 193 uint16_t deassert_event; /* de-assertion event mask */ 404 #define IS_THRESHOLD_SENSOR(s) ((s)->event_type == 1) 405 #define UNITS_ARE_DISCRETE(s) ((s)->unit.analog == 3) 523 uint8_t linearization; /* 70h=non linear, 71h-7Fh=non linear, OEM */ 709 * From table 33-3 of the IPMI v2.0 spec 791 "gravities", "ounce", "pound", "ft-lb", "oz-in", "gauss", 802 / Updated to v2.0 Table 42-3, Sensor Type Codes */ [all …]
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/openbmc/u-boot/net/ |
H A D | tftp.c | 4 * Copyright 2000, 2001 DENX Software Engineering, Wolfgang Denk, wd@denx.de 54 * tftp_timeout_count_max must be non-negative and tftp_timeout_ms must be 56 * non-standard timeout behavior when initiating a TFTP transfer. 131 * almost-MTU block sizes. At least try... fall back to 512 if need be. 177 return -1; in store_block() 214 ulong offset = ((int)block - 1) * len + tftp_block_wrap_offset; in load_block() 217 tosend = min(net_boot_file_size - offset, tosend); in load_block() 246 if (((tftp_cur_block - 1) % 10) == 0) in show_block_marker() 349 len = pkt - xp; in tftp_send() 371 len = pkt - xp; in tftp_send() [all …]
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/openbmc/x86-power-control/src/ |
H A D | power_control.cpp | 2 // Copyright (c) 2018-2025 Intel Corporation 8 // http://www.apache.org/licenses/LICENSE-2.0 19 #include <systemd/sd-journal.h> 28 #include <phosphor-logging/lg2.hpp> 46 static const std::string appName = "power-control"; 169 // Time power OK assertion on power-on 171 // Time SIO power good assertion on power-on 173 // Time power-off state save for power loss tracking 181 // Map containing timers used for D-Bus get-property retries 214 conn->async_method_call( in beep() [all …]
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/libeigen/libeigen/ |
H A D | 0002-Remove-LGPL-Code-and-references.patch | 2 From: =?UTF-8?q?Antonio=20S=C3=A1nchez?= <cantonios@google.com> 6 Upstream-Status: Backport [https://gitlab.com/libeigen/eigen/-/commit/e256ad1823c2eddd6954241ddc99b… 7 --- 8 COPYING.LGPL | 502 ------------------ 9 COPYING.README | 16 +- 10 Eigen/src/Core/util/NonMPL2.h | 3 - 11 .../IncompleteCholesky.h | 3 +- 12 bench/tensors/eigen_sycl_bench.sh | 1 - 13 bench/tensors/eigen_sycl_bench_contract.sh | 2 +- 14 doc/PreprocessorDirectives.dox | 3 - [all …]
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/openbmc/u-boot/tools/buildman/ |
H A D | README | 1 # SPDX-License-Identifier: GPL-2.0+ 6 Quick-start 12 cd /path/to/u-boot 14 buildman --fetch-arch arm 15 buildman -k rpi_2 17 # u-boot.bin is the output image 23 This tool handles building U-Boot to check that you have not broken it 26 to make full use of multi-processor machines. 38 where it left off. This should happen cleanly and without side-effects. 42 You may need to press Ctrl-C several times to quit it. Also it will print [all …]
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/openbmc/u-boot/common/ |
H A D | dlmalloc.src | 1 /* ---------- To make a malloc.h, start cutting here ------------ */ 16 This is not the fastest, most space-conserving, most portable, or 18 while also being among the most space-conserving, portable and tunable. 19 Consistent balance across these factors results in a good general-purpose 20 allocator. For a high-level description, see 38 size argument of zero (re)allocates a minimum-sized chunk. 48 Equivalent to valloc(minimum-page-that-holds(n)), that is, 56 Release all but pad bytes of freed top-most memory back 72 Alignment: 8-byte 77 Code for 8-byte pointers is untested by me but has worked [all …]
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/openbmc/u-boot/drivers/ddr/marvell/a38x/ |
H A D | ddr3_training.c | 1 // SPDX-License-Identifier: GPL-2.0 25 /* in case of ddr4 do not run ddr3_tip_write_additional_odt_setting function - mc odt always 'on' 66 u32 g_zpri_data = PARAM_UNDEFINED; /* controller data - P drive strength */ 67 u32 g_znri_data = PARAM_UNDEFINED; /* controller data - N drive strength */ 68 u32 g_zpri_ctrl = PARAM_UNDEFINED; /* controller C/A - P drive strength */ 69 u32 g_znri_ctrl = PARAM_UNDEFINED; /* controller C/A - N drive strength */ 71 u32 g_zpodt_data = PARAM_UNDEFINED; /* controller data - P ODT */ 72 u32 g_znodt_data = PARAM_UNDEFINED; /* controller data - N ODT */ 73 u32 g_zpodt_ctrl = PARAM_UNDEFINED; /* controller data - P ODT */ 74 u32 g_znodt_ctrl = PARAM_UNDEFINED; /* controller data - N ODT */ [all …]
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/ |
H A D | pxaregs.c | 2 * pxaregs - tool to display and modify PXA250's registers at runtime 4 * (c) Copyright 2002 by M&N Logistik-Lösungen Online GmbH 9 * Please send patches to h.schurig, working at mn-logistik.de 10 * - added fix from Bernhard Nemec 11 * - i2c registers from Stefan Eletzhofer 25 #include <linux/i2c-dev.h> 29 static int fd = -1; 85 { "PMCR", 0x40F00000, 0, 0xffffffff, 'x', "Power Manager Control Register (3-23)" }, 88 { "PSSR", 0x40F00004, 0, 0xffffffff, 'x', "Power Manager Sleep Status Register (3-29)" }, 95 { "PSPR", 0x40F00008, 0, 0xffffffff, 'x', "Power Manager Scratch Pad Register (3-30)" }, [all …]
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/openbmc/openbmc/poky/meta/lib/oe/ |
H A D | spdx30.py | 7 # SPDX-License-Identifier: MIT 116 UTC_FORMAT_STR = "%Y-%m-%dT%H:%M:%SZ" 117 REGEX = r"^\d{4}-\d{2}-\d{2}T\d{2}:\d{2}:\d{2}(Z|[+-]\d{2}:\d{2})?$" 136 seconds = offset % timedelta(minutes=-1 if offset.total_seconds() < 0 else 1) 138 offset = offset - seconds 168 REGEX = r"^\d{4}-\d{2}-\d{2}T\d{2}:\d{2}:\d{2}(Z|[+-]\d{2}:\d{2})$" 326 # De-duplicate IDs 1150 self.missing_ids -= NAMED_INDIVIDUALS 1228 # Remove blank node ID for re-assignment 1374 The returned string should be either a fully-qualified IRI, or a blank [all …]
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/openbmc/qemu/tests/qtest/ |
H A D | libqtest.c | 11 * Andreas Färber <afaerber@suse.de> 14 * See the COPYING file in the top-level directory. 124 * It's in seconds on non-Windows platforms but milliseconds on Windows. in socket_accept() 138 return -1; in socket_accept() 144 } while (ret == -1 && errno == EINTR); in socket_accept() 145 if (ret == -1) { in socket_accept() 155 return s->qemu_pid; in qtest_pid() 160 pid_t pid = s->qemu_pid; in qtest_probe_child() 162 if (pid != -1) { in qtest_probe_child() 164 pid = waitpid(pid, &s->wstatus, WNOHANG); in qtest_probe_child() [all …]
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