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/openbmc/u-boot/arch/arm/dts/
H A Dam43xx-clocks.dtsi2 * Device Tree Source for AM43xx clock data
12 #clock-cells = <0>;
13 compatible = "ti,mux-clock";
20 #clock-cells = <0>;
21 compatible = "ti,mux-clock";
28 #clock-cells = <0>;
29 compatible = "ti,mux-clock";
36 #clock-cells = <0>;
37 compatible = "fixed-factor-clock";
39 clock-mult = <1>;
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H A Dkeystone-clocks.dtsi2 * Device Tree Source for Keystone 2 clock tree
17 #clock-cells = <0>;
18 compatible = "ti,keystone,pll-mux-clock";
23 clock-output-names = "mainmuxclk";
27 #clock-cells = <0>;
28 compatible = "fixed-factor-clock";
30 clock-div = <1>;
31 clock-mult = <1>;
32 clock-output-names = "chipclk1";
36 #clock-cells = <0>;
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H A Dam33xx-clocks.dtsi2 * Device Tree Source for AM33xx clock data
12 #clock-cells = <0>;
13 compatible = "ti,mux-clock";
20 #clock-cells = <0>;
21 compatible = "fixed-factor-clock";
23 clock-mult = <1>;
24 clock-div = <1>;
28 #clock-cells = <0>;
29 compatible = "fixed-factor-clock";
31 clock-mult = <1>;
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H A Domap3xxx-clocks.dtsi2 * Device Tree Source for OMAP3 clock data
12 #clock-cells = <0>;
13 compatible = "fixed-clock";
14 clock-frequency = <16800000>;
18 #clock-cells = <0>;
19 compatible = "ti,mux-clock";
25 #clock-cells = <0>;
26 compatible = "ti,divider-clock";
35 #clock-cells = <0>;
36 compatible = "ti,gate-clock";
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H A Ddra7xx-clocks.dtsi2 * Device Tree Source for DRA7xx clock data
12 #clock-cells = <0>;
13 compatible = "ti,dra7-atl-clock";
18 #clock-cells = <0>;
19 compatible = "ti,dra7-atl-clock";
24 #clock-cells = <0>;
25 compatible = "ti,dra7-atl-clock";
30 #clock-cells = <0>;
31 compatible = "ti,dra7-atl-clock";
36 #clock-cells = <0>;
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H A Dkeystone-k2hk-clocks.dtsi4 * Keystone 2 Kepler/Hawking SoC clock nodes
13 #clock-cells = <0>;
14 compatible = "ti,keystone,pll-clock";
16 clock-output-names = "arm-pll-clk";
22 #clock-cells = <0>;
23 compatible = "ti,keystone,main-pll-clock";
30 #clock-cells = <0>;
31 compatible = "ti,keystone,pll-clock";
33 clock-output-names = "papllclk";
39 #clock-cells = <0>;
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H A Domap36xx-omap3430es2plus-clocks.dtsi2 * Device Tree Source for OMAP34xx/OMAP36xx clock data
12 #clock-cells = <0>;
13 compatible = "ti,composite-no-wait-gate-clock";
20 #clock-cells = <0>;
21 compatible = "ti,composite-divider-clock";
29 #clock-cells = <0>;
30 compatible = "ti,composite-clock";
35 #clock-cells = <0>;
36 compatible = "fixed-factor-clock";
38 clock-mult = <1>;
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H A Ddm816x-clocks.dtsi9 #clock-cells = <1>;
10 compatible = "ti,dm816-fapll-clock";
13 clock-indices = <1>, <2>, <3>, <4>, <5>,
15 clock-output-names = "main_pll_clk1",
25 #clock-cells = <1>;
26 compatible = "ti,dm816-fapll-clock";
29 clock-indices = <1>, <2>, <3>, <4>;
30 clock-output-names = "ddr_pll_clk1",
37 #clock-cells = <1>;
38 compatible = "ti,dm816-fapll-clock";
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H A Dkeystone-k2l-clocks.dtsi4 * Keystone 2 lamarr SoC clock nodes
13 #clock-cells = <0>;
14 compatible = "ti,keystone,pll-clock";
16 clock-output-names = "arm-pll-clk";
22 #clock-cells = <0>;
23 compatible = "ti,keystone,main-pll-clock";
30 #clock-cells = <0>;
31 compatible = "ti,keystone,pll-clock";
33 clock-output-names = "papllclk";
39 #clock-cells = <0>;
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H A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi2 * Device Tree Source for OMAP36xx/AM35xx/OMAP34xx clock data
12 #clock-cells = <0>;
13 compatible = "fixed-factor-clock";
15 clock-mult = <1>;
16 clock-div = <3>;
20 #clock-cells = <0>;
21 compatible = "fixed-factor-clock";
23 clock-mult = <1>;
24 clock-div = <5>;
29 #clock-cells = <0>;
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H A Domap34xx-omap36xx-clocks.dtsi2 * Device Tree Source for OMAP34XX/OMAP36XX clock data
12 #clock-cells = <0>;
13 compatible = "fixed-factor-clock";
15 clock-mult = <1>;
16 clock-div = <1>;
20 #clock-cells = <0>;
21 compatible = "ti,omap3-interface-clock";
28 #clock-cells = <0>;
29 compatible = "ti,omap3-interface-clock";
36 #clock-cells = <0>;
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H A Dzynqmp-clk.dtsi3 * Clock specification for Xilinx ZynqMP
12 compatible = "fixed-clock";
13 #clock-cells = <0>;
14 clock-frequency = <100000000>;
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <125000000>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <200000000>;
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H A Dstih410-clock.dtsi8 #include <dt-bindings/clock/stih410-clks.h>
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
23 clock-frequency = <30000000>;
24 clock-output-names = "CLK_SYSIN";
28 * ARM Peripheral clock for timers
31 #clock-cells = <0>;
32 compatible = "fixed-factor-clock";
34 clock-div = <2>;
35 clock-mult = <1>;
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H A Dsama5d2.dtsi16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <0>;
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <0>;
38 clock-names = "ohci_clk", "hclk", "uhpck";
46 clock-names = "usb_clk", "ehci_clk";
54 clock-names = "hclock", "multclk", "baseclk";
62 clock-names = "hclock", "multclk", "baseclk";
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/openbmc/u-boot/drivers/clk/at91/
H A DKconfig2 bool "AT91 clock drivers"
6 This option is used to enable the AT91 clock driver.
7 The driver supports the AT91 clock generator, including
8 the oscillators and PLLs, such as main clock, slow clock,
9 PLLA, UTMI PLL. Clocks can also be a source clock of other
10 clocks a tree structure, such as master clock, usb device
11 clock, matrix clock and generic clock.
12 Devices can use a common clock API to request a particular
13 clock, enable it and get its rate.
16 bool "Support UTMI PLL Clock"
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/openbmc/u-boot/include/
H A Dclk.h15 * A clock is a hardware signal that oscillates autonomously at a specific
16 * frequency and duty cycle. Most hardware modules require one or more clock
17 * signal to drive their operation. Clock signals are typically generated
19 * clock provider. This API provides a standard means for drivers to enable and
22 * A driver that implements UCLASS_CLOCK is a clock provider. A provider will
25 * clock providers must implement.
27 * Clock consumers/clients are the HW modules driven by the clock signals. This
34 * struct clk - A handle to (allowing control of) a single clock.
36 * Clients provide storage for clock handles. The content of the structure is
37 * managed solely by the clock API and clock drivers. A clock struct is
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H A Dclk-uclass.h18 * struct clk_ops - The functions that a clock driver must implement.
22 * of_xlate - Translate a client's device-tree (OF) clock specifier.
24 * The clock core calls this function as the first step in implementing
27 * If this function pointer is set to NULL, the clock core will use a
28 * default implementation, which assumes #clock-cells = <1>, and that
29 * the DT cell contains a simple integer clock ID.
31 * At present, the clock API solely supports device-tree. If this
35 * @clock: The clock struct to hold the translation result.
36 * @args: The clock specifier values from device tree.
39 int (*of_xlate)(struct clk *clock,
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/openbmc/u-boot/arch/sandbox/include/asm/
H A Dclk.h14 * enum sandbox_clk_id - Identity of clocks implemented by the sandbox clock
17 * These IDs are within/relative-to the clock provider.
28 * clock test device.
30 * These are the IDs the clock consumer knows the clocks as.
41 * sandbox_clk_query_rate - Query the current rate of a sandbox clock.
43 * @dev: The sandbox clock provider device.
44 * @id: The clock to query.
45 * @return: The rate of the clock.
49 * sandbox_clk_query_enable - Query the enable state of a sandbox clock.
51 * @dev: The sandbox clock provider device.
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/openbmc/qemu/include/hw/
H A Dclock.h22 #define TYPE_CLOCK "clock"
23 OBJECT_DECLARE_SIMPLE_TYPE(Clock, CLOCK)
32 ClockUpdate = 1, /* Clock period has just updated */
33 ClockPreUpdate = 2, /* Clock period is about to update */
39 * clock store a value representing the clock's period in 2^-32ns unit.
58 * Clock:
60 * @period: unsigned integer representing the period of the clock
61 * @canonical_path: clock path string cache (used for trace purpose)
62 * @callback: called when clock changes
65 * @source: source (or parent in clock tree) of the clock
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H A Dqdev-clock.h2 * Device's clock input and output
17 #include "hw/clock.h"
21 * @dev: the device to add an input clock to
22 * @name: the name of the clock (can't be NULL).
27 * @returns: a pointer to the newly added clock
29 * Add an input clock to device @dev as a clock named @name.
33 Clock *qdev_init_clock_in(DeviceState *dev, const char *name,
39 * @dev: the device to add an output clock to
40 * @name: the name of the clock (can't be NULL).
41 * @returns: a pointer to the newly added clock
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/openbmc/u-boot/drivers/clk/sunxi/
H A DKconfig2 bool "Clock support for Allwinner SoCs"
7 This enables support for common clock driver API on Allwinner
13 bool "Clock driver for Allwinner A10/A20"
16 This enables common clock driver support for platforms based
20 bool "Clock driver for Allwinner A10s/A13"
23 This enables common clock driver support for platforms based
27 bool "Clock driver for Allwinner A31/A31s"
30 This enables common clock driver support for platforms based
34 bool "Clock driver for Allwinner A23/A33"
37 This enables common clock driver support for platforms based
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/openbmc/u-boot/drivers/clk/
H A DKconfig1 menu "Clock" menu
4 bool "Enable clock driver support"
7 This allows drivers to be provided for clock generators, including
8 oscillators and PLLs. Devices can use a common clock API to request
9 a particular clock rate and check on available clocks. Clocks can
11 choose the source for each clock.
14 bool "Enable clock support in SPL"
17 The clock subsystem adds a small amount of overhead to the image.
18 If this is acceptable and you have a need to use clock drivers in
24 bool "Enable clock support in TPL"
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/openbmc/qemu/docs/devel/
H A Dclocks.rst1 Modelling a clock tree in QEMU
10 They allow us to model the clock distribution of a platform and detect
11 configuration errors in the clock tree such as badly configured PLL, clock
12 source selection or disabled clock.
14 The object is *Clock* and its QOM name is ``clock`` (in C code, the macro
21 In these cases a Clock object is a child of a Device object, but this
23 example it is possible to create a clock outside of any device to
24 model the main clock source of a machine.
29 | Clock 1 | | Device B | | Device C |
31 | |>>-+-->>|Clock 2| |Clock 3|>>--->>|Clock 6| |
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/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dfixed-factor-clock.txt1 Binding for simple fixed factor rate clock sources.
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible : shall be "fixed-factor-clock".
9 - #clock-cells : from common clock binding; shall be set to 0.
10 - clock-div: fixed divider.
11 - clock-mult: fixed multiplier.
12 - clocks: parent clock.
15 - clock-output-names : From common clock binding.
18 clock {
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H A Drockchip,rk3288-cru.txt1 * Rockchip RK3288 Clock and Reset Unit
3 The RK3288 clock controller generates and supplies clock to various
12 - #clock-cells: should be 1.
20 Each clock is assigned an identifier and client nodes can use this identifier
21 to specify the clock which they consume. All available clocks are defined as
22 preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be
29 that they are defined using standard clock bindings with following
30 clock-output-names:
32 - "xin32k" - rtc clock - optional,
33 - "ext_i2s" - external I2S clock - optional,
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