/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | intel,ixp4xx-hss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Linus Walleij <linus.walleij@linaro.org> 20 const: intel,ixp4xx-hss 26 intel,npe-handle: 27 $ref: /schemas/types.yaml#/definitions/phandle-array 30 - description: phandle to the NPE this HSS instance is using 31 - description: the NPE instance number [all …]
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mp-tqma8mpql-mba8mpxl.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2021-2022 TQ-Systems GmbH 4 * Author: Alexander Stein <alexander.stein@tq-group.com> 7 /dts-v1/; 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/net/ti-dp83867.h> 11 #include <dt-bindings/phy/phy-imx8-pcie.h> 12 #include <dt-bindings/pwm/pwm.h> 13 #include "imx8mp-tqma8mpql.dtsi" 16 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL"; [all …]
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H A D | imx8mm-venice-gw7901.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/phy/phy-imx8-pcie.h> 17 compatible = "gw,imx8mm-gw7901", "fsl,imx8mm"; 30 stdout-path = &uart2; 38 gpio-keys { 39 compatible = "gpio-keys"; [all …]
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H A D | imx93-tqma9352-mba93xxla.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2022-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/pwm/pwm.h> 14 #include <dt-bindings/usb/pd.h> 15 #include "imx93-tqma9352.dtsi" [all …]
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H A D | imx8mp-phyboard-pollux-rdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/leds/leds-pca9532.h> 10 #include <dt-bindings/pwm/pwm.h> 11 #include "imx8mp-phycore-som.dtsi" 14 model = "PHYTEC phyBOARD-Pollux i.MX8MP"; 15 compatible = "phytec,imx8mp-phyboard-pollux-rdk", 16 "phytec,imx8mp-phycore-som", "fsl,imx8mp"; 19 stdout-path = &uart1; 22 reg_usdhc2_vmmc: regulator-usdhc2 { [all …]
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H A D | imx8mq-kontron-pitx-imx8m.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree File for the Kontron pitx-imx8m board. 8 /dts-v1/; 11 #include <dt-bindings/net/ti-dp83867.h> 14 model = "Kontron pITX-imx8m"; 15 compatible = "kontron,pitx-imx8m", "fsl,imx8mq"; 31 stdout-path = "serial2:115200n8"; 34 pcie0_refclk: pcie0-clock { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; [all …]
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H A D | imx8mm-venice-gw7903.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/phy/phy-imx8-pcie.h> 17 compatible = "gw,imx8mm-gw7903", "fsl,imx8mm"; 25 stdout-path = &uart2; 33 gpio-keys { 34 compatible = "gpio-keys"; [all …]
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H A D | imx8mp-msc-sm2s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 9 #include <dt-bindings/net/ti-dp83867.h> 18 stdout-path = &uart2; 21 reg_usb0_host_vbus: regulator-usb0-vbus { 22 compatible = "regulator-fixed"; 23 regulator-name = "usb0_host_vbus"; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&pinctrl_usb0_vbus>; 26 regulator-min-microvolt = <5000000>; [all …]
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H A D | imx8mm-venice-gw7902.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/linux-event-codes.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/phy/phy-imx8-pcie.h> 18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm"; 27 stdout-path = &uart2; 36 compatible = "fixed-clock"; [all …]
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H A D | mba8mx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 6 #include <dt-bindings/net/ti-dp83867.h> 8 /* TQ-Systems GmbH MBa8Mx baseboard */ 12 compatible = "pwm-beeper"; 14 beeper-hz = <4000>; 15 amp-supply = <®_vcc_3v3>; 19 stdout-path = &uart3; 22 gpio-keys { 23 compatible = "gpio-keys"; [all …]
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/openbmc/linux/arch/arm/boot/dts/nxp/ls/ |
H A D | ls1021a-tqmls1021a-mbls1021a.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR X11) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 4 * Copyright 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 5 * D-82229 Seefeld, Germany. 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/linux-event-codes.h> 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/leds/leds-pca9532.h> 15 #include <dt-bindings/net/ti-dp83867.h> [all …]
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | nvidia,tegra-audio-rt5677.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-rt5677.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jon Hunter <jonathanh@nvidia.com> 11 - Thierry Reding <thierry.reding@gmail.com> 14 - $ref: nvidia,tegra-audio-common.yaml# 19 - pattern: '^[a-z0-9]+,tegra-audio-rt5677(-[a-z0-9]+)+$' 20 - const: nvidia,tegra-audio-rt5677 22 nvidia,audio-routing: [all …]
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/openbmc/linux/arch/arm/boot/dts/intel/ixp/ |
H A D | intel-ixp42x-goramo-multilink.dts | 1 // SPDX-License-Identifier: ISC 5 * - MultiLink Basic (a box) 6 * - MultiLink Max (19" rack mount) 9 * This is one of the few devices supporting the IXP4xx High-Speed Serial 14 /dts-v1/; 16 #include "intel-ixp42x.dtsi" 17 #include <dt-bindings/input/input.h> 21 compatible = "goramo,multilink-router", "intel,ixp42x"; 22 #address-cells = <1>; 23 #size-cells = <1>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-davinci.txt | 4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf 5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf 6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf 9 - #address-cells: number of cells required to define a chip select 11 - #size-cells: should be zero. 12 - compatible: 13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family 14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family 15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC 17 - reg: Offset and length of SPI controller register space [all …]
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/openbmc/u-boot/arch/mips/dts/ |
H A D | sfr,nb4-ser.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 12 compatible = "sfr,nb4-ser", "brcm,bcm6358"; 19 stdout-path = "serial0:115200n8"; 22 gpio-leds { 23 compatible = "gpio-leds"; 26 label = "NB4-SER:white:traffic"; 27 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 31 label = "NB4-SER:blue:service"; 32 gpios = <&gpio0 4 GPIO_ACTIVE_LOW>; [all …]
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/openbmc/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-gxl-s905w-jethome-jethub-j80.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 10 /dts-v1/; 12 #include "meson-gxl.dtsi" 15 compatible = "jethome,jethub-j80", "amlogic,s905w", "amlogic,meson-gxl"; 22 reserved-memory { 37 stdout-path = "serial0:115200n8"; 40 vddio_ao18: regulator-vddio_ao18 { 41 compatible = "regulator-fixed"; 42 regulator-name = "VDDIO_AO18"; 43 regulator-min-microvolt = <1800000>; [all …]
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H A D | meson-g12b-odroid-go-ultra.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-g12b-s922x.dtsi" 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/gpio/meson-g12a-gpio.h> 12 #include <dt-bindings/sound/meson-g12a-toacodec.h> 13 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 16 compatible = "hardkernel,odroid-go-ultra", "amlogic,s922x", "amlogic,g12b"; 17 model = "Hardkernel ODROID-GO-Ultra"; [all …]
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H A D | meson-sm1-sei610.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-sm1.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/meson-g12a-gpio.h> 12 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 23 mono_dac: audio-codec-0 { 25 #sound-dai-cells = <0>; 26 sound-name-prefix = "U16"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/media/ |
H A D | stih407-c8sectpfe.txt | 14 - compatible : Should be "stih407-c8sectpfe" 16 - reg : Address and length of register sets for each device in 17 "reg-names" 19 - reg-names : The names of the register addresses corresponding to the 21 - c8sectpfe: c8sectpfe registers 22 - c8sectpfe-ram: c8sectpfe internal sram 24 - clocks : phandle list of c8sectpfe clocks 25 - clock-names : should be "c8sectpfe" 26 See: Documentation/devicetree/bindings/clock/clock-bindings.txt 28 - pinctrl-names : a pinctrl state named tsin%d-serial or tsin%d-parallel (where %d is tsin-num) [all …]
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/openbmc/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp-sck-kv-g-revB.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 16 /dts-v1/; 20 si5332_0: si5332-0 { /* u17 */ 21 compatible = "fixed-clock"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/firmware/ |
H A D | intel,ixp4xx-network-processing-engine.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Linus Walleij <linus.walleij@linaro.org> 24 - items: 25 - const: intel,ixp4xx-network-processing-engine 29 - description: NPE0 (NPE-A) register range 30 - description: NPE1 (NPE-B) register range 31 - description: NPE2 (NPE-C) register range [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 15 Logic devices on mini-cards, as well as allowing connection of 25 [2] include/dt-bindings/pinctrl/lochnagar.h 26 [3] include/dt-bindings/clock/lochnagar.h 28 And these documents for the required sub-node binding details: 35 - if: 39 - cirrus,lochnagar2 [all …]
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/openbmc/linux/Documentation/devicetree/bindings/iio/imu/ |
H A D | adi,adis16480.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandru Tachici <alexandru.tachici@analog.com> 15 - adi,adis16375 16 - adi,adis16480 17 - adi,adis16485 18 - adi,adis16488 19 - adi,adis16490 20 - adi,adis16495-1 [all …]
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/openbmc/u-boot/drivers/mmc/ |
H A D | tegra_mmc.c | 1 // SPDX-License-Identifier: GPL-2.0+ 6 * Portions Copyright 2011-2016 NVIDIA Corporation 16 #include <asm/arch-tegra/tegra_mmc.h> 26 struct clk clk; member 40 if (power != (unsigned short)-1) { in tegra_mmc_set_power() 58 writeb(pwr, &priv->reg->pwrcon); in tegra_mmc_set_power() 64 writeb(pwr, &priv->reg->pwrcon); in tegra_mmc_set_power() 74 debug("buf: %p (%p), data->blocks: %u, data->blocksize: %u\n", in tegra_mmc_prepare_data() 75 bbstate->bounce_buffer, bbstate->user_buffer, data->blocks, in tegra_mmc_prepare_data() 76 data->blocksize); in tegra_mmc_prepare_data() [all …]
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/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-388-clearfog.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include "armada-388-clearfog.dtsi" 13 compatible = "solidrun,clearfog-a1", "marvell,armada388", 17 internal-regs { 27 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; 33 gpio-keys { 34 compatible = "gpio-keys"; 35 pinctrl-0 = <&rear_button_pins>; 36 pinctrl-names = "default"; [all …]
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