/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | qcom,qusb2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Wesley Cheng <quic_wcheng@quicinc.com> 19 - items: 20 - enum: 21 - qcom,ipq6018-qusb2-phy 22 - qcom,ipq8074-qusb2-phy 23 - qcom,ipq9574-qusb2-phy [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/tilcdc/ |
H A D | panel.txt | 1 Device-Tree bindings for tilcdc DRM generic panel output driver 4 - compatible: value should be "ti,tilcdc,panel". 5 - panel-info: configuration info to configure LCDC correctly for the panel 6 - ac-bias: AC Bias Pin Frequency 7 - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt 8 - dma-burst-sz: DMA burst size 9 - bpp: Bits per pixel 10 - fdd: FIFO DMA Request Delay 11 - sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling 12 - sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore [all …]
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/openbmc/u-boot/drivers/pinctrl/rockchip/ |
H A D | pinctrl-rockchip-core.c | 1 // SPDX-License-Identifier: GPL-2.0+ 13 #include "pinctrl-rockchip.h" 22 struct rockchip_pin_ctrl *ctrl = priv->ctrl; in rockchip_verify_config() local 24 if (bank >= ctrl->nr_banks) { in rockchip_verify_config() 25 debug("pin conf bank %d >= nbanks %d\n", bank, ctrl->nr_banks); in rockchip_verify_config() 26 return -EINVAL; in rockchip_verify_config() 32 return -EINVAL; in rockchip_verify_config() 41 struct rockchip_pinctrl_priv *priv = bank->priv; in rockchip_get_recalced_mux() 42 struct rockchip_pin_ctrl *ctrl = priv->ctrl; in rockchip_get_recalced_mux() local 46 for (i = 0; i < ctrl->niomux_recalced; i++) { in rockchip_get_recalced_mux() [all …]
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/openbmc/linux/drivers/iio/adc/ |
H A D | twl4030-madc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * TWL4030 MADC module driver-This driver monitors the real time 8 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 9 * J Keerthy <j-keerthy@ti.com> 11 * Based on twl4030-madc.c 115 u8 ctrl; member 119 * struct twl4030_madc_request - madc request packet for channel conversion 126 * @raw: Return raw value, do not convert it 154 * struct twl4030_madc_data - a container for madc info 157 * @usb3v1: Pointer to bias regulator for madc [all …]
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | sc7180-idp.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 14 #include "sc7180-firmware-tfa.dtsi" 20 compatible = "qcom,sc7180-idp", "qcom,sc7180"; 30 stdout-path = "serial0:115200n8"; 42 /delete-node/ &hyp_mem; 43 /delete-node/ &xbl_mem; [all …]
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H A D | sc7180-acer-aspire1.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 /delete-node/ &tz_mem; 14 /delete-node/ &ipa_fw_mem; 19 chassis-type = "laptop"; 29 stdout-path = "serial0:115200n8"; 32 reserved-memory { 33 zap_mem: zap-shader@80840000 { [all …]
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H A D | sc7180-trogdor.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 #include <dt-bindings/sound/sc7180-lpass.h> 16 #include "sc7180-firmware-tfa.dtsi" 22 thermal-zones { 23 charger_thermal: charger-thermal { [all …]
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/openbmc/linux/drivers/media/usb/gspca/m5602/ |
H A D | m5602_ov9650.c | 1 // SPDX-License-Identifier: GPL-2.0-only 20 static int ov9650_s_ctrl(struct v4l2_ctrl *ctrl); 107 /* Enable HREF at optical black, enable ADBLC bias, 110 /* Subtract 32 from the B channel bias */ 112 /* Subtract 32 from the Gb channel bias */ 116 /* Subtract 32 from the R channel bias */ 118 /* Subtract 32 from the R channel bias */ 136 /* Set horizontal column start high to default value */ 151 /* Enable denoise, and white-pixel erase */ 307 return -ENODEV; in ov9650_probe() [all …]
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/openbmc/linux/drivers/media/i2c/s5c73m3/ |
H A D | s5c73m3-ctrls.c | 1 // SPDX-License-Identifier: GPL-2.0-only 21 #include <media/media-entity.h> 22 #include <media/v4l2-ctrls.h> 23 #include <media/v4l2-device.h> 24 #include <media/v4l2-subdev.h> 25 #include <media/v4l2-mediabus.h> 29 static int s5c73m3_get_af_status(struct s5c73m3 *state, struct v4l2_ctrl *ctrl) in s5c73m3_get_af_status() argument 39 ctrl->val = V4L2_AUTO_FOCUS_STATUS_BUSY; in s5c73m3_get_af_status() 43 ctrl->val = V4L2_AUTO_FOCUS_STATUS_REACHED; in s5c73m3_get_af_status() 46 v4l2_info(&state->sensor_sd, "Unknown AF status %#x\n", reg); in s5c73m3_get_af_status() [all …]
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/openbmc/u-boot/drivers/usb/host/ |
H A D | ehci-tegra.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright (c) 2009-2015 NVIDIA Corporation 12 #include <asm-generic/gpio.h> 14 #include <asm/arch-tegra/usb.h> 15 #include <asm/arch-tegra/clk_rst.h> 39 PARAM_CPCON, /* BASE PLLC CHARGE Pump setup ctrl */ 40 PARAM_LFCON, /* BASE PLLC LOOP FILter setup ctrl */ 41 PARAM_ENABLE_DELAY_COUNT, /* PLL-U Enable Delay Count */ 42 PARAM_STABLE_COUNT, /* PLL-U STABLE count */ 43 PARAM_ACTIVE_DELAY_COUNT, /* PLL-U Active delay count */ [all …]
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H A D | xhci-exynos5.c | 1 // SPDX-License-Identifier: GPL-2.0+ 11 * This file is a conglomeration for DWC3-init sequence and further 12 * exynos5 specific PHY-init sequence. 24 #include <asm/arch/xhci-exynos.h> 47 struct xhci_ctrl ctrl; member 56 const void *blob = gd->fdt_blob; in xhci_usb_ofdata_to_platdata() 63 plat->hcd_base = devfdt_get_addr(dev); in xhci_usb_ofdata_to_platdata() 64 if (plat->hcd_base == FDT_ADDR_T_NONE) { in xhci_usb_ofdata_to_platdata() 66 return -ENXIO; in xhci_usb_ofdata_to_platdata() 73 debug("XHCI: Can't get device node for usb3-phy controller\n"); in xhci_usb_ofdata_to_platdata() [all …]
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/openbmc/linux/drivers/media/i2c/ |
H A D | ov9650.c | 1 // SPDX-License-Identifier: GPL-2.0-only 24 #include <media/media-entity.h> 25 #include <media/v4l2-async.h> 26 #include <media/v4l2-ctrls.h> 27 #include <media/v4l2-device.h> 28 #include <media/v4l2-event.h> 29 #include <media/v4l2-image-sizes.h> 30 #include <media/v4l2-subdev.h> 31 #include <media/v4l2-mediabus.h> 35 MODULE_PARM_DESC(debug, "Debug level (0-2)"); [all …]
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H A D | ar0521.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * - Przemysłowy Instytut Automatyki i Pomiarów PIAP 12 #include <media/v4l2-ctrls.h> 13 #include <media/v4l2-fwnode.h> 14 #include <media/v4l2-subdev.h> 145 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl) in ctrl_to_sd() argument 147 return &container_of(ctrl->handler, struct ar0521_dev, in ctrl_to_sd() 148 ctrls.handler)->sd; in ctrl_to_sd() 158 return div_u64(v + d - 1, d); in div64_round_up() 163 switch (sensor->fmt.code) { in ar0521_code_to_bpp() [all …]
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/openbmc/linux/sound/soc/codecs/ |
H A D | wm8985.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * wm8985.c -- WM8985 / WM8758 ALSA SoC Audio driver 49 { 1, 0x0000 }, /* R1 - Power management 1 */ 50 { 2, 0x0000 }, /* R2 - Power management 2 */ 51 { 3, 0x0000 }, /* R3 - Power management 3 */ 52 { 4, 0x0050 }, /* R4 - Audio Interface */ 53 { 5, 0x0000 }, /* R5 - Companding control */ 54 { 6, 0x0140 }, /* R6 - Clock Gen control */ 55 { 7, 0x0000 }, /* R7 - Additional control */ 56 { 8, 0x0000 }, /* R8 - GPIO Control */ [all …]
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H A D | wm8983.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * wm8983.c -- WM8983 ALSA SoC Audio driver 29 { 0x01, 0x0000 }, /* R1 - Power management 1 */ 30 { 0x02, 0x0000 }, /* R2 - Power management 2 */ 31 { 0x03, 0x0000 }, /* R3 - Power management 3 */ 32 { 0x04, 0x0050 }, /* R4 - Audio Interface */ 33 { 0x05, 0x0000 }, /* R5 - Companding control */ 34 { 0x06, 0x0140 }, /* R6 - Clock Gen control */ 35 { 0x07, 0x0000 }, /* R7 - Additional control */ 36 { 0x08, 0x0000 }, /* R8 - GPIO Control */ [all …]
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/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_hw_util.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 96 if (c->log_mask & dpu_hw_util_log_mask) in dpu_reg_write() 99 writel_relaxed(val, c->blk_addr + reg_off); in dpu_reg_write() 104 return readl_relaxed(c->blk_addr + reg_off); in dpu_reg_read() 128 lut_flags = (unsigned long) scaler3_cfg->lut_flag; in _dpu_hw_setup_scaler3_lut() 130 (scaler3_cfg->dir_len == QSEED3_DIR_LUT_SIZE)) { in _dpu_hw_setup_scaler3_lut() 131 lut[0] = scaler3_cfg->dir_lut; in _dpu_hw_setup_scaler3_lut() 135 (scaler3_cfg->y_rgb_cir_lut_idx < QSEED3_CIRCULAR_LUTS) && in _dpu_hw_setup_scaler3_lut() [all …]
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/openbmc/linux/sound/pci/ |
H A D | ens1370.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 8 /* Power-Management-Code ( CONFIG_PM ) 11 * using https://www.kernel.org/doc/html/latest/sound/kernel-api/writing-an-alsa-driver.html 64 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 80 MODULE_PARM_DESC(index, "Index value for Ensoniq AudioPCI soundcard."); 96 MODULE_PARM_DESC(spdif, "S/PDIF output (-1 = none, 0 = auto, 1 = force)."); 111 #define CT5880REV_CT5880_D 0x03 /* ??? -jk */ 121 #define ES_REG(ensoniq, x) ((ensoniq)->port + ES_REG_##x) 135 #define ES_1371_GPIO_IN(i) (((i)>>20)&0x0f)/* GPIO in [3:0] pins - R/O */ 139 #define ES_1371_GPIO_OUT(o) (((o)&0x0f)<<16)/* GPIO out [3:0] pins - W/R */ [all …]
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/openbmc/linux/drivers/phy/qualcomm/ |
H A D | phy-qcom-qusb2.c | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <linux/nvmem-consumer.h> 22 #include <dt-bindings/phy/phy-qcom-qusb2.h> 105 * if yes, then offset gives index in the reg-layout 123 /* set of registers with offsets different per-PHY */ 288 /* true if TUNE1 register must be updated by fused value, else TUNE2 */ 294 /* true if PHY default clk scheme is single-ended */ 373 "vdd", "vdda-pll", "vdda-phy-dpdm", 378 /* struct override_param - structure holding qusb2 v2 phy overriding param 380 * to value [all …]
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/openbmc/u-boot/drivers/video/ |
H A D | am335x-fb.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2013-2018 Hannes Schmelzer <oe5hpm@oevsv.at> 4 * B&R Industrial Automation GmbH - http://www.br-automation.com 7 * Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c) 9 * - supporting 16/24/32bit RGB/TFT raster Mode (not using palette) 10 * - sets up LCD controller as in 'am335x_lcdpanel' struct given 11 * - starts output DMA from gd->fb_base buffer 20 #include "am335x-fb.h" 23 #error "hw-base address of LCD-Controller (LCD_CNTL_BASE) not defined!" 43 #define LCD_HBPLSB(x) ((((x)-1) & 0xFF) << 24) [all …]
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/openbmc/linux/drivers/staging/media/atomisp/i2c/ |
H A D | atomisp-gc0310.c | 1 // SPDX-License-Identifier: GPL-2.0 29 #include <media/v4l2-ctrls.h> 30 #include <media/v4l2-device.h> 74 #define GC0310_START_STREAMING 0x94 /* 8-bit enable */ 75 #define GC0310_STOP_STREAMING 0x0 /* 8-bit disable */ 170 { 0x1e, 0x6b }, /* 3b//col bias */ 243 { 0x46, 0xf0 }, /* 0xff //f0//sun value th */ 274 * gc0310_write_reg_array - Initializes a list of GC0310 registers 277 * @count: number of register, value pairs in the list 287 dev_err(&client->dev, "write error: wrote 0x%x to offset 0x%x error %d", in gc0310_write_reg_array() [all …]
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/openbmc/linux/arch/m68k/ifpsp060/src/ |
H A D | pfpsp.S | 3 M68000 Hi-Performance Microprocessor Division 5 Production Release P1.00 -- October 10, 1994 97 mov.l %d0,-(%sp) 98 mov.l (_060FPSP_TABLE-0x80+_off_done,%pc),%d0 99 pea.l (_060FPSP_TABLE-0x80,%pc,%d0) 105 mov.l %d0,-(%sp) 106 mov.l (_060FPSP_TABLE-0x80+_off_ovfl,%pc),%d0 107 pea.l (_060FPSP_TABLE-0x80,%pc,%d0) 113 mov.l %d0,-(%sp) 114 mov.l (_060FPSP_TABLE-0x80+_off_unfl,%pc),%d0 [all …]
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H A D | fplsp.S | 3 M68000 Hi-Performance Microprocessor Division 5 Production Release P1.00 -- October 10, 1994 276 set LV, -LOCAL_SIZE # stack offset 285 set EXC_AREGS, -68 # offset of all address regs 286 set EXC_DREGS, -100 # offset of all data regs 287 set EXC_FPREGS, -36 # offset of all fp regs 373 set FTEMP_SGN, 2 # value saved in memory. 380 set LOCAL_SGN, 2 # value saved in memory. 387 set DST_HI, 4 # value saved in memory. 392 set SRC_HI, 4 # value saved in memory. [all …]
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am335x-sl50.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/ 5 /dts-v1/; 8 #include <dt-bindings/pwm/pwm.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 13 compatible = "tcl,am335x-sl50", "ti,am33xx"; 17 cpu0-supply = <&dcdc2_reg>; 27 stdout-path = &uart0; 31 compatible = "gpio-leds"; 32 pinctrl-names = "default"; [all …]
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/openbmc/linux/drivers/media/platform/verisilicon/ |
H A D | hantro_hw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 13 #include <linux/v4l2-controls.h> 14 #include <media/v4l2-ctrls.h> 15 #include <media/v4l2-vp9.h> 16 #include <media/videobuf2-core.h> 49 * struct hantro_aux_buf - auxiliary DMA buffer for hardware data 101 * @dpb_longterm: DPB long-term 218 * @tile_r_info: per-tile information array 219 * @tile_c_info: per-tile information array 285 * @db_ctrl_col: db tile col ctrl buffer [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | am335x-rut.dts | 6 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 12 /dts-v1/; 15 #include <dt-bindings/input/input.h> 19 compatible = "ti,am335x-evm", "ti,am33xx"; 22 compatible = "pwm-beeper"; 27 stdout-path = &uart0; 28 tick-timer = &timer2; 33 cpu0-supply = <&dcdc2_reg>; 37 gpio_keys: powerfail-keys { 38 compatible = "gpio-keys"; [all …]
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