1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Support for GalaxyCore GC0310 VGA camera sensor.
4 *
5 * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
6 * Copyright (c) 2023 Hans de Goede <hdegoede@redhat.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License version
10 * 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19 #include <linux/delay.h>
20 #include <linux/errno.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/i2c.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/string.h>
27 #include <linux/types.h>
28
29 #include <media/v4l2-ctrls.h>
30 #include <media/v4l2-device.h>
31
32 #define GC0310_NATIVE_WIDTH 656
33 #define GC0310_NATIVE_HEIGHT 496
34
35 #define GC0310_FPS 30
36 #define GC0310_SKIP_FRAMES 3
37
38 #define GC0310_FOCAL_LENGTH_NUM 278 /* 2.78mm */
39
40 #define GC0310_ID 0xa310
41
42 #define GC0310_RESET_RELATED 0xFE
43 #define GC0310_REGISTER_PAGE_0 0x0
44 #define GC0310_REGISTER_PAGE_3 0x3
45
46 /*
47 * GC0310 System control registers
48 */
49 #define GC0310_SW_STREAM 0x10
50
51 #define GC0310_SC_CMMN_CHIP_ID_H 0xf0
52 #define GC0310_SC_CMMN_CHIP_ID_L 0xf1
53
54 #define GC0310_AEC_PK_EXPO_H 0x03
55 #define GC0310_AEC_PK_EXPO_L 0x04
56 #define GC0310_AGC_ADJ 0x48
57 #define GC0310_DGC_ADJ 0x71
58 #define GC0310_GROUP_ACCESS 0x3208
59
60 #define GC0310_H_CROP_START_H 0x09
61 #define GC0310_H_CROP_START_L 0x0A
62 #define GC0310_V_CROP_START_H 0x0B
63 #define GC0310_V_CROP_START_L 0x0C
64 #define GC0310_H_OUTSIZE_H 0x0F
65 #define GC0310_H_OUTSIZE_L 0x10
66 #define GC0310_V_OUTSIZE_H 0x0D
67 #define GC0310_V_OUTSIZE_L 0x0E
68 #define GC0310_H_BLANKING_H 0x05
69 #define GC0310_H_BLANKING_L 0x06
70 #define GC0310_V_BLANKING_H 0x07
71 #define GC0310_V_BLANKING_L 0x08
72 #define GC0310_SH_DELAY 0x11
73
74 #define GC0310_START_STREAMING 0x94 /* 8-bit enable */
75 #define GC0310_STOP_STREAMING 0x0 /* 8-bit disable */
76
77 #define to_gc0310_sensor(x) container_of(x, struct gc0310_device, sd)
78
79 struct gc0310_device {
80 struct v4l2_subdev sd;
81 struct media_pad pad;
82 /* Protect against concurrent changes to controls */
83 struct mutex input_lock;
84 bool is_streaming;
85
86 struct fwnode_handle *ep_fwnode;
87 struct gpio_desc *reset;
88 struct gpio_desc *powerdown;
89
90 struct gc0310_mode {
91 struct v4l2_mbus_framefmt fmt;
92 } mode;
93
94 struct gc0310_ctrls {
95 struct v4l2_ctrl_handler handler;
96 struct v4l2_ctrl *exposure;
97 struct v4l2_ctrl *gain;
98 } ctrls;
99 };
100
101 struct gc0310_reg {
102 u8 reg;
103 u8 val;
104 };
105
106 static const struct gc0310_reg gc0310_reset_register[] = {
107 /* System registers */
108 { 0xfe, 0xf0 },
109 { 0xfe, 0xf0 },
110 { 0xfe, 0x00 },
111
112 { 0xfc, 0x0e }, /* 4e */
113 { 0xfc, 0x0e }, /* 16//4e // [0]apwd [6]regf_clk_gate */
114 { 0xf2, 0x80 }, /* sync output */
115 { 0xf3, 0x00 }, /* 1f//01 data output */
116 { 0xf7, 0x33 }, /* f9 */
117 { 0xf8, 0x05 }, /* 00 */
118 { 0xf9, 0x0e }, /* 0x8e //0f */
119 { 0xfa, 0x11 },
120
121 /* MIPI */
122 { 0xfe, 0x03 },
123 { 0x01, 0x03 }, /* mipi 1lane */
124 { 0x02, 0x22 }, /* 0x33 */
125 { 0x03, 0x94 },
126 { 0x04, 0x01 }, /* fifo_prog */
127 { 0x05, 0x00 }, /* fifo_prog */
128 { 0x06, 0x80 }, /* b0 //YUV ISP data */
129 { 0x11, 0x2a }, /* 1e //LDI set YUV422 */
130 { 0x12, 0x90 }, /* 00 //04 //00 //04//00 //LWC[7:0] */
131 { 0x13, 0x02 }, /* 05 //05 //LWC[15:8] */
132 { 0x15, 0x12 }, /* 0x10 //DPHYY_MODE read_ready */
133 { 0x17, 0x01 },
134 { 0x40, 0x08 },
135 { 0x41, 0x00 },
136 { 0x42, 0x00 },
137 { 0x43, 0x00 },
138 { 0x21, 0x02 }, /* 0x01 */
139 { 0x22, 0x02 }, /* 0x01 */
140 { 0x23, 0x01 }, /* 0x05 //Nor:0x05 DOU:0x06 */
141 { 0x29, 0x00 },
142 { 0x2A, 0x25 }, /* 0x05 //data zero 0x7a de */
143 { 0x2B, 0x02 },
144
145 { 0xfe, 0x00 },
146
147 /* CISCTL */
148 { 0x00, 0x2f }, /* 2f//0f//02//01 */
149 { 0x01, 0x0f }, /* 06 */
150 { 0x02, 0x04 },
151 { 0x4f, 0x00 }, /* AEC 0FF */
152 { 0x03, 0x01 }, /* 0x03 //04 */
153 { 0x04, 0xc0 }, /* 0xe8 //58 */
154 { 0x05, 0x00 },
155 { 0x06, 0xb2 }, /* 0x0a //HB */
156 { 0x07, 0x00 },
157 { 0x08, 0x0c }, /* 0x89 //VB */
158 { 0x09, 0x00 }, /* row start */
159 { 0x0a, 0x00 },
160 { 0x0b, 0x00 }, /* col start */
161 { 0x0c, 0x00 },
162 { 0x0d, 0x01 }, /* height */
163 { 0x0e, 0xf2 }, /* 0xf7 //height */
164 { 0x0f, 0x02 }, /* width */
165 { 0x10, 0x94 }, /* 0xa0 //height */
166 { 0x17, 0x14 },
167 { 0x18, 0x1a }, /* 0a//[4]double reset */
168 { 0x19, 0x14 }, /* AD pipeline */
169 { 0x1b, 0x48 },
170 { 0x1e, 0x6b }, /* 3b//col bias */
171 { 0x1f, 0x28 }, /* 20//00//08//txlow */
172 { 0x20, 0x89 }, /* 88//0c//[3:2]DA15 */
173 { 0x21, 0x49 }, /* 48//[3] txhigh */
174 { 0x22, 0xb0 },
175 { 0x23, 0x04 }, /* [1:0]vcm_r */
176 { 0x24, 0x16 }, /* 15 */
177 { 0x34, 0x20 }, /* [6:4] rsg high//range */
178
179 /* BLK */
180 { 0x26, 0x23 }, /* [1]dark_current_en [0]offset_en */
181 { 0x28, 0xff }, /* BLK_limie_value */
182 { 0x29, 0x00 }, /* global offset */
183 { 0x33, 0x18 }, /* offset_ratio */
184 { 0x37, 0x20 }, /* dark_current_ratio */
185 { 0x2a, 0x00 },
186 { 0x2b, 0x00 },
187 { 0x2c, 0x00 },
188 { 0x2d, 0x00 },
189 { 0x2e, 0x00 },
190 { 0x2f, 0x00 },
191 { 0x30, 0x00 },
192 { 0x31, 0x00 },
193 { 0x47, 0x80 }, /* a7 */
194 { 0x4e, 0x66 }, /* select_row */
195 { 0xa8, 0x02 }, /* win_width_dark, same with crop_win_width */
196 { 0xa9, 0x80 },
197
198 /* ISP */
199 { 0x40, 0x06 }, /* 0xff //ff //48 */
200 { 0x41, 0x00 }, /* 0x21 //00//[0]curve_en */
201 { 0x42, 0x04 }, /* 0xcf //0a//[1]awn_en */
202 { 0x44, 0x18 }, /* 0x18 //02 */
203 { 0x46, 0x02 }, /* 0x03 //sync */
204 { 0x49, 0x03 },
205 { 0x4c, 0x20 }, /* 00[5]pretect exp */
206 { 0x50, 0x01 }, /* crop enable */
207 { 0x51, 0x00 },
208 { 0x52, 0x00 },
209 { 0x53, 0x00 },
210 { 0x54, 0x01 },
211 { 0x55, 0x01 }, /* crop window height */
212 { 0x56, 0xf0 },
213 { 0x57, 0x02 }, /* crop window width */
214 { 0x58, 0x90 },
215
216 /* Gain */
217 { 0x70, 0x70 }, /* 70 //80//global gain */
218 { 0x71, 0x20 }, /* pregain gain */
219 { 0x72, 0x40 }, /* post gain */
220 { 0x5a, 0x84 }, /* 84//analog gain 0 */
221 { 0x5b, 0xc9 }, /* c9 */
222 { 0x5c, 0xed }, /* ed//not use pga gain highest level */
223 { 0x77, 0x40 }, /* R gain 0x74 //awb gain */
224 { 0x78, 0x40 }, /* G gain */
225 { 0x79, 0x40 }, /* B gain 0x5f */
226
227 { 0x48, 0x00 },
228 { 0xfe, 0x01 },
229 { 0x0a, 0x45 }, /* [7]col gain mode */
230
231 { 0x3e, 0x40 },
232 { 0x3f, 0x5c },
233 { 0x40, 0x7b },
234 { 0x41, 0xbd },
235 { 0x42, 0xf6 },
236 { 0x43, 0x63 },
237 { 0x03, 0x60 },
238 { 0x44, 0x03 },
239
240 /* Dark / Sun mode related */
241 { 0xfe, 0x01 },
242 { 0x45, 0xa4 }, /* 0xf7 */
243 { 0x46, 0xf0 }, /* 0xff //f0//sun value th */
244 { 0x48, 0x03 }, /* sun mode */
245 { 0x4f, 0x60 }, /* sun_clamp */
246 { 0xfe, 0x00 },
247 };
248
249 static const struct gc0310_reg gc0310_VGA_30fps[] = {
250 { 0xfe, 0x00 },
251 { 0x0d, 0x01 }, /* height */
252 { 0x0e, 0xf2 }, /* 0xf7 //height */
253 { 0x0f, 0x02 }, /* width */
254 { 0x10, 0x94 }, /* 0xa0 //height */
255
256 { 0x50, 0x01 }, /* crop enable */
257 { 0x51, 0x00 },
258 { 0x52, 0x00 },
259 { 0x53, 0x00 },
260 { 0x54, 0x01 },
261 { 0x55, 0x01 }, /* crop window height */
262 { 0x56, 0xf0 },
263 { 0x57, 0x02 }, /* crop window width */
264 { 0x58, 0x90 },
265
266 { 0xfe, 0x03 },
267 { 0x12, 0x90 }, /* 00 //04 //00 //04//00 //LWC[7:0] */
268 { 0x13, 0x02 }, /* 05 //05 //LWC[15:8] */
269
270 { 0xfe, 0x00 },
271 };
272
273 /*
274 * gc0310_write_reg_array - Initializes a list of GC0310 registers
275 * @client: i2c driver client structure
276 * @reglist: list of registers to be written
277 * @count: number of register, value pairs in the list
278 */
gc0310_write_reg_array(struct i2c_client * client,const struct gc0310_reg * reglist,int count)279 static int gc0310_write_reg_array(struct i2c_client *client,
280 const struct gc0310_reg *reglist, int count)
281 {
282 int i, err;
283
284 for (i = 0; i < count; i++) {
285 err = i2c_smbus_write_byte_data(client, reglist[i].reg, reglist[i].val);
286 if (err) {
287 dev_err(&client->dev, "write error: wrote 0x%x to offset 0x%x error %d",
288 reglist[i].val, reglist[i].reg, err);
289 return err;
290 }
291 }
292
293 return 0;
294 }
295
gc0310_exposure_set(struct gc0310_device * dev,u32 exp)296 static int gc0310_exposure_set(struct gc0310_device *dev, u32 exp)
297 {
298 struct i2c_client *client = v4l2_get_subdevdata(&dev->sd);
299
300 return i2c_smbus_write_word_swapped(client, GC0310_AEC_PK_EXPO_H, exp);
301 }
302
gc0310_gain_set(struct gc0310_device * dev,u32 gain)303 static int gc0310_gain_set(struct gc0310_device *dev, u32 gain)
304 {
305 struct i2c_client *client = v4l2_get_subdevdata(&dev->sd);
306 u8 again, dgain;
307 int ret;
308
309 /* Taken from original driver, this never sets dgain lower then 32? */
310
311 /* Change 0 - 95 to 32 - 127 */
312 gain += 32;
313
314 if (gain < 64) {
315 again = 0x0; /* sqrt(2) */
316 dgain = gain;
317 } else {
318 again = 0x2; /* 2 * sqrt(2) */
319 dgain = gain / 2;
320 }
321
322 ret = i2c_smbus_write_byte_data(client, GC0310_AGC_ADJ, again);
323 if (ret)
324 return ret;
325
326 return i2c_smbus_write_byte_data(client, GC0310_DGC_ADJ, dgain);
327 }
328
gc0310_s_ctrl(struct v4l2_ctrl * ctrl)329 static int gc0310_s_ctrl(struct v4l2_ctrl *ctrl)
330 {
331 struct gc0310_device *dev =
332 container_of(ctrl->handler, struct gc0310_device, ctrls.handler);
333 int ret;
334
335 /* Only apply changes to the controls if the device is powered up */
336 if (!pm_runtime_get_if_in_use(dev->sd.dev))
337 return 0;
338
339 switch (ctrl->id) {
340 case V4L2_CID_EXPOSURE:
341 ret = gc0310_exposure_set(dev, ctrl->val);
342 break;
343 case V4L2_CID_GAIN:
344 ret = gc0310_gain_set(dev, ctrl->val);
345 break;
346 default:
347 ret = -EINVAL;
348 break;
349 }
350
351 pm_runtime_put(dev->sd.dev);
352 return ret;
353 }
354
355 static const struct v4l2_ctrl_ops ctrl_ops = {
356 .s_ctrl = gc0310_s_ctrl,
357 };
358
359 static struct v4l2_mbus_framefmt *
gc0310_get_pad_format(struct gc0310_device * dev,struct v4l2_subdev_state * state,unsigned int pad,enum v4l2_subdev_format_whence which)360 gc0310_get_pad_format(struct gc0310_device *dev,
361 struct v4l2_subdev_state *state,
362 unsigned int pad, enum v4l2_subdev_format_whence which)
363 {
364 if (which == V4L2_SUBDEV_FORMAT_TRY)
365 return v4l2_subdev_get_try_format(&dev->sd, state, pad);
366
367 return &dev->mode.fmt;
368 }
369
370 /* The GC0310 currently only supports 1 fixed fmt */
gc0310_fill_format(struct v4l2_mbus_framefmt * fmt)371 static void gc0310_fill_format(struct v4l2_mbus_framefmt *fmt)
372 {
373 memset(fmt, 0, sizeof(*fmt));
374 fmt->width = GC0310_NATIVE_WIDTH;
375 fmt->height = GC0310_NATIVE_HEIGHT;
376 fmt->field = V4L2_FIELD_NONE;
377 fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8;
378 }
379
gc0310_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)380 static int gc0310_set_fmt(struct v4l2_subdev *sd,
381 struct v4l2_subdev_state *sd_state,
382 struct v4l2_subdev_format *format)
383 {
384 struct gc0310_device *dev = to_gc0310_sensor(sd);
385 struct v4l2_mbus_framefmt *fmt;
386
387 fmt = gc0310_get_pad_format(dev, sd_state, format->pad, format->which);
388 gc0310_fill_format(fmt);
389
390 format->format = *fmt;
391 return 0;
392 }
393
gc0310_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)394 static int gc0310_get_fmt(struct v4l2_subdev *sd,
395 struct v4l2_subdev_state *sd_state,
396 struct v4l2_subdev_format *format)
397 {
398 struct gc0310_device *dev = to_gc0310_sensor(sd);
399 struct v4l2_mbus_framefmt *fmt;
400
401 fmt = gc0310_get_pad_format(dev, sd_state, format->pad, format->which);
402 format->format = *fmt;
403 return 0;
404 }
405
gc0310_detect(struct i2c_client * client)406 static int gc0310_detect(struct i2c_client *client)
407 {
408 struct i2c_adapter *adapter = client->adapter;
409 int ret;
410
411 if (!i2c_check_functionality(adapter, I2C_FUNC_I2C))
412 return -ENODEV;
413
414 ret = pm_runtime_get_sync(&client->dev);
415 if (ret >= 0)
416 ret = i2c_smbus_read_word_swapped(client, GC0310_SC_CMMN_CHIP_ID_H);
417 pm_runtime_put(&client->dev);
418 if (ret < 0) {
419 dev_err(&client->dev, "read sensor_id failed: %d\n", ret);
420 return -ENODEV;
421 }
422
423 dev_dbg(&client->dev, "sensor ID = 0x%x\n", ret);
424
425 if (ret != GC0310_ID) {
426 dev_err(&client->dev, "sensor ID error, read id = 0x%x, target id = 0x%x\n",
427 ret, GC0310_ID);
428 return -ENODEV;
429 }
430
431 dev_dbg(&client->dev, "detect gc0310 success\n");
432
433 return 0;
434 }
435
gc0310_s_stream(struct v4l2_subdev * sd,int enable)436 static int gc0310_s_stream(struct v4l2_subdev *sd, int enable)
437 {
438 struct gc0310_device *dev = to_gc0310_sensor(sd);
439 struct i2c_client *client = v4l2_get_subdevdata(sd);
440 int ret = 0;
441
442 dev_dbg(&client->dev, "%s S enable=%d\n", __func__, enable);
443 mutex_lock(&dev->input_lock);
444
445 if (dev->is_streaming == enable) {
446 dev_warn(&client->dev, "stream already %s\n", enable ? "started" : "stopped");
447 goto error_unlock;
448 }
449
450 if (enable) {
451 ret = pm_runtime_get_sync(&client->dev);
452 if (ret < 0)
453 goto error_power_down;
454
455 msleep(100);
456
457 ret = gc0310_write_reg_array(client, gc0310_reset_register,
458 ARRAY_SIZE(gc0310_reset_register));
459 if (ret)
460 goto error_power_down;
461
462 ret = gc0310_write_reg_array(client, gc0310_VGA_30fps,
463 ARRAY_SIZE(gc0310_VGA_30fps));
464 if (ret)
465 goto error_power_down;
466
467 /* restore value of all ctrls */
468 ret = __v4l2_ctrl_handler_setup(&dev->ctrls.handler);
469 if (ret)
470 goto error_power_down;
471
472 /* enable per frame MIPI and sensor ctrl reset */
473 ret = i2c_smbus_write_byte_data(client, 0xFE, 0x30);
474 if (ret)
475 goto error_power_down;
476 }
477
478 ret = i2c_smbus_write_byte_data(client, GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_3);
479 if (ret)
480 goto error_power_down;
481
482 ret = i2c_smbus_write_byte_data(client, GC0310_SW_STREAM,
483 enable ? GC0310_START_STREAMING : GC0310_STOP_STREAMING);
484 if (ret)
485 goto error_power_down;
486
487 ret = i2c_smbus_write_byte_data(client, GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_0);
488 if (ret)
489 goto error_power_down;
490
491 if (!enable)
492 pm_runtime_put(&client->dev);
493
494 dev->is_streaming = enable;
495 mutex_unlock(&dev->input_lock);
496 return 0;
497
498 error_power_down:
499 pm_runtime_put(&client->dev);
500 dev->is_streaming = false;
501 error_unlock:
502 mutex_unlock(&dev->input_lock);
503 return ret;
504 }
505
gc0310_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * interval)506 static int gc0310_g_frame_interval(struct v4l2_subdev *sd,
507 struct v4l2_subdev_frame_interval *interval)
508 {
509 interval->interval.numerator = 1;
510 interval->interval.denominator = GC0310_FPS;
511
512 return 0;
513 }
514
gc0310_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)515 static int gc0310_enum_mbus_code(struct v4l2_subdev *sd,
516 struct v4l2_subdev_state *sd_state,
517 struct v4l2_subdev_mbus_code_enum *code)
518 {
519 /* We support only a single format */
520 if (code->index)
521 return -EINVAL;
522
523 code->code = MEDIA_BUS_FMT_SGRBG8_1X8;
524 return 0;
525 }
526
gc0310_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)527 static int gc0310_enum_frame_size(struct v4l2_subdev *sd,
528 struct v4l2_subdev_state *sd_state,
529 struct v4l2_subdev_frame_size_enum *fse)
530 {
531 /* We support only a single resolution */
532 if (fse->index)
533 return -EINVAL;
534
535 fse->min_width = GC0310_NATIVE_WIDTH;
536 fse->max_width = GC0310_NATIVE_WIDTH;
537 fse->min_height = GC0310_NATIVE_HEIGHT;
538 fse->max_height = GC0310_NATIVE_HEIGHT;
539
540 return 0;
541 }
542
gc0310_g_skip_frames(struct v4l2_subdev * sd,u32 * frames)543 static int gc0310_g_skip_frames(struct v4l2_subdev *sd, u32 *frames)
544 {
545 *frames = GC0310_SKIP_FRAMES;
546 return 0;
547 }
548
549 static const struct v4l2_subdev_sensor_ops gc0310_sensor_ops = {
550 .g_skip_frames = gc0310_g_skip_frames,
551 };
552
553 static const struct v4l2_subdev_video_ops gc0310_video_ops = {
554 .s_stream = gc0310_s_stream,
555 .g_frame_interval = gc0310_g_frame_interval,
556 };
557
558 static const struct v4l2_subdev_pad_ops gc0310_pad_ops = {
559 .enum_mbus_code = gc0310_enum_mbus_code,
560 .enum_frame_size = gc0310_enum_frame_size,
561 .get_fmt = gc0310_get_fmt,
562 .set_fmt = gc0310_set_fmt,
563 };
564
565 static const struct v4l2_subdev_ops gc0310_ops = {
566 .video = &gc0310_video_ops,
567 .pad = &gc0310_pad_ops,
568 .sensor = &gc0310_sensor_ops,
569 };
570
gc0310_init_controls(struct gc0310_device * dev)571 static int gc0310_init_controls(struct gc0310_device *dev)
572 {
573 struct v4l2_ctrl_handler *hdl = &dev->ctrls.handler;
574
575 v4l2_ctrl_handler_init(hdl, 2);
576
577 /* Use the same lock for controls as for everything else */
578 hdl->lock = &dev->input_lock;
579 dev->sd.ctrl_handler = hdl;
580
581 dev->ctrls.exposure =
582 v4l2_ctrl_new_std(hdl, &ctrl_ops, V4L2_CID_EXPOSURE, 0, 4095, 1, 1023);
583
584 /* 32 steps at base gain 1 + 64 half steps at base gain 2 */
585 dev->ctrls.gain =
586 v4l2_ctrl_new_std(hdl, &ctrl_ops, V4L2_CID_GAIN, 0, 95, 1, 31);
587
588 return hdl->error;
589 }
590
gc0310_remove(struct i2c_client * client)591 static void gc0310_remove(struct i2c_client *client)
592 {
593 struct v4l2_subdev *sd = i2c_get_clientdata(client);
594 struct gc0310_device *dev = to_gc0310_sensor(sd);
595
596 dev_dbg(&client->dev, "gc0310_remove...\n");
597
598 v4l2_async_unregister_subdev(sd);
599 media_entity_cleanup(&dev->sd.entity);
600 v4l2_ctrl_handler_free(&dev->ctrls.handler);
601 mutex_destroy(&dev->input_lock);
602 fwnode_handle_put(dev->ep_fwnode);
603 pm_runtime_disable(&client->dev);
604 }
605
gc0310_probe(struct i2c_client * client)606 static int gc0310_probe(struct i2c_client *client)
607 {
608 struct gc0310_device *dev;
609 int ret;
610
611 dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
612 if (!dev)
613 return -ENOMEM;
614
615 /*
616 * Sometimes the fwnode graph is initialized by the bridge driver.
617 * Bridge drivers doing this may also add GPIO mappings, wait for this.
618 */
619 dev->ep_fwnode = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL);
620 if (!dev->ep_fwnode)
621 return dev_err_probe(&client->dev, -EPROBE_DEFER, "waiting for fwnode graph endpoint\n");
622
623 dev->reset = devm_gpiod_get(&client->dev, "reset", GPIOD_OUT_HIGH);
624 if (IS_ERR(dev->reset)) {
625 fwnode_handle_put(dev->ep_fwnode);
626 return dev_err_probe(&client->dev, PTR_ERR(dev->reset),
627 "getting reset GPIO\n");
628 }
629
630 dev->powerdown = devm_gpiod_get(&client->dev, "powerdown", GPIOD_OUT_HIGH);
631 if (IS_ERR(dev->powerdown)) {
632 fwnode_handle_put(dev->ep_fwnode);
633 return dev_err_probe(&client->dev, PTR_ERR(dev->powerdown),
634 "getting powerdown GPIO\n");
635 }
636
637 mutex_init(&dev->input_lock);
638 v4l2_i2c_subdev_init(&dev->sd, client, &gc0310_ops);
639 gc0310_fill_format(&dev->mode.fmt);
640
641 pm_runtime_set_suspended(&client->dev);
642 pm_runtime_enable(&client->dev);
643 pm_runtime_set_autosuspend_delay(&client->dev, 1000);
644 pm_runtime_use_autosuspend(&client->dev);
645
646 ret = gc0310_detect(client);
647 if (ret) {
648 gc0310_remove(client);
649 return ret;
650 }
651
652 dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
653 dev->pad.flags = MEDIA_PAD_FL_SOURCE;
654 dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
655 dev->sd.fwnode = dev->ep_fwnode;
656
657 ret = gc0310_init_controls(dev);
658 if (ret) {
659 gc0310_remove(client);
660 return ret;
661 }
662
663 ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad);
664 if (ret) {
665 gc0310_remove(client);
666 return ret;
667 }
668
669 ret = v4l2_async_register_subdev_sensor(&dev->sd);
670 if (ret) {
671 gc0310_remove(client);
672 return ret;
673 }
674
675 return 0;
676 }
677
gc0310_suspend(struct device * dev)678 static int gc0310_suspend(struct device *dev)
679 {
680 struct v4l2_subdev *sd = dev_get_drvdata(dev);
681 struct gc0310_device *gc0310_dev = to_gc0310_sensor(sd);
682
683 gpiod_set_value_cansleep(gc0310_dev->powerdown, 1);
684 gpiod_set_value_cansleep(gc0310_dev->reset, 1);
685 return 0;
686 }
687
gc0310_resume(struct device * dev)688 static int gc0310_resume(struct device *dev)
689 {
690 struct v4l2_subdev *sd = dev_get_drvdata(dev);
691 struct gc0310_device *gc0310_dev = to_gc0310_sensor(sd);
692
693 usleep_range(10000, 15000);
694 gpiod_set_value_cansleep(gc0310_dev->reset, 0);
695 usleep_range(10000, 15000);
696 gpiod_set_value_cansleep(gc0310_dev->powerdown, 0);
697
698 return 0;
699 }
700
701 static DEFINE_RUNTIME_DEV_PM_OPS(gc0310_pm_ops, gc0310_suspend, gc0310_resume, NULL);
702
703 static const struct acpi_device_id gc0310_acpi_match[] = {
704 {"INT0310"},
705 {},
706 };
707 MODULE_DEVICE_TABLE(acpi, gc0310_acpi_match);
708
709 static struct i2c_driver gc0310_driver = {
710 .driver = {
711 .name = "gc0310",
712 .pm = pm_sleep_ptr(&gc0310_pm_ops),
713 .acpi_match_table = gc0310_acpi_match,
714 },
715 .probe = gc0310_probe,
716 .remove = gc0310_remove,
717 };
718 module_i2c_driver(gc0310_driver);
719
720 MODULE_AUTHOR("Lai, Angie <angie.lai@intel.com>");
721 MODULE_DESCRIPTION("A low-level driver for GalaxyCore GC0310 sensors");
722 MODULE_LICENSE("GPL");
723