/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | aspeed-lpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Aspeed Low Pin Count (LPC) Bus Controller 11 - Andrew Jeffery <andrew@aj.id.au> 12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com> 15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth 17 primary use case of the Aspeed LPC controller is as a slave on the bus 21 The LPC controller is represented as a multi-function device to account for the [all …]
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/openbmc/linux/arch/arm/boot/dts/aspeed/ |
H A D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6 #include <dt-bindings/clock/ast2600-clock.h> 10 compatible = "aspeed,ast2600"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 47 #address-cells = <1>; 48 #size-cells = <0>; [all …]
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H A D | aspeed-bmc-ibm-bonnell.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 /dts-v1/; 5 #include "aspeed-g6.dtsi" 6 #include <dt-bindings/gpio/aspeed-gpio.h> 7 #include <dt-bindings/i2c/i2c.h> 8 #include <dt-bindings/leds/leds-pca955x.h> 12 compatible = "ibm,bonnell-bmc", "aspeed,ast2600"; 23 stdout-path = &uart5; 32 reserved-memory { 33 #address-cells = <1>; [all …]
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H A D | aspeed-bmc-opp-tacoma.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 /dts-v1/; 5 #include "aspeed-g6.dtsi" 6 #include <dt-bindings/gpio/aspeed-gpio.h> 7 #include <dt-bindings/i2c/i2c.h> 8 #include <dt-bindings/leds/leds-pca955x.h> 12 compatible = "ibm,tacoma-bmc", "aspeed,ast2600"; 15 stdout-path = &uart5; 24 reserved-memory { 25 #address-cells = <1>; [all …]
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H A D | aspeed-bmc-facebook-harma.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 /dts-v1/; 5 #include "aspeed-g6.dtsi" 6 #include <dt-bindings/gpio/aspeed-gpio.h> 7 #include <dt-bindings/i2c/i2c.h> 11 compatible = "facebook,harma-bmc", "aspeed,ast2600"; 32 stdout-path = &uart5; 40 iio-hwmon { 41 compatible = "iio-hwmon"; 42 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, [all …]
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H A D | aspeed-bmc-inventec-starscream.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 /dts-v1/; 6 #include "aspeed-g6.dtsi" 7 #include "aspeed-g6-pinctrl.dtsi" 8 #include <dt-bindings/i2c/i2c.h> 9 #include <dt-bindings/gpio/aspeed-gpio.h> 13 compatible = "inventec,starscream-bmc", "aspeed,ast2600"; 20 stdout-path = &uart5; 28 reserved-memory { 29 #address-cells = <1>; [all …]
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H A D | aspeed-bmc-ufispace-ncplite.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 /dts-v1/; 5 #include "aspeed-g6.dtsi" 6 #include <dt-bindings/i2c/i2c.h> 7 #include <dt-bindings/gpio/aspeed-gpio.h> 11 compatible = "ufispace,ncplite-bmc", "aspeed,ast2600"; 18 stdout-path = &uart5; 27 iio-hwmon { 28 compatible = "iio-hwmon"; 29 io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>, [all …]
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H A D | aspeed-bmc-ibm-blueridge.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 /dts-v1/; 5 #include <dt-bindings/gpio/aspeed-gpio.h> 6 #include <dt-bindings/i2c/i2c.h> 7 #include <dt-bindings/leds/leds-pca955x.h> 8 #include "aspeed-g6.dtsi" 9 #include "ibm-power11-quad.dtsi" 13 compatible = "ibm,blueridge-bmc", "aspeed,ast2600"; 35 stdout-path = &uart5; 43 reserved-memory { [all …]
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H A D | aspeed-bmc-ibm-rainier.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 /dts-v1/; 5 #include "aspeed-g6.dtsi" 6 #include <dt-bindings/gpio/aspeed-gpio.h> 7 #include <dt-bindings/i2c/i2c.h> 8 #include <dt-bindings/leds/leds-pca955x.h> 12 compatible = "ibm,rainier-bmc", "aspeed,ast2600"; 34 stdout-path = &uart5; 43 reserved-memory { 44 #address-cells = <1>; [all …]
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H A D | aspeed-bmc-ibm-system1.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 /dts-v1/; 5 #include "aspeed-g6.dtsi" 6 #include <dt-bindings/gpio/aspeed-gpio.h> 7 #include <dt-binding [all...] |
/openbmc/u-boot/arch/arm/dts/ |
H A D | ast2600.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 2 #include <dt-bindings/interrupt-controller/arm-gic.h> 3 #include <dt-bindings/gpio/aspeed-gpio.h> 8 compatible = "aspeed,ast2600"; 9 #address-cells = <1>; 10 #size-cells = <1>; 11 interrupt-parent = <&gic>; 46 #address-cells = <1>; 47 #size-cells = <0>; 48 enable-method = "aspeed,ast2600-smp"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | aspeed,ast2600-pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0+ 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ASPEED AST2600 Pin Controller 10 - Andrew Jeffery <andrew@aj.id.au> 16 - compatible: Should be one of the following: 17 "aspeed,ast2600-scu", "syscon", "simple-mfd" 29 const: aspeed,ast2600-pinctrl 32 $ref: pinmux-node.yaml# [all …]
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/openbmc/docs/designs/ |
H A D | bmc-service-failure-debug-and-recovery.md | 16 - A class of failure exists where a BMC service has entered a failed state but 18 - A class of failure exists under which we can attempt debug data collection 21 This proposal argues for and proposes a software-driven debug data capture and 26 By necessity, BMCs are not self-contained systems. BMCs exist to service the 27 needs of both the host system by providing in-band platform services such as 29 out-of-band system management interfaces such as error reporting, platform 35 are usually a domain-specific Linux distributions with complex or highly coupled 40 recovery in the face of well-defined error conditions, but the need to mitigate 41 ill-defined error conditions or entering unintended software states remains. 60 As the state transformations to enter the ill-defined or unintended software [all …]
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/openbmc/qemu/scripts/codeconverter/codeconverter/ |
H A D | test_regexps.py | 7 # the COPYING file in the top-level directory. 12 def test_res() -> None: 27 assert fullmatch(RE_MACRO_CONCAT, 'TYPE_ASPEED_GPIO "-ast2600"') 28 assert fullmatch(RE_EXPRESSION, 'TYPE_ASPEED_GPIO "-ast2600"') 60 cc->open = qmp_chardev_open_file; 87 assert fullmatch(RE_COMMENT, r'''/* multi-line 93 r'''/* could be TYPE_SYS_BUS_DEVICE (or LPC etc) */ 97 /* could be TYPE_SYS_BUS_DEVICE (or LPC etc) */ 113 * need to set up reset or vmstate, and has no realize method. 154 * need to set up reset or vmstate, and has no realize method. [all …]
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/openbmc/qemu/include/hw/misc/ |
H A D | aspeed_scu.h | 9 * the COPYING file in the top-level directory. 19 #define TYPE_ASPEED_2400_SCU TYPE_ASPEED_SCU "-ast2400" 20 #define TYPE_ASPEED_2500_SCU TYPE_ASPEED_SCU "-ast2500" 21 #define TYPE_ASPEED_2600_SCU TYPE_ASPEED_SCU "-ast2600" 22 #define TYPE_ASPEED_2700_SCU TYPE_ASPEED_SCU "-ast2700" 23 #define TYPE_ASPEED_2700_SCUIO TYPE_ASPEED_SCU "io" "-ast2700" 24 #define TYPE_ASPEED_1030_SCU TYPE_ASPEED_SCU "-ast1030" 84 * arch/arm/mach-aspeed/include/mach/regs-scu.h 86 * Copyright (C) 2012-2020 ASPEED Technology Inc. 104 * 22:20 LPC Host LHCLK divider selection [all …]
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/openbmc/linux/drivers/reset/ |
H A D | reset-simple.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Simple Reset Controller Driver 7 * Based on Allwinner SoCs Reset Controller driver 11 * Maxime Ripard <maxime.ripard@free-electrons.com> 20 #include <linux/reset-controller.h> 21 #include <linux/reset/reset-simple.h> 40 spin_lock_irqsave(&data->lock, flags); in reset_simple_update() 42 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update() 43 if (assert ^ data->active_low) in reset_simple_update() 47 writel(reg, data->membase + (bank * reg_width)); in reset_simple_update() [all …]
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/openbmc/u-boot/arch/arm/mach-aspeed/ast2600/ |
H A D | platform.S | 1 // SPDX-License-Identifier: GPL-2.0 4 * Chia-Wei Wang <chiawei_wang@aspeedtech.com> 15 * +----------------------+ 0x40 17 * +----------------------+ 0x3c 22 * +----------------------+ 0x10 24 * +----------------------+ 0x0c 26 * +----------------------+ 0x08 28 * +----------------------+ 0x04 30 * +----------------------+ SCU180 143 /* reset SMP mailbox as early as possible */ [all …]
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H A D | scu_info.c | 1 // SPDX-License-Identifier: GPL-2.0+ 21 SOC_ID("AST2600-A0", 0x0500030305000303), 22 SOC_ID("AST2600-A1", 0x0501030305010303), 23 SOC_ID("AST2620-A1", 0x0501020305010203), 24 SOC_ID("AST2600-A2", 0x0502030305010303), 25 SOC_ID("AST2620-A2", 0x0502020305010203), 26 SOC_ID("AST2605-A2", 0x0502010305010103), 27 SOC_ID("AST2600-A3", 0x0503030305030303), 28 SOC_ID("AST2620-A3", 0x0503020305030203), 29 SOC_ID("AST2605-A3", 0x0503010305030103), [all …]
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/openbmc/qemu/hw/arm/ |
H A D | aspeed_ast2600.c | 4 * Copyright (c) 2016-2019, IBM Corporation. 7 * the COPYING file in the top-level directory. 15 #include "qemu/error-report.h" 19 #include "target/arm/cpu-qom.h" 28 /* 0x16000000 0x17FFFFFF : AHB BUS do LPC Bus bridge */ 96 /* Shared Peripheral Interrupt values below are offset by -32 from datasheet */ 138 [ASPEED_DEV_I2C] = 110, /* 110 -> 125 */ 139 [ASPEED_DEV_PCIE] = 167, /* 167 -> 168 */ 146 [ASPEED_DEV_KCS] = 138, /* 138 -> 142 */ 150 [ASPEED_DEV_I3C] = 102, /* 102 -> 107 */ [all …]
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/openbmc/u-boot/board/aspeed/ast2600_dcscm/ |
H A D | ast2600_dcscm.c | 1 // SPDX-License-Identifier: GPL-2.0+ 22 #define HICR5_UNKVAL_MASK 0x1FFF0000 /* Bits with unknown values on reset */ 37 /* set lpc snoop #0 to port 0x80 */ in port80h_snoop_init() 46 /* enable lpc snoop #0 and SIOGIO */ in port80h_snoop_init() 62 #define SCU_414 0x414 /* Multi-function Pin Control #5 */ in sgpio_init() 77 /* skip eSPI init if LPC mode is selected */ in espi_init() 153 debug("AST2600-DCSCM A2 card reset phy\n"); in reset_eth_phy_dcscm_card_a2()
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/openbmc/linux/drivers/clk/ |
H A D | clk-ast2600.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 #define pr_fmt(fmt) "clk-ast2600: " fmt 14 #include <dt-bindings/clock/ast2600-clock.h> 16 #include "clk-aspeed.h" 20 * explicitly-configured clocks (ASPEED_CLK_HPLL and up). 72 /* AST2600 revision: A0, A1, A2, etc */ 76 * The majority of the clocks in the system are gates paired with a reset 77 * controller that holds the IP in reset; this is represented by the @reset_idx 81 * to control the clock enable register and the other to control the reset 84 * 1. Place IP in reset [all …]
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/openbmc/u-boot/board/aspeed/ast2600_intel/ |
H A D | intel.c | 1 // SPDX-License-Identifier: GPL-2.0+ 33 /* LPC registers */ 70 #define LPC_HICR5_UNKVAL_MASK 0x1FFF0000 /* bits with unknown values on reset */ 76 /* set lpc snoop #0 to port 0x80 */ in snoop_init() 88 /* enable lpc snoop #0 and SIOGIO */ in snoop_init() 125 /* Default setting of Y23 pad in AST2600 A1 is HBLED so disable it. */ in gpio_init() 163 /* GPIO G6 is also an open-drain output so set it as an input. */ in gpio_init()
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/openbmc/u-boot/drivers/i2c/ |
H A D | Kconfig | 23 Enable old-style I2C functions for compatibility with existing code. 35 I2C or LPC). Some Chromebooks use this when the hardware design 41 ---help--- 43 often dealt with by using an I2C pass-through interface provided by 44 the EC. On some unfortunate models (e.g. Spring) the pass-through 71 configuration is given by the device tree. Kernel-style device tree 73 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt 82 i2c-gpio driver unless your system can cope with this limitation. 83 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt 127 bool "AST2600 I2C Controller" [all …]
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/openbmc/u-boot/arch/arm/mach-aspeed/ast2500/ |
H A D | scu_info.c | 1 // SPDX-License-Identifier: GPL-2.0+ 22 SOC_ID("AST1100/AST2050-A0", 0x00000200), 23 SOC_ID("AST1100/AST2050-A1", 0x00000201), 24 SOC_ID("AST1100/AST2050-A2,3/AST2150-A0,1", 0x00000202), 25 SOC_ID("AST1510/AST2100-A0", 0x00000300), 26 SOC_ID("AST1510/AST2100-A1", 0x00000301), 27 SOC_ID("AST1510/AST2100-A2,3", 0x00000302), 28 SOC_ID("AST2200-A0,1", 0x00000102), 29 SOC_ID("AST2300-A0", 0x01000003), 30 SOC_ID("AST2300-A1", 0x01010303), [all …]
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/openbmc/qemu/hw/gpio/ |
H A D | aspeed_gpio.c | 4 * Copyright (C) 2017-2019 IBM Corp. 6 * SPDX-License-Identifier: GPL-2.0-or-later 10 #include "qemu/host-utils.h" 36 * ----------------------------- 37 * | 0 | 0 | 0 | falling-edge 38 * | 0 | 0 | 1 | rising-edge 39 * | 0 | 1 | 0 | level-low 40 * | 0 | 1 | 1 | level-high 41 * | 1 | X | X | dual-edge 168 /* AST2600 only - 1.8V gpios */ [all …]
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