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Revision tags: v00.04.10 |
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e6cedd19 |
| 09-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
as2600/scu: Fix printing of security info
The current code misses initialising the char buffer 'alg' to zero,
causing the sprintf to potentially write past the end of the buffer.
Most of the time s
as2600/scu: Fix printing of security info
The current code misses initialising the char buffer 'alg' to zero,
causing the sprintf to potentially write past the end of the buffer.
Most of the time strlen happened upon a 0 early in the buffer, and the
resulting string would be constructed in bounds:
Secure Boot: Mode_2, m��ERSA4096_SHA512
Avoid the issue by not constructing the string in memory. Instead print
it out as the bits are parsed.
Fixes: dd27b24b13d5 ("ARM: Aspeed: update secure boot information")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220310045801.183051-1-joel@jms.id.au
show more ...
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| #
ed55c4e7 |
| 09-Mar-2022 |
Joel Stanley <joel@jms.id.au> |
as2600/scu: Fix printing of security info
The current code misses initialising the char buffer 'alg' to zero,
causing the sprintf to potentially write past the end of the buffer.
Most of the time s
as2600/scu: Fix printing of security info
The current code misses initialising the char buffer 'alg' to zero,
causing the sprintf to potentially write past the end of the buffer.
Most of the time strlen happened upon a 0 early in the buffer, and the
resulting string would be constructed in bounds:
Secure Boot: Mode_2, m��ERSA4096_SHA512
Avoid the issue by not constructing the string in memory. Instead print
it out as the bits are parsed.
Fixes: dd27b24b13d5 ("ARM: Aspeed: update secure boot information")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220310045801.183051-1-joel@jms.id.au
show more ...
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Revision tags: v00.04.09, v00.04.08, v00.04.07, v00.04.06, v00.04.05, v00.04.04, v00.04.03, v00.04.02, v00.04.01 |
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| #
b4d40ff8 |
| 19-Jul-2021 |
Dylan Hung <dylan_hung@aspeedtech.com> |
ARM: Aspeed: Add AST2625-A3 SOC ID
add AST26XX series AST2625-A3 SOC ID
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I866bd340ff1aa56d533dcd040ad2d9bfbbf01abf
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Revision tags: v00.04.00, v2021.04 |
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| #
e1aa5c6b |
| 02-Feb-2021 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
Merge branch 'aspeed-master-v2019.04-github' into aspeed-master-v2019.04
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Revision tags: v00.03.03, v2021.01 |
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| #
55dae0bc |
| 11-Jan-2021 |
Ryan Chen <ryan_chen@aspeedtech.com> |
arm : aspeed
add ast2600 a3 chip id
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| #
e75928cf |
| 13-Nov-2020 |
Johnny Huang <johnny_huang@aspeedtech.com> |
ARM: Aspeed: Update SOC ID
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| #
63dd4552 |
| 12-Nov-2020 |
Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> |
ARM: aspeed: Update scu info for boot from eMMC
Add 2nd boot information for boot from eMMC feature.
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dd27b24b |
| 03-Nov-2020 |
Johnny Huang <johnny_huang@aspeedtech.com> |
ARM: Aspeed: update secure boot information
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| #
412b51dd |
| 23-Oct-2020 |
Billy Tsai <billy_tsai@aspeedtech.com> |
update ast2620A2 chip id
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
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587f0999 |
| 23-Oct-2020 |
Billy Tsai <billy_tsai@aspeedtech.com> |
update ast2620A1 chip id
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
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| #
cb000960 |
| 23-Oct-2020 |
Ryan Chen <ryan_chen@aspeedtech.com> |
update ast2600A2 chip id
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Revision tags: v2020.10, v2020.07, v00.02.13 |
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| #
ee0027db |
| 10-May-2020 |
Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> |
spi: scu_info: Simplify scu info log related to fmc/spi
Do not print redundant log if the corresponding function
is disabled.
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72bbc03d |
| 03-May-2020 |
Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> |
spi: cpuinfo: Add ABR, spi_aux_pin info
Add ABR, auxiliary pin and HW CRTM information log.
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Revision tags: v2020.04 |
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c3c1ba7d |
| 13-Jan-2020 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
ast2600: Add SoC information disaply for AST2600 A1
1. add SoC ID for AST2600 A1
2. remove redundant system reset info printing
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Revision tags: v2020.01 |
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00d75f3f |
| 24-Dec-2019 |
Chia-Wei, Wang <chiawei_wang@aspeedtech.com> |
ARM: Aspeed: Refactor board common initialization
1. make ast2500/ast2600 common board-initialization
a weak function to support override
2. rename SCU information printing functi
ARM: Aspeed: Refactor board common initialization
1. make ast2500/ast2600 common board-initialization
a weak function to support override
2. rename SCU information printing function
show more ...
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