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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs4234.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
17 signal to an external Class H tracking power supply. If not used to
18 drive a tracking power supply, the 5th DAC can instead be used as a
22 provide lead time for the external switch-mode power supply, and a
24 low-latency path to the outputs.
29 - cirrus,cs4234
33 The 7-bit I2C address depends on the state of the ADx pins, in
[all …]
H A Dcs4271.txt7 - compatible: "cirrus,cs4271"
10 Documentation/devicetree/bindings/spi/spi-bus.txt
14 - reg: the i2c address
19 - reset-gpio: a GPIO spec to define which pin is connected to the chip's
21 - cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
23 - cirrus,enable-soft-reset:
25 line is de-asserted. That also means that clocks cannot be changed
27 a complete re-initialization of all registers.
29 One (undocumented) workaround is to assert and de-assert the PDN bit
36 - vd-supply: Digital power
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H A Dcirrus,cs42l51.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Olivier Moysan <olivier.moysan@foss.st.com>
13 - $ref: dai-common.yaml#
22 "#sound-dai-cells":
28 clock-names:
30 - const: MCLK
32 reset-gpios:
35 VL-supply:
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H A Dcs43130.txt5 - compatible : "cirrus,cs43130", "cirrus,cs4399", "cirrus,cs43131",
8 - reg : the I2C address of the device for I2C
10 - VA-supply, VP-supply, VL-supply, VCP-supply, VD-supply:
17 - reset-gpios : Active low GPIO used to reset the device
19 - cirrus,xtal-ibias:
28 - cirrus,dc-measure:
31 - cirrus,ac-measure:
35 - cirrus,dc-threshold:
39 - cirrus,ac-freq:
41 Only used if "cirrus,dc-measure" is defined.
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H A Dcirrus,cs42l42.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
13 The CS42L42 is a low-power audio codec designed for portable applications.
14 It provides a high-dynamic range, stereo DAC for audio playback and a mono
15 high-dynamic-range ADC for audio capture. There is an integrated headset
21 - cirrus,cs42l42
22 - cirrus,cs42l83
29 VP-supply:
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/openbmc/u-boot/arch/arm/dts/
H A Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * SAMSUNG/GOOGLE Peach-Pit board device tree source
9 /dts-v1/;
14 cpu-model = "Exynos5800";
16 compatible = "google,pit-rev#", "google,pit",
20 google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
21 hwid = "PIT TEST A-A 7848";
22 lazy-init = <1>;
33 compatible = "pwm-backlight";
35 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
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H A Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * SAMSUNG/GOOGLE Peach-Pit board device tree source
9 /dts-v1/;
11 #include <dt-bindings/clock/maxim,max77802.h>
12 #include <dt-bindings/regulator/maxim,max77802.h>
17 compatible = "google,pit-rev#", "google,pit",
21 google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
22 hwid = "PIT TEST A-A 7848";
23 lazy-init = <1>;
34 compatible = "pwm-backlight";
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H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/input/input.h>
48 samsung,bl1-offset = <0x1400>;
49 samsung,bl2-offset = <0x3400>;
50 u-boot-memory = "/memory";
51 u-boot-offset = <0x3e00000 0x100000>;
56 #address-cells = <1>;
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H A Dexynos5250-snow.dts12 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/input/input.h>
51 stdout-path = "serial3:115200n8";
59 samsung,bl1-offset = <0x1400>;
60 samsung,bl2-offset = <0x3400>;
61 u-boot-memory = "/memory";
62 u-boot-offset = <0x3e00000 0x100000>;
67 #address-cells = <1>;
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H A Dat91-sama5d4_xplained.dts2 * at91-sama5d4_xplained.dts - Device Tree file for SAMA5D4 Xplained board
7 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
50 compatible = "atmel,sama5d4-xplained", "atmel,sama5d4", "atmel,sama5";
57 u-boot,dm-pre-reloc;
58 stdout-path = &usart3;
63 pinctrl-names = "default";
64 pinctrl-0 = <&pinctrl_onewire_tm_default>;
79 clock-frequency = <32768>;
83 clock-frequency = <12000000>;
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/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-sm1-bananapi.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-sm1.dtsi"
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
13 adc-keys {
14 compatible = "adc-keys";
15 io-channels = <&saradc 2>;
16 io-channel-names = "buttons";
17 keyup-threshold-microvolt = <1800000>;
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/openbmc/linux/drivers/infiniband/hw/hfi1/
H A Dsdma.h1 /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
3 * Copyright(c) 2015 - 2018 Intel Corporation.
22 #define MAX_SDMA_PKT_SIZE ((16 * 1024) - 1)
61 ((1ULL << SDMA_DESC0_BYTE_COUNT_WIDTH) - 1)
67 ((1ULL << SDMA_DESC0_PHY_ADDR_WIDTH) - 1)
74 ((1ULL << SDMA_DESC1_HEADER_UPDATE1_WIDTH) - 1)
80 ((1ULL << SDMA_DESC1_HEADER_MODE_WIDTH) - 1)
86 ((1ULL << SDMA_DESC1_HEADER_INDEX_WIDTH) - 1)
92 ((1ULL << SDMA_DESC1_HEADER_DWS_WIDTH) - 1)
98 ((1ULL << SDMA_DESC1_GENERATION_WIDTH) - 1)
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H A Dchip.c1 // SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause
3 * Copyright(c) 2015 - 2020 Intel Corporation.
32 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
78 #define SEC_SC_HALTED 0x4 /* per-context only */
79 #define SEC_SPC_FREEZE 0x8 /* per-HFI only */
87 * 0 - User Fecn Handling
88 * 1 - Vnic
89 * 2 - AIP
90 * 3 - Verbs
101 #define emulator_rev(dd) ((dd)->irev >> 8)
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/openbmc/qemu/target/loongarch/tcg/
H A Dtranslate.c1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * LoongArch emulation for QEMU - main translation routines.
10 #include "tcg/tcg-op.h"
11 #include "tcg/tcg-op-gvec.h"
12 #include "exec/translation-block.h"
14 #include "exec/helper-proto.h"
15 #include "exec/helper-gen.h"
17 #include "qemu/qemu-print.h"
28 #include "exec/helper-info.c.inc"
46 offs ^= (8 - size); in vec_reg_offset()
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/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
28 compatible = "shared-dma-pool";
30 no-map;
34 compatible = "shared-dma-pool";
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/openbmc/linux/drivers/rtc/
H A Drtc-rv3029c2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Micro Crystal RV-3029 / RV-3049 rtc class driver
5 * Author: Gregory Hermant <gregory.hermant@calao-systems.com>
19 #include <linux/hwmon-sysfs.h>
107 #define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */
128 for (i = 100; i > 0; i--) { in rv3029_eeprom_busywait()
129 ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); in rv3029_eeprom_busywait()
137 dev_err(rv3029->dev, "EEPROM busy wait timeout.\n"); in rv3029_eeprom_busywait()
138 return -ETIMEDOUT; in rv3029_eeprom_busywait()
146 /* Re-enable eeprom refresh */ in rv3029_eeprom_exit()
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/openbmc/linux/drivers/staging/media/atomisp/pci/
H A Datomisp_gmin_platform.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <media/v4l2-subdev.h>
32 /* X-Powers AXP288 register set */
129 /* The atomisp uses type==0 for the end-of-list marker, so leave space. */
154 struct acpi_device *adev = ACPI_COMPANION(&client->dev); in atomisp_register_i2c_module()
156 dev_info(&client->dev, "register atomisp i2c module type %d\n", type); in atomisp_register_i2c_module()
172 adev->power.flags.power_resources = 0; in atomisp_register_i2c_module()
179 return -ENOMEM; in atomisp_register_i2c_module()
188 return -ENODEV; in atomisp_register_i2c_module()
191 pdata.subdevs[i].port = gs->csi_port; in atomisp_register_i2c_module()
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/openbmc/linux/sound/soc/codecs/
H A Dcs4271.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * The data format accepted is I2S or left-justified.
132 * Default CS4271 power-up configuration
133 * Array contains non-existing in hw register at address 0
153 "vd", "vl", "va"
161 /* Current sample rate for de-emphasis control */
177 SND_SOC_DAPM_OUTPUT("AOUTA-"),
179 SND_SOC_DAPM_OUTPUT("AOUTB-"),
187 { "AOUTA-", NULL, "Playback" },
189 { "AOUTB-", NULL, "Playback" },
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H A Dcs42l51.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Based on cs4270.c - Copyright (c) Freescale Semiconductor
12 * - Only I2C is support. Not SPI
13 * - master mode *NOT* supported
38 "VL",
47 unsigned int audio_mode; /* The mode (I2S or left-justified) */
66 ucontrol->value.enumerated.item[0] = 0; in cs42l51_get_chan_mix()
71 ucontrol->value.enumerated.item[0] = 1; in cs42l51_get_chan_mix()
74 ucontrol->value.enumerated.item[0] = 2; in cs42l51_get_chan_mix()
91 switch (ucontrol->value.enumerated.item[0]) { in cs42l51_set_chan_mix()
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H A Dcs4234.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // cs4234.c -- ALSA SoC CS4234 driver
44 /* -89.92dB to +6.02dB with step of 0.38dB */
45 static const DECLARE_TLV_DB_SCALE(dac_tlv, -8992, 38, 0);
96 regmap_read(cs4234->regmap, CS4234_ADC_CTRL2, &val); in cs4234_dac14_grp_delay_put()
98 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
99 dev_err(component->dev, "Can't change group delay while ADC are ON\n"); in cs4234_dac14_grp_delay_put()
103 regmap_read(cs4234->regmap, CS4234_DAC_CTRL4, &val); in cs4234_dac14_grp_delay_put()
105 ret = -EBUSY; in cs4234_dac14_grp_delay_put()
106 dev_err(component->dev, "Can't change group delay while DAC are ON\n"); in cs4234_dac14_grp_delay_put()
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H A Dcs42l42.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs42l42.c -- CS42L42 ALSA SoC audio driver
32 #include <sound/soc-dapm.h>
35 #include <dt-bindings/sound/cs42l42.h>
45 "VL",
403 static DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 100, true);
404 static DECLARE_TLV_DB_SCALE(mixer_tlv, -6300, 100, true);
413 switch (ucontrol->value.integer.value[0]) { in cs42l42_slow_start_put()
421 return -EINVAL; in cs42l42_slow_start_put()
455 SOC_SINGLE_S8_TLV("ADC Volume", CS42L42_ADC_VOLUME, -97, 12, adc_tlv),
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/openbmc/qemu/target/riscv/
H A Dtranslate.c2 * RISC-V emulation for qemu: main translation routines.
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
22 #include "tcg/tcg-op.h"
23 #include "exec/exec-all.h"
24 #include "exec/helper-proto.h"
25 #include "exec/helper-gen.h"
34 #include "exec/helper-info.c.inc"
37 #include "tcg/tcg-cpu.h"
50 * it may require the inputs to be sign- or zero-extended; which will
75 * which we have already installed into env->fp_status. Or -1 for
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/openbmc/linux/Documentation/networking/
H A Drxrpc.rst1 .. SPDX-License-Identifier: GPL-2.0
7 The RxRPC protocol driver provides a reliable two-phase transport on top of UDP
38 RxRPC is a two-layer protocol. There is a session layer which provides
44 +-------------+
46 +-------------+
48 +-------------+
50 +-------------+
52 +-------------+
60 (2) A two-phase protocol. The client transmits a blob (the request) and then
82 to use - currently only PF_INET is supported.
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/openbmc/qemu/tests/functional/acpi-bits/bits-tests/
H A Dsmbios.py24 # SPDX-License-Identifier: BSD-3-Clause
45 if sys.platform == "BITS-EFI":
92 print "Failure: Type {} - not found".format(num)
140 self.strings_length = u.offset - self.strings_offset
167 return self.strings[i - 1]
186 characteristic_bytes = self.length - 0x12
319 0x0F: 'Space-saving',
328 0x18: 'Sealed-case PC',
329 0x19: 'Multi-system chassis W',
347 0x06: 'Non-recoverable',
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/openbmc/linux/
H A DCREDITS1 This is at least a partial credits-file of people that have
4 scripts. The fields are: name (N), email (E), web-address
6 snail-mail address (S).
10 ----------
51 D: in-kernel DRM Maintainer
71 E: tim_alpaerts@toyota-motor-europe.com
75 S: B-2610 Wilrijk-Antwerpen
80 W: http://www-stu.christs.cam.ac.uk/~aia21/
101 D: Maintainer of ide-cd and Uniform CD-ROM driver,
102 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update.
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