1a31ebc34SDaniel MackCirrus Logic CS4271 DT bindings 2a31ebc34SDaniel Mack 3a31ebc34SDaniel MackThis driver supports both the I2C and the SPI bus. 4a31ebc34SDaniel Mack 5a31ebc34SDaniel MackRequired properties: 6a31ebc34SDaniel Mack 7a31ebc34SDaniel Mack - compatible: "cirrus,cs4271" 8a31ebc34SDaniel Mack 9a31ebc34SDaniel MackFor required properties on SPI, please consult 10a31ebc34SDaniel MackDocumentation/devicetree/bindings/spi/spi-bus.txt 11a31ebc34SDaniel Mack 12a31ebc34SDaniel MackRequired properties on I2C: 13a31ebc34SDaniel Mack 14a31ebc34SDaniel Mack - reg: the i2c address 15a31ebc34SDaniel Mack 16a31ebc34SDaniel Mack 17a31ebc34SDaniel MackOptional properties: 18a31ebc34SDaniel Mack 19a31ebc34SDaniel Mack - reset-gpio: a GPIO spec to define which pin is connected to the chip's 20a31ebc34SDaniel Mack !RESET pin 21293750f9SDaniel Mack - cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag 22293750f9SDaniel Mack is enabled. 23fd23fb9fSDaniel Mack - cirrus,enable-soft-reset: 24fd23fb9fSDaniel Mack The CS4271 requires its LRCLK and MCLK to be stable before its RESET 25fd23fb9fSDaniel Mack line is de-asserted. That also means that clocks cannot be changed 26fd23fb9fSDaniel Mack without putting the chip back into hardware reset, which also requires 27fd23fb9fSDaniel Mack a complete re-initialization of all registers. 28fd23fb9fSDaniel Mack 29fd23fb9fSDaniel Mack One (undocumented) workaround is to assert and de-assert the PDN bit 30fd23fb9fSDaniel Mack in the MODE2 register. This workaround can be enabled with this DT 31fd23fb9fSDaniel Mack property. 32fd23fb9fSDaniel Mack 33fd23fb9fSDaniel Mack Note that this is not needed in case the clocks are stable 34fd23fb9fSDaniel Mack throughout the entire runtime of the codec. 35a31ebc34SDaniel Mack 369a397f47SPascal Huerst - vd-supply: Digital power 379a397f47SPascal Huerst - vl-supply: Logic power 389a397f47SPascal Huerst - va-supply: Analog Power 399a397f47SPascal Huerst 40a31ebc34SDaniel MackExamples: 41a31ebc34SDaniel Mack 42a31ebc34SDaniel Mack codec_i2c: cs4271@10 { 43a31ebc34SDaniel Mack compatible = "cirrus,cs4271"; 44a31ebc34SDaniel Mack reg = <0x10>; 45a31ebc34SDaniel Mack reset-gpio = <&gpio 23 0>; 469a397f47SPascal Huerst vd-supply = <&vdd_3v3_reg>; 479a397f47SPascal Huerst vl-supply = <&vdd_3v3_reg>; 489a397f47SPascal Huerst va-supply = <&vdd_3v3_reg>; 49a31ebc34SDaniel Mack }; 50a31ebc34SDaniel Mack 51a31ebc34SDaniel Mack codec_spi: cs4271@0 { 52a31ebc34SDaniel Mack compatible = "cirrus,cs4271"; 53a31ebc34SDaniel Mack reg = <0x0>; 54a31ebc34SDaniel Mack reset-gpio = <&gpio 23 0>; 55a31ebc34SDaniel Mack spi-max-frequency = <6000000>; 56a31ebc34SDaniel Mack }; 57a31ebc34SDaniel Mack 58