| /openbmc/openbmc/meta-facebook/meta-harma/recipes-phosphor/gpio/phosphor-gpio-monitor/ |
| H A D | multi-gpios-sys-init | 49 # Set SGPIO Initial Value
50 # SGPIO Out Bit-01
52 # SGPIO Out Bit-05
54 # SGPIO Out Bit-09
57 # SGPIO Out Bit-11
59 # SGPIO Out Bit-13
61 # SGPIO Out Bit-15
63 # SGPIO Out Bit-17
65 # SGPIO Out Bit-19
68 # SGPIO Out Bit-25
[all …]
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/sgpio/sgpio/ |
| H A D | 0001-makefile-Add-LDFLAGS-to-linking-rule.patch | 20 @@ -34,7 +34,7 @@ sgpio.o: sgpio.c
21 ${CC} $(CFLAGS) -c sgpio.c
23 sgpio: sgpio.o
24 - ${CC} -g sgpio.o -o sgpio
25 + ${CC} $(LDFLAGS) -g sgpio.o -o sgpio
28 rm -f sgpio.o sgpio
|
| H A D | Makefile-error-fix.patch | 37 -# Intel SGPIO enclosure management utility
43 -ALL = sgpio
47 -sgpio.o: sgpio.c
48 - gcc -g -Wall -c sgpio.c
50 -sgpio: sgpio.o
51 - gcc -g sgpio.o -o sgpio
54 - rm -f sgpio.o sgpio
89 +# Intel SGPIO enclosure management utility
97 +ALL = sgpio
102 +sgpio.o: sgpio.c
[all …]
|
| /openbmc/u-boot/arch/mips/dts/ |
| H A D | ocelot_pcb120.dts | 22 gpios = <&sgpio 44 1>; /* p12.1 */
28 gpios = <&sgpio 12 1>; /* p12.0 */
34 gpios = <&sgpio 45 1>; /* p13.1 */
40 gpios = <&sgpio 13 1>; /* p13.0 */
46 gpios = <&sgpio 46 1>; /* p14.1 */
52 gpios = <&sgpio 14 1>; /* p14.0 */
58 gpios = <&sgpio 47 1>; /* p15.1 */
64 gpios = <&sgpio 15 1>; /* p15.0 */
70 gpios = <&sgpio 48 1>; /* p16.1 */
76 gpios = <&sgpio 16 1>; /* p16.0 */
[all …]
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| H A D | mscc,jr2.dtsi | 121 sgpio_pins: sgpio-pins {
148 sgpio: gpio@1010150 { label
149 compatible = "mscc,ocelot-sgpio";
156 gpio-ranges = <&sgpio 0 0 64>;
158 sgpio-clock = <0x14>;
162 compatible = "mscc,ocelot-sgpio";
171 sgpio-clock = <0x14>;
175 compatible = "mscc,ocelot-sgpio";
184 sgpio-clock = <0x14>;
|
| H A D | ocelot_pcb123.dts | 22 gpios = <&sgpio 43 1>; /* p11.1 */
28 gpios = <&sgpio 11 1>; /* p11.0 */
34 &sgpio {
36 mscc,sgpio-ports = <0x00FFFFFF>;
|
| H A D | serval_pcb105.dts | 27 gpios = <&sgpio 43 1>; /* p11.1 */
33 gpios = <&sgpio 11 1>; /* p11.0 */
53 &sgpio {
55 sgpio-ports = <0x00FFFFFF>;
|
| H A D | serval_pcb106.dts | 27 gpios = <&sgpio 43 1>; /* p11.1 */
33 gpios = <&sgpio 11 1>; /* p11.0 */
53 &sgpio {
55 sgpio-ports = <0x00FFFFFF>;
|
| H A D | servalt_pcb116.dts | 27 gpios = <&sgpio 70 0>; /* p6.2 */
33 gpios = <&sgpio 102 0>; /* p6.3 */
53 &sgpio {
55 sgpio-ports = <0x0000fe7f>;
|
| H A D | jr2_pcb111.dts | 60 &sgpio {
62 sgpio-ports = <0xffffffff>;
67 sgpio-ports = <0x001effff>;
72 sgpio-ports = <0xff000000>;
|
| H A D | jr2_pcb110.dts | 60 &sgpio {
62 sgpio-ports = <0x00ffffff>;
67 sgpio-ports = <0x00ff0000>;
72 sgpio-ports = <0x3f00ffff>;
|
| H A D | luton_pcb090.dts | 27 gpios = <&sgpio 64 GPIO_ACTIVE_HIGH>; /* p0.2 */
33 gpios = <&sgpio 65 GPIO_ACTIVE_HIGH>; /* p1.2 */
39 &sgpio {
41 gpio-ranges = <&sgpio 0 0 96>;
|
| H A D | luton_pcb091.dts | 33 gpios = <&sgpio 26 GPIO_ACTIVE_HIGH>; /* p26.0 */
39 gpios = <&sgpio 58 GPIO_ACTIVE_HIGH>; /* p26.1 */
45 &sgpio {
47 mscc,sgpio-ports = <0xFFF000FF>;
|
| H A D | serval2_pcb112.dts | 52 &sgpio {
54 sgpio-ports = <0x0000ffff>;
59 sgpio-ports = <0x3fe0ffff>;
|
| /openbmc/u-boot/doc/device-tree-bindings/gpio/ |
| H A D | mscc_sgpio.txt | 10 - compatible : "mscc,luton-sgpio" or "mscc,ocelot-sgpio"
12 mscc,sgpio-frequency property.
23 - mscc,sgpio-frequency: The frequency at which the serial bitstream is
25 - mscc,sgpio-ports: A bitmask (32 bits) of which ports are enabled in
35 sgpio: gpio@10700f8 {
36 compatible = "mscc,ocelot-sgpio";
42 gpio-ranges = <&sgpio 0 0 64>;
43 mscc,sgpio-frequency = <12500>;
44 mscc,sgpio-ports = <0x000FFFFF>;
|
| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | aspeed,sgpio.yaml | 4 $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
7 title: Aspeed SGPIO controller
13 This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
14 AST2600 have two sgpio master one with 128 pins another one with 80 pins,
15 AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
27 - aspeed,ast2400-sgpio
28 - aspeed,ast2500-sgpio
67 sgpio: sgpio@1e780200 {
69 compatible = "aspeed,ast2500-sgpio";
|
| H A D | nuvoton,sgpio.yaml | 4 $id: http://devicetree.org/schemas/gpio/nuvoton,sgpio.yaml#
7 title: Nuvoton SGPIO controller
13 This SGPIO controller is for NUVOTON NPCM7xx and NPCM8xx SoC and detailed
15 Nuvoton NPCM7xx SGPIO module is combines a serial to parallel IC (HC595)
19 NPCM7xx/NPCM8xx have two sgpio modules. Each module can support up
31 - nuvoton,npcm750-sgpio
32 - nuvoton,npcm845-sgpio
79 compatible = "nuvoton,npcm750-sgpio";
|
| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | microchip,sparx5-sgpio.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/microchip,sparx5-sgpio.yaml#
25 - microchip,sparx5-sgpio
26 - mscc,ocelot-sgpio
27 - mscc,luton-sgpio
41 microchip,sgpio-port-ranges:
64 description: The sgpio controller frequency (Hz). This dictates
83 const: microchip,sparx5-sgpio-bank
102 description: Specifies the sgpio IRQ (in parent controller)
134 - microchip,sgpio-port-ranges
144 compatible = "microchip,sparx5-sgpio";
[all …]
|
| /openbmc/linux/drivers/pinctrl/ |
| H A D | pinctrl-lpc18xx.c | 164 [FUNC_SGPIO] = "sgpio",
240 LPC_P(0,0, GPIO, SSP1, ENET, SGPIO, R, R, I2S0_TX_WS,I2S1, 0, ND);
241 LPC_P(0,1, GPIO, SSP1,ENET_ALT,SGPIO, R, R, ENET, I2S1, 0, ND);
242 LPC_P(1,0, GPIO, CTIN, EMC, R, R, SSP0, SGPIO, R, 0, ND);
243 LPC_P(1,1, GPIO, CTOUT, EMC, SGPIO, R, SSP0, R, R, 0, ND);
244 LPC_P(1,2, GPIO, CTOUT, EMC, SGPIO, R, SSP0, R, R, 0, ND);
245 LPC_P(1,3, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND);
246 LPC_P(1,4, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND);
247 LPC_P(1,5, GPIO, CTOUT, R, EMC, USB0, SSP1, SGPIO, SDMMC, 0, ND);
248 LPC_P(1,6, GPIO, CTIN, R, EMC, R, R, SGPIO, SDMMC, 0, ND);
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/ata/ |
| H A D | sata_highbank.yaml | 33 sending an SGPIO pattern.
39 sending an SGPIO pattern.
42 description: Maps port numbers to offsets within the SGPIO bitstream.
65 calxeda,sgpio-gpio:
69 that the driver supports SGPIO indicator lights using the indicated
88 calxeda,sgpio-gpio =<&gpioh 5 1>, <&gpioh 6 1>, <&gpioh 7 1>;
|
| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | mscc,ocelot.yaml | 46 $ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml
50 - mscc,ocelot-sgpio
127 sgpio_pins: sgpio-pins {
139 compatible = "mscc,ocelot-sgpio";
144 microchip,sgpio-port-ranges = <0 15>;
150 compatible = "microchip,sparx5-sgpio-bank";
158 compatible = "microchip,sparx5-sgpio-bank";
|
| /openbmc/linux/arch/arm64/boot/dts/microchip/ |
| H A D | sparx5_pcb134_board.dtsi | 255 microchip,sgpio-port-ranges = <8 15>;
266 microchip,sgpio-port-ranges = <24 31>;
302 microchip,sgpio-port-ranges = <8 15>;
313 microchip,sgpio-port-ranges = <24 31>;
324 microchip,sgpio-port-ranges = <0 0>, <11 31>;
722 microchip,sd-sgpio = <301>;
732 microchip,sd-sgpio = <305>;
741 microchip,sd-sgpio = <309>;
750 microchip,sd-sgpio = <313>;
759 microchip,sd-sgpio = <317>;
[all …]
|
| H A D | sparx5.dtsi | 239 sgpio0_pins: sgpio-pins {
303 compatible = "microchip,sparx5-sgpio";
312 compatible = "microchip,sparx5-sgpio-bank";
322 compatible = "microchip,sparx5-sgpio-bank";
333 compatible = "microchip,sparx5-sgpio";
342 compatible = "microchip,sparx5-sgpio-bank";
352 compatible = "microchip,sparx5-sgpio-bank";
363 compatible = "microchip,sparx5-sgpio";
373 compatible = "microchip,sparx5-sgpio-bank";
382 compatible = "microchip,sparx5-sgpio-bank";
|
| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | microchip,sparx5-switch.yaml | 105 microchip,sd-sgpio:
107 Index of the ports Signal Detect SGPIO in the set of 384 SGPIOs
170 microchip,sd-sgpio = <365>;
179 microchip,sd-sgpio = <369>;
188 microchip,sd-sgpio = <373>;
197 microchip,sd-sgpio = <377>;
|
| /openbmc/u-boot/drivers/gpio/ |
| H A D | mscc_sgpio.c | 210 priv->ports = dev_read_u32_default(dev, "mscc,sgpio-ports", 0xFFFFFFFF); in mscc_sgpio_probe()
211 priv->clock = dev_read_u32_default(dev, "mscc,sgpio-frequency", in mscc_sgpio_probe()
232 uc_priv->bank_name = "sgpio"; in mscc_sgpio_probe()
249 debug("probe: sgpio regs = %p\n", priv->regs); in mscc_sgpio_probe()
263 { .compatible = "mscc,luton-sgpio", .data = (ulong)&props_luton },
264 { .compatible = "mscc,ocelot-sgpio", .data = (ulong)&props_ocelot },
269 .name = "mscc-sgpio",
|