| /openbmc/qemu/docs/ |
| H A D | pcie.txt | 1 PCI EXPRESS GUIDELINES
6 The doc proposes best practices on how to use PCI Express (PCIe) / PCI
7 devices in PCI Express based machines and explains the reasoning behind
17 (2) A comparison between PCI and PCI Express technologies.
26 and allows any PCI/PCI Express device to be plugged into any
27 PCI/PCI Express slot.
28 Plugging a PCI device into a PCI Express slot might not always work and
30 Plugging a PCI Express device into a PCI slot will hide the Extended
33 The recommendation is to separate the PCI Express and PCI hierarchies.
34 PCI Express devices should be plugged only into PCI Express Root Ports and
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| H A D | pcie_pci_bridge.txt | 1 Generic PCI Express to PCI Bridge
6 PCIE-to-PCI bridge is a new method for legacy PCI
9 Previously Intel DMI-to-PCI bridge was used for this purpose.
12 PCIE-to-PCI bridge should now be used for any legacy PCI device usage
13 with PCI Express machine.
15 This generic PCIE-PCI bridge is a cross-platform device,
17 see 'PCIE-PCI bridge hot-plug' section),
21 Hot-plug of legacy PCI devices into the bridge
25 PCIE-PCI bridge hot-plug
27 Guest OSes require extra efforts to enable PCIE-PCI bridge hot-plug.
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| H A D | pci_expander_bridge.txt | 1 PCI EXPANDER BRIDGE (PXB)
6 PXB is a "light-weight" host bridge in the same PCI domain
8 the main host bridge to support multiple PCI root buses.
10 on bus 0 (pci.0).
12 As opposed to PCI-2-PCI bridge's secondary bus, PXB's bus
26 -device pxb,id=bridge1,bus=pci.0,numa_node=1,bus_nr=4 -netdev user,id=nd -device e1000,bus=bridge1,…
27 -device pxb,id=bridge2,bus=pci.0,numa_node=0,bus_nr=8 -device e1000,bus=bridge2,addr=0x3
28 -device pxb,id=bridge3,bus=pci.0,bus_nr=40 -drive if=none,id=drive0,file=[img] -device virtio-blk-p…
38 Please observe that we specified the bus "pci.0" for the second and third pxb.
46 The host bridge allows to register and query the PXB's PCI root bus in QEMU.
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| /openbmc/u-boot/doc/driver-model/ |
| H A D | pci-info.txt | 1 PCI with Driver Model
8 uclass_get_device_by_seq() to get the PCI bus for a particular bus number.
14 pci0 = &pci;
17 pci: pci-controller {
18 compatible = "sandbox,pci";
26 The call to uclass_get_device() will cause the PCI bus to be probed.
29 they are bound to a generic PCI driver which does nothing.
35 touched on PCI (eg: a call to pci_find_devices()) it will not be probed.
37 PCI devices can appear in the flattened device tree. If they do, their node
38 often contains extra information which cannot be derived from the PCI IDs or
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| /openbmc/qemu/hw/scsi/ |
| H A D | esp-pci.c | 27 #include "hw/pci/pci_device.h"
80 static void esp_pci_update_irq(PCIESPState *pci) in esp_pci_update_irq() argument
82 int scsi_level = !!(pci->dma_regs[DMA_STAT] & DMA_STAT_SCSIINT); in esp_pci_update_irq()
83 int dma_level = (pci->dma_regs[DMA_CMD] & DMA_CMD_INTE_D) ? in esp_pci_update_irq()
84 !!(pci->dma_regs[DMA_STAT] & DMA_STAT_DONE) : 0; in esp_pci_update_irq()
87 pci_set_irq(PCI_DEVICE(pci), level); in esp_pci_update_irq()
92 PCIESPState *pci = PCI_ESP(opaque); in esp_irq_handler() local
95 pci->dma_regs[DMA_STAT] |= DMA_STAT_SCSIINT; in esp_irq_handler()
104 if ((pci->dma_regs[DMA_CMD] & DMA_CMD_MASK) == 0x3 && in esp_irq_handler()
105 pci->dma_regs[DMA_WBC] == 0) { in esp_irq_handler()
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| /openbmc/qemu/hw/pci-host/ |
| H A D | Kconfig | 11 select PCI
15 select PCI
19 select PCI
23 select PCI
28 select PCI
33 select PCI
37 select PCI
41 select PCI
46 select PCI
73 select PCI
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| H A D | ppc4xx_pci.c | 20 * This file implements emulation of the 32-bit PCI controller found in some
27 #include "hw/pci-host/ppc4xx.h"
31 #include "hw/pci/pci_device.h"
32 #include "hw/pci/pci_host.h"
71 * PCI accesses.
87 * PCI Target Map (PTM) registers specify which PCI addresses are translated to
102 struct PPC4xxPCIState *pci = opaque; in ppc4xx_pci_reg_write4() local
105 * We ignore all target attempts at PCI configuration, effectively in ppc4xx_pci_reg_write4()
106 * assuming a bidirectional 1:1 mapping of PLB and PCI space. in ppc4xx_pci_reg_write4()
110 pci->pmm[0].la = value; in ppc4xx_pci_reg_write4()
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| H A D | remote.c | 2 * Remote PCI host device
4 * Unlike PCI host devices that model physical hardware, the purpose
5 * of this PCI host is to host multi-process QEMU devices.
7 * Multi-process QEMU extends the PCI host of a QEMU machine into a
8 * remote process. Any PCI device attached to the remote process is
12 * This PCI host is purely a container for PCI devices. It's fake in the
13 * sense that the guest never sees this PCI host and has no way of
15 * PCI device models need when running in a remote process.
26 #include "hw/pci/pci.h"
27 #include "hw/pci/pci_host.h"
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| H A D | mv64361.c | 15 #include "hw/pci/pci_device.h"
16 #include "hw/pci/pci_host.h"
24 #include "hw/pci-host/mv64361.h"
38 * PCI-facing part of the host bridge, in mv64361_pcibridge_class_init()
86 name = g_strdup_printf("pci%d-io", s->index); in mv64361_pcihost_realize()
89 name = g_strdup_printf("pci%d-mem", s->index); in mv64361_pcihost_realize()
92 name = g_strdup_printf("pci.%d", s->index); in mv64361_pcihost_realize()
136 MV64361PCIState pci[2]; member
215 return PCI_HOST_BRIDGE(&mv->pci[n])->bus; in mv64361_get_pci_bus()
252 p = &s->pci[0]; in set_mem_windows()
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| H A D | ppce500.c | 2 * QEMU PowerPC E500 embedded processors pci controller emulation
21 #include "hw/pci/pci_device.h"
22 #include "hw/pci/pci_host.h"
23 #include "hw/pci-host/ppce500.h"
128 PPCE500PCIState *pci = opaque; in pci_reg_read4() local
143 value = pci->pob[idx].potar; in pci_reg_read4()
146 value = pci->pob[idx].potear; in pci_reg_read4()
149 value = pci->pob[idx].powbar; in pci_reg_read4()
152 value = pci->pob[idx].powar; in pci_reg_read4()
165 value = pci->pib[idx].pitar; in pci_reg_read4()
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| /openbmc/qemu/docs/specs/ |
| H A D | pci-ids.rst | 2 PCI IDs for QEMU
14 The 1000 -> 10ff device ID range is used as follows for virtio-pci devices.
36 ID range for modern virtio devices. The PCI device
49 Used as PCI Subsystem ID for existing hardware devices emulated
61 PCI devices (other than virtio):
64 PCI-PCI bridge
66 PCI serial port (16550A) adapter (:doc:`pci-serial`)
68 PCI Dual-port 16550A adapter (:doc:`pci-serial`)
70 PCI Quad-port 16550A adapter (:doc:`pci-serial`)
72 PCI test device (:doc:`pci-testdev`)
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| H A D | standard-vga.rst | 5 Exists in two variants, for isa and pci.
10 picks isa for -M isapc, otherwise pci
12 pci variant
16 legacy-free pci variant
19 PCI spec
22 Applies to the pci variant only for obvious reasons.
24 PCI ID
27 PCI Region 0
31 PCI Region 1
34 PCI Region 2
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | fsl_pci.h | 11 #include <pci.h>
17 /* Freescale-specific PCI config registers */
33 * Common PCI/PCIE Register structure for mpc85xx and mpc86xx
37 * PCI Translation Registers
67 /* PCI/PCI Express Registers */
69 u32 cfg_addr; /* 0x000 - PCI Configuration Address Register */
70 u32 cfg_data; /* 0x004 - PCI Configuration Data Register */
71 u32 int_ack; /* 0x008 - PCI Interrupt Acknowledge Register */
72 u32 out_comp_to; /* 0x00C - PCI Outbound Completion Timeout Register */
73 u32 out_conf_to; /* 0x010 - PCI Configuration Timeout Register */
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| /openbmc/u-boot/drivers/pci/ |
| H A D | Kconfig | 1 menuconfig PCI config
2 bool "PCI support"
5 Enable support for PCI (Peripheral Interconnect Bus), a type of bus
9 if PCI
12 bool "Enable driver model for PCI"
15 Use driver model for PCI. Driver model is the new method for
16 orgnising devices in U-Boot. For PCI, driver model keeps track of
17 available PCI devices, allows scanning of PCI buses and provides
21 bool "Enable compatible functions for PCI"
24 Enable compatibility functions for PCI so that old code can be used
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| /openbmc/u-boot/arch/m68k/cpu/mcf5445x/ |
| H A D | pci.c | 8 * PCI Configuration space access support
11 #include <pci.h>
16 /* System RAM mapped over PCI */
46 pci_t *pci = (pci_t *)MMAP_PCI; in pci_mcf5445x_init() local
62 setbits_be32(&pci->gscr, PCI_GSCR_PR); in pci_mcf5445x_init()
64 setbits_be32(&pci->tcr1, PCI_TCR1_P); in pci_mcf5445x_init()
67 out_be32(&pci->iw0btar, in pci_mcf5445x_init()
69 out_be32(&pci->iw1btar, in pci_mcf5445x_init()
71 out_be32(&pci->iw2btar, in pci_mcf5445x_init()
74 out_be32(&pci->iwcr, in pci_mcf5445x_init()
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| /openbmc/qemu/hw/char/ |
| H A D | diva-gsp.c | 4 * The Diva PCI boards are Remote Management cards for PA-RISC machines.
22 #include "hw/pci/pci_device.h"
59 PCIDivaSerialState *pci = DO_UPCAST(PCIDivaSerialState, dev, dev); in diva_pci_exit() local
63 for (i = 0; i < pci->ports; i++) { in diva_pci_exit()
64 s = pci->state + i; in diva_pci_exit()
66 memory_region_del_subregion(&pci->membar, &s->io); in diva_pci_exit()
67 g_free(pci->name[i]); in diva_pci_exit()
69 qemu_free_irqs(pci->irqs, pci->ports); in diva_pci_exit()
74 PCIDivaSerialState *pci = opaque; in multi_serial_irq_mux() local
77 pci->level[n] = level; in multi_serial_irq_mux()
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| H A D | serial-pci-multi.c | 28 /* see docs/specs/pci-serial.rst */
34 #include "hw/pci/pci_device.h"
53 PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); in multi_serial_pci_exit() local
57 for (i = 0; i < pci->ports; i++) { in multi_serial_pci_exit()
58 s = pci->state + i; in multi_serial_pci_exit()
60 memory_region_del_subregion(&pci->iobar, &s->io); in multi_serial_pci_exit()
61 g_free(pci->name[i]); in multi_serial_pci_exit()
67 PCIMultiSerialState *pci = opaque; in multi_serial_irq_mux() local
70 pci->level[n] = level; in multi_serial_irq_mux()
71 for (i = 0; i < pci->ports; i++) { in multi_serial_irq_mux()
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| /openbmc/qemu/hw/virtio/ |
| H A D | meson.build | 5 system_virtio_ss.add(when: 'CONFIG_VIRTIO_PCI', if_true: files('virtio-pci.c'))
32 # PCI Stubs
33 system_virtio_ss.add(when: 'CONFIG_VIRTIO_PCI', if_true: files('vhost-user-device-pci.c'))
35 if_true: files('vhost-user-gpio-pci.c'))
37 if_true: files('vhost-user-i2c-pci.c'))
39 if_true: files('vhost-user-rng-pci.c'))
41 if_true: files('vhost-user-snd-pci.c'))
43 if_true: files('vhost-user-input-pci.c'))
65 virtio_pci_ss.add(when: 'CONFIG_VHOST_VSOCK', if_true: files('vhost-vsock-pci.c'))
66 virtio_pci_ss.add(when: 'CONFIG_VHOST_USER_VSOCK', if_true: files('vhost-user-vsock-pci.c'))
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| /openbmc/openbmc/poky/meta/lib/oeqa/runtime/cases/ |
| H A D | parselogs-ignores-qemuall.txt | 4 # PCI host bridge to bus 0000:00
8 # pci 0000:00:00.0: [2046:ab11] type 00 class 0x100000
9 # pci 0000:00:00.0: [Firmware Bug]: reg 0x10: invalid BAR (can't size)
10 # pci 0000:00:00.0: [Firmware Bug]: reg 0x14: invalid BAR (can't size)
11 # pci 0000:00:00.0: [Firmware Bug]: reg 0x18: invalid BAR (can't size)
12 # pci 0000:00:00.0: [Firmware Bug]: reg 0x1c: invalid BAR (can't size)
13 # pci 0000:00:00.0: [Firmware Bug]: reg 0x20: invalid BAR (can't size)
14 # pci 0000:00:00.0: [Firmware Bug]: reg 0x24: invalid BAR (can't size)
17 # pci 0000:00:00.0: [Firmware Bug]: BAR 0: invalid; can't size
18 # pci 0000:00:00.0: [Firmware Bug]: BAR 1: invalid; can't size
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| /openbmc/qemu/tests/functional/ |
| H A D | test_virtio_version.py | 54 interfaces = ('pci-express-device', 'conventional-pci-device')
69 Run QEMU with `-device DEVTYPE`, return device info from `query-pci`
79 pcibuses = vm.cmd('query-pci')
120 #TODO: check if plugging on a PCI Express bus will make the
131 self.assertIn('conventional-pci-device', generic_ifaces)
132 self.assertIn('pci-express-device', generic_ifaces)
134 self.assertIn('conventional-pci-device', nt_ifaces)
135 self.assertIn('pci-express-device', nt_ifaces)
137 self.assertIn('conventional-pci-device', trans_ifaces)
138 self.assertNotIn('pci-express-device', trans_ifaces)
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| /openbmc/qemu/hw/net/ |
| H A D | Kconfig | 10 depends on PCI
16 depends on PCI
22 depends on PCI
31 depends on PCI
40 depends on PCI
55 depends on PCI
60 depends on PCI
120 depends on PCI
140 depends on PCI && MSI_NONBROKEN
153 depends on PCI && CAN_SJA1000
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| /openbmc/qemu/tests/qtest/libqos/ |
| H A D | riscv-iommu.c | 2 * libqos driver riscv-iommu-pci framework
15 #include "pci.h"
22 if (!g_strcmp0(interface, "pci-device")) { in riscv_iommu_pci_get_driver()
32 QRISCVIOMMU *pci = (QRISCVIOMMU *)obj; in riscv_iommu_pci_start_hw() local
33 qpci_device_enable(&pci->dev); in riscv_iommu_pci_start_hw()
38 QRISCVIOMMU *pci = (QRISCVIOMMU *)obj; in riscv_iommu_pci_destructor() local
39 qpci_iounmap(&pci->dev, pci->reg_bar); in riscv_iommu_pci_destructor()
71 qos_node_create_driver("riscv-iommu-pci", riscv_iommu_pci_create); in riscv_iommu_pci_register_nodes()
72 qos_node_produces("riscv-iommu-pci", "pci-device"); in riscv_iommu_pci_register_nodes()
73 qos_node_consumes("riscv-iommu-pci", "pci-bus", &opts); in riscv_iommu_pci_register_nodes()
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| /openbmc/qemu/ui/ |
| H A D | util.c | 20 #include "hw/pci/pci_device.h"
21 #include "hw/pci/pci_bus.h"
26 * Recursively (in reverse order) appends addresses of PCI devices as it moves
27 * up in the PCI hierarchy.
31 static bool append_pci_address(char *buf, size_t buf_size, const PCIDevice *pci) in append_pci_address() argument
33 PCIBus *bus = pci_get_bus(pci); in append_pci_address()
44 PCI_SLOT(pci->devfn), PCI_FUNC(pci->devfn)); in append_pci_address()
57 PCIDevice *pci = (PCIDevice *) object_dynamic_cast(OBJECT(dev), in qemu_console_fill_device_address() local
60 if (pci == NULL) { in qemu_console_fill_device_address()
62 "Not a PCI device."); in qemu_console_fill_device_address()
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| /openbmc/u-boot/arch/m68k/cpu/mcf547x_8x/ |
| H A D | pci.c | 8 * PCI Configuration space access support
11 #include <pci.h>
16 /* System RAM mapped over PCI */
74 pci_t *pci = (pci_t *) MMAP_PCI; in pci_mcf547x_8x_init() local
88 setbits_be32(&pci->gscr, PCI_GSCR_PR); in pci_mcf547x_8x_init()
90 out_be32(&pci->tcr1, PCI_TCR1_P); in pci_mcf547x_8x_init()
93 out_be32(&pci->iw0btar, in pci_mcf547x_8x_init()
95 out_be32(&pci->iw1btar, in pci_mcf547x_8x_init()
97 out_be32(&pci->iw2btar, in pci_mcf547x_8x_init()
100 out_be32(&pci->iwcr, in pci_mcf547x_8x_init()
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| /openbmc/qemu/hw/acpi/ |
| H A D | viot.c | 10 #include "hw/pci/pci.h"
11 #include "hw/pci/pci_host.h"
22 build_append_int_noprefix(table_data, 1 /* PCI range */, 1); in build_pci_host_range()
29 /* PCI Segment start */ in build_pci_host_range()
31 /* PCI Segment end */ in build_pci_host_range()
33 /* PCI BDF start */ in build_pci_host_range()
35 /* PCI BDF end */ in build_pci_host_range()
43 /* Build PCI range for a given PCI host bridge */
82 * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI
100 /* Build the list of PCI ranges that this viommu manages */ in build_viot()
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