xref: /openbmc/qemu/docs/specs/standard-vga.rst (revision 68ed96be)
1*68ed96beSPeter Maydell
2*68ed96beSPeter MaydellQEMU Standard VGA
3*68ed96beSPeter Maydell=================
4*68ed96beSPeter Maydell
5*68ed96beSPeter MaydellExists in two variants, for isa and pci.
6*68ed96beSPeter Maydell
7*68ed96beSPeter Maydellcommand line switches:
8*68ed96beSPeter Maydell
9*68ed96beSPeter Maydell``-vga std``
10*68ed96beSPeter Maydell   picks isa for -M isapc, otherwise pci
11*68ed96beSPeter Maydell``-device VGA``
12*68ed96beSPeter Maydell   pci variant
13*68ed96beSPeter Maydell``-device isa-vga``
14*68ed96beSPeter Maydell   isa variant
15*68ed96beSPeter Maydell``-device secondary-vga``
16*68ed96beSPeter Maydell   legacy-free pci variant
17*68ed96beSPeter Maydell
18*68ed96beSPeter Maydell
19*68ed96beSPeter MaydellPCI spec
20*68ed96beSPeter Maydell--------
21*68ed96beSPeter Maydell
22*68ed96beSPeter MaydellApplies to the pci variant only for obvious reasons.
23*68ed96beSPeter Maydell
24*68ed96beSPeter MaydellPCI ID
25*68ed96beSPeter Maydell   ``1234:1111``
26*68ed96beSPeter Maydell
27*68ed96beSPeter MaydellPCI Region 0
28*68ed96beSPeter Maydell   Framebuffer memory, 16 MB in size (by default).
29*68ed96beSPeter Maydell   Size is tunable via vga_mem_mb property.
30*68ed96beSPeter Maydell
31*68ed96beSPeter MaydellPCI Region 1
32*68ed96beSPeter Maydell   Reserved (so we have the option to make the framebuffer bar 64bit).
33*68ed96beSPeter Maydell
34*68ed96beSPeter MaydellPCI Region 2
35*68ed96beSPeter Maydell   MMIO bar, 4096 bytes in size (QEMU 1.3+)
36*68ed96beSPeter Maydell
37*68ed96beSPeter MaydellPCI ROM Region
38*68ed96beSPeter Maydell   Holds the vgabios (QEMU 0.14+).
39*68ed96beSPeter Maydell
40*68ed96beSPeter Maydell
41*68ed96beSPeter MaydellThe legacy-free variant has no ROM and has ``PCI_CLASS_DISPLAY_OTHER``
42*68ed96beSPeter Maydellinstead of ``PCI_CLASS_DISPLAY_VGA``.
43*68ed96beSPeter Maydell
44*68ed96beSPeter Maydell
45*68ed96beSPeter MaydellIO ports used
46*68ed96beSPeter Maydell-------------
47*68ed96beSPeter Maydell
48*68ed96beSPeter MaydellDoesn't apply to the legacy-free pci variant, use the MMIO bar instead.
49*68ed96beSPeter Maydell
50*68ed96beSPeter Maydell``03c0 - 03df``
51*68ed96beSPeter Maydell   standard vga ports
52*68ed96beSPeter Maydell``01ce``
53*68ed96beSPeter Maydell   bochs vbe interface index port
54*68ed96beSPeter Maydell``01cf``
55*68ed96beSPeter Maydell   bochs vbe interface data port (x86 only)
56*68ed96beSPeter Maydell``01d0``
57*68ed96beSPeter Maydell   bochs vbe interface data port
58*68ed96beSPeter Maydell
59*68ed96beSPeter Maydell
60*68ed96beSPeter MaydellMemory regions used
61*68ed96beSPeter Maydell-------------------
62*68ed96beSPeter Maydell
63*68ed96beSPeter Maydell``0xe0000000``
64*68ed96beSPeter Maydell  Framebuffer memory, isa variant only.
65*68ed96beSPeter Maydell
66*68ed96beSPeter MaydellThe pci variant used to mirror the framebuffer bar here, QEMU 0.14+
67*68ed96beSPeter Maydellstops doing that (except when in ``-M pc-$old`` compat mode).
68*68ed96beSPeter Maydell
69*68ed96beSPeter Maydell
70*68ed96beSPeter MaydellMMIO area spec
71*68ed96beSPeter Maydell--------------
72*68ed96beSPeter Maydell
73*68ed96beSPeter MaydellLikewise applies to the pci variant only for obvious reasons.
74*68ed96beSPeter Maydell
75*68ed96beSPeter Maydell``0000 - 03ff``
76*68ed96beSPeter Maydell  edid data blob.
77*68ed96beSPeter Maydell``0400 - 041f``
78*68ed96beSPeter Maydell  vga ioports (``0x3c0`` to ``0x3df``), remapped 1:1. Word access
79*68ed96beSPeter Maydell  is supported, bytes are written in little endian order (aka index
80*68ed96beSPeter Maydell  port first),  so indexed registers can be updated with a single
81*68ed96beSPeter Maydell  mmio write (and thus only one vmexit).
82*68ed96beSPeter Maydell``0500 - 0515``
83*68ed96beSPeter Maydell  bochs dispi interface registers, mapped flat without index/data ports.
84*68ed96beSPeter Maydell  Use ``(index << 1)`` as offset for (16bit) register access.
85*68ed96beSPeter Maydell``0600 - 0607``
86*68ed96beSPeter Maydell  QEMU extended registers.  QEMU 2.2+ only.
87*68ed96beSPeter Maydell  The pci revision is 2 (or greater) when these registers are present.
88*68ed96beSPeter Maydell  The registers are 32bit.
89*68ed96beSPeter Maydell``0600``
90*68ed96beSPeter Maydell  QEMU extended register region size, in bytes.
91*68ed96beSPeter Maydell``0604``
92*68ed96beSPeter Maydell  framebuffer endianness register.
93*68ed96beSPeter Maydell  - ``0xbebebebe`` indicates big endian.
94*68ed96beSPeter Maydell  - ``0x1e1e1e1e`` indicates little endian.
95