| /openbmc/u-boot/arch/arm/include/asm/arch-mx6/ |
| H A D | crm_regs.h | 203 /* CCR_WB does not exist on i.MX6SX/UL */
246 /* MMDC_CH0 not exists on i.MX6SX */
267 /* LCDIF on i.MX6SX/UL */
299 /* QSPI1 exist on i.MX6SX/UL */
306 /* LCFIF2_PODF on i.MX6SX */
328 /* QSPI1 exist on i.MX6SX/UL */
331 /* CSCMR1_PER_CLK exists on i.MX6SX/SL/QP */
346 /* CSCMR1_CAN_CLK exists on i.MX6SX/QP */
408 /* QSPI2 on i.MX6SX */
475 /* i.MX6SX */
[all …]
|
| H A D | imx-regs.h | 81 /* AIPS3 only on i.MX6SX */
273 /* i.MX6SX */
358 /* Only for i.MX6SX */
376 /* only for i.MX6SX/UL */
805 u32 mac_addr2; /*For i.MX6SX and i.MX6UL*/
|
| H A D | mx6-ddr.h | 16 #include "mx6sx-ddr.h"
|
| /openbmc/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | Kconfig | 45 config MX6SX config
331 select MX6SX
340 select MX6SX
485 select MX6SX
494 select MX6SX
|
| H A D | clock.c | 746 /* Setting LCDIF2 for i.MX6SX */ in mxs_set_lcdclk()
922 /* Only i.MX6SX/UL support ENET2 */ in enable_fec_anatop_clock()
1122 * mx6sx, disable clock INPUT and enable clock OUTPUT. This is important in enable_pcie_clock()
|
| /openbmc/linux/drivers/gpu/drm/mxsfb/ |
| H A D | Kconfig | 20 i.MX28, i.MX6SX, i.MX7 and i.MX8M).
|
| H A D | mxsfb_drv.h | 5 * i.MX23/i.MX28/i.MX6SX MXSFB LCD controller driver.
|
| H A D | mxsfb_regs.h | 6 * i.MX23/i.MX28/i.MX6SX MXSFB LCD controller driver.
|
| /openbmc/linux/Documentation/devicetree/bindings/nvmem/ |
| H A D | imx-ocotp.yaml | 14 i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL,
|
| /openbmc/u-boot/doc/imx/common/ |
| H A D | imx6.txt | 11 For i.MX6SX and i.MX6UL, they have two MAC addresses. The second MAC address
|
| /openbmc/u-boot/arch/arm/mach-imx/ |
| H A D | imx_bootaux.c | 55 * To i.MX6SX and i.MX7D, the image supported by bootaux needs
|
| /openbmc/u-boot/drivers/fastboot/ |
| H A D | Kconfig | 28 default 0x82000000 if MX6SX || MX6SL || MX6UL || MX6SLL
|
| /openbmc/linux/Documentation/devicetree/bindings/thermal/ |
| H A D | imx-thermal.yaml | 30 i.MX6SX and i.MX7S/D have two more IRQs than i.MX6Q, one is IRQ_LOW
|
| /openbmc/u-boot/arch/arm/include/asm/mach-imx/ |
| H A D | rdc-sema.h | 32 /* The Following macro definitions are common to i.MX6SX and i.MX7D */
|
| /openbmc/linux/Documentation/devicetree/bindings/power/ |
| H A D | fsl,imx-gpc.yaml | 82 The following additional DOMAIN_INDEX value is valid for i.MX6SX:
|
| /openbmc/u-boot/include/configs/ |
| H A D | mx6sxsabreauto.h | 5 * Configuration settings for the Freescale i.MX6SX Sabreauto board.
|
| H A D | mx6sxsabresd.h | 5 * Configuration settings for the Freescale i.MX6SX Sabresd board.
|
| /openbmc/linux/drivers/soc/imx/ |
| H A D | soc-imx.c | 95 soc_id = "i.MX6SX"; in imx_soc_device_init()
|
| /openbmc/linux/drivers/net/ethernet/freescale/ |
| H A D | fec.h | 436 * i.MX6SX ENET IP add Audio Video Bridging (AVB) feature support.
447 * The issue exist at i.MX6SX enet IP.
487 /* i.MX6SX ENET IP supports multiple queues (3 queues), use this quirk to
|
| /openbmc/u-boot/drivers/pci/ |
| H A D | pcie_imx.c | 443 /* SSP_EN is not used on MX6SX anymore */ in imx6_pcie_assert_core_reset()
590 /* SSP_EN is not used on MX6SX anymore */ in imx6_pcie_deassert_core_reset()
|
| /openbmc/u-boot/board/freescale/mx6sxsabreauto/ |
| H A D | mx6sxsabreauto.c | 334 puts("Board: MX6SX SABRE AUTO\n"); in checkboard()
|
| /openbmc/linux/sound/soc/fsl/ |
| H A D | fsl_mqs.c | 199 /* On i.MX6sx the MQS control register is in GPR domain in fsl_mqs_probe()
|
| /openbmc/u-boot/board/freescale/mx6sxsabresd/ |
| H A D | mx6sxsabresd.c | 318 printf("Board: MX6SX SABRE SDB rev%c\n", nxp_board_rev_string()); in checkboard()
|
| /openbmc/linux/drivers/clocksource/ |
| H A D | timer-imx-gpt.c | 25 * - MX6DL, MX6SX, MX6Q(rev1.1+)
|
| /openbmc/u-boot/env/ |
| H A D | Kconfig | 157 default y if MX6SX || MX7D
|