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/openbmc/qemu/disas/
H A Dmips.c225 /* MSA */
599 /* MIPS MSA Extension */
1239 /* MSA */
1240 #define MSA INSN_MSA macro
1424 /* MSA */
1425 {"sll.b", "+d,+e,+f", 0x7800000d, 0xffe0003f, WR_VD|RD_VS|RD_VT, 0, MSA},
1426 {"sll.h", "+d,+e,+f", 0x7820000d, 0xffe0003f, WR_VD|RD_VS|RD_VT, 0, MSA},
1427 {"sll.w", "+d,+e,+f", 0x7840000d, 0xffe0003f, WR_VD|RD_VS|RD_VT, 0, MSA},
1428 {"sll.d", "+d,+e,+f", 0x7860000d, 0xffe0003f, WR_VD|RD_VS|RD_VT, 0, MSA},
1429 {"slli.b", "+d,+e,+7", 0x78700009, 0xfff8003f, WR_VD|RD_VS, 0, MSA},
[all …]
/openbmc/linux/arch/mips/include/asm/
H A Dmsa.h25 * read_msa_wr() - Read a single MSA vector register
30 * Read the value of MSA vector register idx into the FPU register
64 * write_msa_wr() - Write a single MSA vector register
69 * Write the value from the FPU register union from into MSA vector
125 * compiler to optimise out code for CPUs without MSA without adding in thread_msa_context_live()
126 * an extra redundant check for CPUs with MSA. in thread_msa_context_live()
150 * compiler to optimise out code for CPUs without MSA without adding in init_msa_upper()
151 * an extra redundant check for CPUs with MSA. in init_msa_upper()
162 * to allow compilation with toolchains that do not support MSA. Once all
163 * toolchains in use support MSA these can be removed.
[all …]
H A Dasmmacro.h13 #include <asm/msa.h>
247 .set msa
256 .set msa
265 .set msa
274 .set msa
283 .set msa
292 .set msa
301 .set msa
310 .set msa
319 .set msa
[all …]
/openbmc/linux/arch/mips/include/uapi/asm/
H A Ducontext.h26 * struct msa_extcontext - MSA extended context structure
28 * @wr: the most significant 64 bits of each MSA vector register
29 * @csr: the value of the MSA control & status register
31 * If MSA context is live for a task at the time a signal is delivered to it,
32 * this structure will hold the MSA context of the task as it was prior to the
H A Dkvm.h71 * Register set = 3: FPU / MSA registers (see definitions below).
170 * KVM_REG_MIPS_FPU - Floating Point and MIPS SIMD Architecture (MSA) registers.
195 * KVM_REG_MIPS_MSACR - MIPS SIMD Architecture (MSA) control registers.
/openbmc/linux/drivers/net/wireless/ath/ath10k/
H A Dsnoc.c1449 hdr->start = cpu_to_le32((unsigned long)ar->msa.vaddr); in ath10k_msa_dump_memory()
1450 hdr->length = cpu_to_le32(ar->msa.mem_size); in ath10k_msa_dump_memory()
1452 if (current_region->len < ar->msa.mem_size) { in ath10k_msa_dump_memory()
1453 memcpy(buf, ar->msa.vaddr, current_region->len); in ath10k_msa_dump_memory()
1454 ath10k_warn(ar, "msa dump length is less than msa size %x, %x\n", in ath10k_msa_dump_memory()
1455 current_region->len, ar->msa.mem_size); in ath10k_msa_dump_memory()
1457 memcpy(buf, ar->msa.vaddr, ar->msa.mem_size); in ath10k_msa_dump_memory()
1565 dev_err(dev, "failed to resolve msa fixed region\n"); in ath10k_setup_msa_resources()
1569 ar->msa.paddr = r.start; in ath10k_setup_msa_resources()
1570 ar->msa.mem_size = resource_size(&r); in ath10k_setup_msa_resources()
[all …]
H A Dqmi.c59 ath10k_err(ar, "failed to assign msa map permissions: %d\n", ret); in ath10k_qmi_map_msa_permission()
83 ath10k_err(ar, "failed to unmap msa permissions: %d\n", ret); in ath10k_qmi_unmap_msa_permission()
131 req.msa_addr = ar->msa.paddr; in ath10k_qmi_msa_mem_info_send_sync_msg()
132 req.size = ar->msa.mem_size; in ath10k_qmi_msa_mem_info_send_sync_msg()
145 ath10k_err(ar, "failed to send msa mem info req: %d\n", ret); in ath10k_qmi_msa_mem_info_send_sync_msg()
154 ath10k_err(ar, "msa info req rejected: %d\n", resp.resp.error); in ath10k_qmi_msa_mem_info_send_sync_msg()
166 max_mapped_addr = ar->msa.paddr + ar->msa.mem_size; in ath10k_qmi_msa_mem_info_send_sync_msg()
169 if (resp.mem_region_info[i].size > ar->msa.mem_size || in ath10k_qmi_msa_mem_info_send_sync_msg()
171 resp.mem_region_info[i].region_addr < ar->msa.paddr || in ath10k_qmi_msa_mem_info_send_sync_msg()
184 "qmi msa mem region %d addr 0x%pa size 0x%x flag 0x%08x\n", in ath10k_qmi_msa_mem_info_send_sync_msg()
[all …]
/openbmc/linux/arch/mips/kernel/
H A Dsignal.c40 #include <asm/msa.h>
164 struct msa_extcontext __user *msa = buf; in save_msa_extcontext() local
172 * Ensure that we can't lose the live MSA context between checking in save_msa_extcontext()
180 * instructions, so MSA context has to be saved to kernel memory in save_msa_extcontext()
187 err = __put_user(read_msa_csr(), &msa->csr); in save_msa_extcontext()
188 err |= _save_msa_all_upper(&msa->wr); in save_msa_extcontext()
194 err = __put_user(current->thread.fpu.msacsr, &msa->csr); in save_msa_extcontext()
198 err |= __put_user(val, &msa->wr[i]); in save_msa_extcontext()
202 err |= __put_user(MSA_EXTCONTEXT_MAGIC, &msa->ext.magic); in save_msa_extcontext()
203 err |= __put_user(sizeof(*msa), &msa->ext.size); in save_msa_extcontext()
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/openbmc/qemu/tests/tcg/mips/user/ase/msa/
H A DREADME2 mips64el MSA-enabled CPU (I6400, I6500), using an appropriate MIPS toolchain.
14 MSA tests:
17 cd tests/tcg/mips/user/ase/msa
/openbmc/openbmc/poky/meta/recipes-devtools/gcc/gcc/
H A D0025-gcc-testsuite-tweaks-for-mips-OE.patch9 Also disable MSA mips runtime extensions. For some reason qemu appears to accept the test
25 Also, for gcc.target tests, add checks on wheter loongson or msa code can
52 + verbose -log "No MSA avail"
120 - #error "MSA NOT AVAIL"
123 - #error "MSA NOT AVAIL FOR ISA REV < 2"
126 - #error "MSA HARD_FLOAT REQUIRED"
129 - #error "MSA 64-bit FPR REQUIRED"
131 - #include <msa.h>
/openbmc/u-boot/drivers/video/
H A Dlogicore_dp_tx.c189 * @main_stream_attributes: MSA set for this device
1860 * cfg_msa_recalculate() - Calculate MSA parameters
1863 * Calculate the following Main Stream Attributes (MSA):
1919 /* Compute the rest of the MSA values. */ in cfg_msa_recalculate()
2033 * clear_msa_values() - Clear MSA values
2064 * set_msa_values() - Set MSA values
2077 printf(" set MSA %u x %u\n", msa_config->h_active, in set_msa_values()
2114 * logicore_dp_tx_set_msa() - Set given MSA values on device
2116 * @msa: The MSA values to set for the device
2119 struct logicore_dp_tx_msa *msa) in logicore_dp_tx_set_msa() argument
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_hpo_dp_stream_encoder.c220 /* Double buffer enable for MSA and pixel format registers in dcn31_hpo_dp_stream_enc_set_stream_attribute()
365 /* MSA Packet Mapping to 32-bit Link Symbols - DP2 spec, section 2.7.4.1 in dcn31_hpo_dp_stream_enc_set_stream_attribute()
368 * MSA[0] = { 0, 0, 0, VFREQ[47:40]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
369 * MSA[1] = { 0, 0, 0, VFREQ[39:32]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
370 * MSA[2] = { 0, 0, 0, VFREQ[31:24]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
371 * MSA[3] = { HTotal[15:8], HStart[15:8], HWidth[15:8], VFREQ[23:16]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
372 * MSA[4] = { HTotal[ 7:0], HStart[ 7:0], HWidth[ 7:0], VFREQ[15: 8]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
373 * MSA[5] = { VTotal[15:8], VStart[15:8], VHeight[15:8], VFREQ[ 7: 0]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
374 * MSA[6] = { VTotal[ 7:0], VStart[ 7:0], VHeight[ 7:0], MISC0[ 7: 0]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
375 * MSA[7] = { HSP|HSW[14:8], VSP|VSW[14:8], 0, MISC1[ 7: 0]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
[all …]
/openbmc/linux/arch/csky/abiv2/inc/abi/
H A Dentry.h290 * MMU on: use origin MSA value from bootloader
292 * cr<30/31, 15> MSA register format:
296 mfcr r6, MSA_SET /* Get MSA */
301 mtcr r6, MSA_SET /* Set MSA */
304 mtcr r6, MSA_CLR /* Clr MSA */
/openbmc/linux/tools/arch/s390/include/uapi/asm/
H A Dkvm.h144 __u8 kmac[16]; /* with MSA */
145 __u8 kmc[16]; /* with MSA */
146 __u8 km[16]; /* with MSA */
147 __u8 kimd[16]; /* with MSA */
148 __u8 klmd[16]; /* with MSA */
/openbmc/linux/arch/s390/include/uapi/asm/
H A Dkvm.h144 __u8 kmac[16]; /* with MSA */
145 __u8 kmc[16]; /* with MSA */
146 __u8 km[16]; /* with MSA */
147 __u8 kimd[16]; /* with MSA */
148 __u8 klmd[16]; /* with MSA */
/openbmc/linux/arch/s390/tools/
H A Dgen_facilities.c84 76, /* msa extension 3 */
85 77, /* msa extension 4 */
90 146, /* msa extension 8 */
93 155, /* msa extension 9 */
/openbmc/linux/arch/mips/kvm/
H A Dmips.c707 /* MIPS SIMD Architecture (MSA) registers */ in kvm_mips_get_reg()
711 /* Can't access MSA registers in FR=0 mode */ in kvm_mips_get_reg()
841 /* MIPS SIMD Architecture (MSA) registers */ in kvm_mips_set_reg()
1060 * We don't support MSA vector partitioning yet: in kvm_vm_ioctl_check_extension()
1341 * If FPU / MSA are enabled (i.e. the guest's FPU / MSA context in __kvm_mips_handle_exit()
1345 * vector, as it may well cause an [MSA] FP exception if there in __kvm_mips_handle_exit()
1382 * If MSA state is already live, it is undefined how it interacts with in kvm_own_fpu()
1384 * exceptions trying to save the MSA state later when CU=1 && FR=1, so in kvm_own_fpu()
1415 /* Enable MSA for guest and restore context */
1432 * interacts with MSA state, so play it safe and save it first. in kvm_own_msa()
[all …]
H A Dtrace.h100 { KVM_TRACE_EXIT_MSA_FPE, "MSA FPE" }, \
102 { KVM_TRACE_EXIT_MSA_DISABLED, "MSA Disabled" }, \
249 { KVM_TRACE_AUX_MSA, "MSA" }, \
250 { KVM_TRACE_AUX_FPU_MSA, "FPU & MSA" }
/openbmc/linux/drivers/scsi/device_handler/
H A DKconfig22 tristate "HP/COMPAQ MSA Device Handler"
25 If you have a HP/COMPAQ MSA device that requires START_STOP to
/openbmc/qemu/target/mips/
H A Dkvm.c107 warn_report("KVM does not support MSA, disabling"); in kvm_mips_reset_vcpu()
613 * FPU register state is a subset of MSA vector state, so don't put FPU in kvm_mips_put_fpu_registers()
614 * registers if we're emulating a CPU with MSA. in kvm_mips_put_fpu_registers()
634 /* Only put MSA state if we're emulating a CPU with MSA */ in kvm_mips_put_fpu_registers()
636 /* MSA Control Registers */ in kvm_mips_put_fpu_registers()
654 /* Big endian MSA not supported by QEMU yet anyway */ in kvm_mips_put_fpu_registers()
692 * FPU register state is a subset of MSA vector state, so don't save FPU in kvm_mips_get_fpu_registers()
693 * registers if we're emulating a CPU with MSA. in kvm_mips_get_fpu_registers()
713 /* Only get MSA state if we're emulating a CPU with MSA */ in kvm_mips_get_fpu_registers()
715 /* MSA Control Registers */ in kvm_mips_get_fpu_registers()
[all …]
H A Dmsa.c33 /* MSA access enabled */ in msa_reset()
39 * MSA CSR: in msa_reset()
/openbmc/linux/drivers/char/mwave/
H A D3780i.c488 /* Set the initial MSA address. No adjustments need to be made to data store addresses */ in dsp3780I_ReadDStore()
530 /* Set the initial MSA address. No adjustments need to be made to data store addresses */ in dsp3780I_ReadAndClearDStore()
571 /* Set the initial MSA address. No adjustments need to be made to data store addresses */ in dsp3780I_WriteDStore()
612 * Set the initial MSA address. To convert from an instruction store in dsp3780I_ReadIStore()
613 * address to an MSA address in dsp3780I_ReadIStore()
661 * Set the initial MSA address. To convert from an instruction store in dsp3780I_WriteIStore()
662 * address to an MSA address in dsp3780I_WriteIStore()
/openbmc/linux/tools/arch/mips/include/uapi/asm/
H A Dkvm.h62 * Register set = 3: FPU / MSA registers (see definitions below).
152 * KVM_REG_MIPS_FPU - Floating Point and MIPS SIMD Architecture (MSA) registers.
177 * KVM_REG_MIPS_MSACR - MIPS SIMD Architecture (MSA) control registers.
/openbmc/qemu/linux-headers/asm-s390/
H A Dkvm.h457 __u8 kmac[16]; /* with MSA */
458 __u8 kmc[16]; /* with MSA */
459 __u8 km[16]; /* with MSA */
460 __u8 kimd[16]; /* with MSA */
461 __u8 klmd[16]; /* with MSA */
/openbmc/qemu/linux-headers/asm-mips/
H A Dkvm.h69 * Register set = 3: FPU / MSA registers (see definitions below).
168 * KVM_REG_MIPS_FPU - Floating Point and MIPS SIMD Architecture (MSA) registers.
193 * KVM_REG_MIPS_MSACR - MIPS SIMD Architecture (MSA) control registers.

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