1*fed50ffdSPhilippe Mathieu-Daudé /* 2*fed50ffdSPhilippe Mathieu-Daudé * MIPS SIMD Architecture Module Instruction emulation helpers for QEMU. 3*fed50ffdSPhilippe Mathieu-Daudé * 4*fed50ffdSPhilippe Mathieu-Daudé * Copyright (c) 2014 Imagination Technologies 5*fed50ffdSPhilippe Mathieu-Daudé * 6*fed50ffdSPhilippe Mathieu-Daudé * This library is free software; you can redistribute it and/or 7*fed50ffdSPhilippe Mathieu-Daudé * modify it under the terms of the GNU Lesser General Public 8*fed50ffdSPhilippe Mathieu-Daudé * License as published by the Free Software Foundation; either 9*fed50ffdSPhilippe Mathieu-Daudé * version 2.1 of the License, or (at your option) any later version. 10*fed50ffdSPhilippe Mathieu-Daudé * 11*fed50ffdSPhilippe Mathieu-Daudé * This library is distributed in the hope that it will be useful, 12*fed50ffdSPhilippe Mathieu-Daudé * but WITHOUT ANY WARRANTY; without even the implied warranty of 13*fed50ffdSPhilippe Mathieu-Daudé * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14*fed50ffdSPhilippe Mathieu-Daudé * Lesser General Public License for more details. 15*fed50ffdSPhilippe Mathieu-Daudé * 16*fed50ffdSPhilippe Mathieu-Daudé * You should have received a copy of the GNU Lesser General Public 17*fed50ffdSPhilippe Mathieu-Daudé * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18*fed50ffdSPhilippe Mathieu-Daudé */ 19*fed50ffdSPhilippe Mathieu-Daudé 20*fed50ffdSPhilippe Mathieu-Daudé #include "qemu/osdep.h" 21*fed50ffdSPhilippe Mathieu-Daudé #include "cpu.h" 22*fed50ffdSPhilippe Mathieu-Daudé #include "internal.h" 23*fed50ffdSPhilippe Mathieu-Daudé #include "fpu/softfloat.h" 24*fed50ffdSPhilippe Mathieu-Daudé #include "fpu_helper.h" 25*fed50ffdSPhilippe Mathieu-Daudé msa_reset(CPUMIPSState * env)26*fed50ffdSPhilippe Mathieu-Daudévoid msa_reset(CPUMIPSState *env) 27*fed50ffdSPhilippe Mathieu-Daudé { 28*fed50ffdSPhilippe Mathieu-Daudé if (!ase_msa_available(env)) { 29*fed50ffdSPhilippe Mathieu-Daudé return; 30*fed50ffdSPhilippe Mathieu-Daudé } 31*fed50ffdSPhilippe Mathieu-Daudé 32*fed50ffdSPhilippe Mathieu-Daudé #ifdef CONFIG_USER_ONLY 33*fed50ffdSPhilippe Mathieu-Daudé /* MSA access enabled */ 34*fed50ffdSPhilippe Mathieu-Daudé env->CP0_Config5 |= 1 << CP0C5_MSAEn; 35*fed50ffdSPhilippe Mathieu-Daudé env->CP0_Status |= (1 << CP0St_CU1) | (1 << CP0St_FR); 36*fed50ffdSPhilippe Mathieu-Daudé #endif 37*fed50ffdSPhilippe Mathieu-Daudé 38*fed50ffdSPhilippe Mathieu-Daudé /* 39*fed50ffdSPhilippe Mathieu-Daudé * MSA CSR: 40*fed50ffdSPhilippe Mathieu-Daudé * - non-signaling floating point exception mode off (NX bit is 0) 41*fed50ffdSPhilippe Mathieu-Daudé * - Cause, Enables, and Flags are all 0 42*fed50ffdSPhilippe Mathieu-Daudé * - round to nearest / ties to even (RM bits are 0) 43*fed50ffdSPhilippe Mathieu-Daudé */ 44*fed50ffdSPhilippe Mathieu-Daudé env->active_tc.msacsr = 0; 45*fed50ffdSPhilippe Mathieu-Daudé 46*fed50ffdSPhilippe Mathieu-Daudé restore_msa_fp_status(env); 47*fed50ffdSPhilippe Mathieu-Daudé 48*fed50ffdSPhilippe Mathieu-Daudé /* tininess detected after rounding.*/ 49*fed50ffdSPhilippe Mathieu-Daudé set_float_detect_tininess(float_tininess_after_rounding, 50*fed50ffdSPhilippe Mathieu-Daudé &env->active_tc.msa_fp_status); 51*fed50ffdSPhilippe Mathieu-Daudé 52*fed50ffdSPhilippe Mathieu-Daudé /* clear float_status exception flags */ 53*fed50ffdSPhilippe Mathieu-Daudé set_float_exception_flags(0, &env->active_tc.msa_fp_status); 54*fed50ffdSPhilippe Mathieu-Daudé 55*fed50ffdSPhilippe Mathieu-Daudé /* clear float_status nan mode */ 56*fed50ffdSPhilippe Mathieu-Daudé set_default_nan_mode(0, &env->active_tc.msa_fp_status); 57*fed50ffdSPhilippe Mathieu-Daudé 58*fed50ffdSPhilippe Mathieu-Daudé /* set proper signanling bit meaning ("1" means "quiet") */ 59*fed50ffdSPhilippe Mathieu-Daudé set_snan_bit_is_one(0, &env->active_tc.msa_fp_status); 60*fed50ffdSPhilippe Mathieu-Daudé } 61