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/openbmc/linux/drivers/clocksource/
H A Dtimer-atmel-pit.c46 struct clk *mck; member
70 * Clocksource: just a monotonic counter of MCK/16 cycles.
100 * Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16)
184 data->mck = of_clk_get(node, 0); in at91sam926x_pit_dt_init()
185 if (IS_ERR(data->mck)) { in at91sam926x_pit_dt_init()
186 pr_err("Unable to get mck clk\n"); in at91sam926x_pit_dt_init()
187 ret = PTR_ERR(data->mck); in at91sam926x_pit_dt_init()
191 ret = clk_prepare_enable(data->mck); in at91sam926x_pit_dt_init()
193 pr_err("Unable to enable mck\n"); in at91sam926x_pit_dt_init()
206 * Use our actual MCK to figure out how many MCK/16 ticks per in at91sam926x_pit_dt_init()
[all …]
/openbmc/linux/sound/soc/atmel/
H A Datmel-i2s.c159 unsigned long mck; member
168 /* mck = (32 * (imckfs+1) / (imckdiv+1)) * fs */
170 /* mck = 6.144Mhz */
171 { 8000, I2S_MCK_6M144, 1, 47}, /* mck = 768 fs */
173 /* mck = 12.288MHz */
174 { 16000, I2S_MCK_12M288, 1, 47}, /* mck = 768 fs */
175 { 24000, I2S_MCK_12M288, 3, 63}, /* mck = 512 fs */
176 { 32000, I2S_MCK_12M288, 3, 47}, /* mck = 384 fs */
177 { 48000, I2S_MCK_12M288, 7, 63}, /* mck = 256 fs */
178 { 64000, I2S_MCK_12M288, 7, 47}, /* mck = 192 fs */
[all …]
H A Datmel_ssc_dai.h26 #define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */
29 #define ATMEL_SSC_CMR_DIV 0 /* MCK divider for BCLK */
/openbmc/u-boot/drivers/clk/at91/
H A DKconfig44 H64MX 64-bit matrix clocks are MCK. The H32MX 32-bit
45 matrix clock is to be configured as MCK if MCK does not
46 exceed 83 MHz, else it is to be configured as MCK/2.
/openbmc/u-boot/arch/arm/mach-at91/
H A Dspl_at91.c85 * PCK = MCK = MOSC in board_init_f()
92 /* PCK = PLLA = 2 * MCK */ in board_init_f()
95 /* Switch MCK on PLLA output */ in board_init_f()
/openbmc/linux/drivers/mfd/
H A Datmel-smc.c27 * atmel_smc_cs_encode_ncycles - encode a number of MCK clk cycles in the
29 * @ncycles: number of MCK clk cycles
83 * @ncycles: value (expressed in MCK clk cycles) to assign to this Txx
125 * @ncycles: value (expressed in MCK clk cycles) to assign to this xx_SETUP
164 * @ncycles: value (expressed in MCK clk cycles) to assign to this xx_PULSE
203 * @ncycles: value (expressed in MCK clk cycles) to assign to this xx_CYCLE
/openbmc/u-boot/include/configs/
H A Dpm9263.h45 /* PCK/2 = MCK Master Clock from PLLA */
50 /* PCK/2 = MCK Master Clock from PLLA */
56 /* PCK/4 = MCK Master Clock from PLLA */
61 /* PCK/4 = MCK Master Clock from PLLA */
H A Dat91sam9263ek.h100 /* PCK/2 = MCK Master Clock from PLLA */
105 /* PCK/2 = MCK Master Clock from PLLA */
H A Dpm9261.h43 /* PCK/2 = MCK Master Clock from PLLA */
49 /* PCK/2 = MCK Master Clock from PLLA */
/openbmc/u-boot/arch/arm/dts/
H A Dsama5d2.dtsi136 mck: masterck { label
148 clocks = <&mck>;
163 clocks = <&main>, <&plladiv>, <&utmi>, <&mck>;
189 clocks = <&mck>;
195 clocks = <&mck>;
231 clocks = <&mck>;
454 clocks = <&mck>;
532 clocks = <&main>, <&plla>, <&utmi>, <&mck>;
H A Dat91sam9261.dtsi284 clocks = <&mck>;
624 mck: masterck { label
717 clocks = <&mck>;
723 clocks = <&mck>;
731 clocks = <&mck>;
850 clocks = <&mck>;
H A Dat91sam9n12.dtsi166 mck: masterck { label
188 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
211 clocks = <&mck>;
217 clocks = <&mck>;
249 clocks = <&mck>;
391 clocks = <&mck>;
854 clocks = <&mck>;
H A Dat91sam9g20.dtsi61 mck: masterck { label
H A Dat91sam9rl.dtsi379 clocks = <&mck>;
858 mck: masterck { label
873 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
911 clocks = <&mck>;
1046 clocks = <&mck>;
H A Dat91sam9x5.dtsi171 mck: masterck { label
194 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
223 clocks = <&mck>;
261 clocks = <&mck>;
398 clocks = <&mck>;
933 clocks = <&mck>;
H A Dat91sam9g45.dtsi169 mck: masterck { label
190 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
213 clocks = <&mck>;
239 clocks = <&mck>;
398 clocks = <&mck>;
920 clocks = <&mck>;
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Datmel,isc.yaml44 const: isc-mck
102 clock-output-names = "isc-mck";
H A Dmicrochip,xisc.yaml44 const: isc-mck
118 clock-output-names = "isc-mck";
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dmediatek,mt7986-afe.yaml37 - description: audio i2s/pcm mck
119 - description: audio i2s/pcm mck
/openbmc/linux/drivers/clk/at91/
H A Dclk-master.c43 /* MCK div reference to be used by notifier. */
237 pr_warn("Failed to restore MCK DIV clock\n"); in clk_master_div_restore_context_chg()
264 * We want to avoid any overclocking of MCK DIV domain. To do in clk_master_div_notifier_fn()
269 * FRAC PLL -> DIV PLL -> MCK DIV in clk_master_div_notifier_fn()
292 * At this point we want to restore MCK DIV domain to its maximum in clk_master_div_notifier_fn()
331 /* Update the div to preserve MCK DIV clock rate. */ in clk_master_div_notifier_fn()
646 pr_debug("MCK: %s, best_rate = %ld, parent clk: %s @ %ld\n", in clk_sama7g5_master_determine_rate()
/openbmc/u-boot/arch/arm/mach-at91/arm920t/
H A Dclock.c135 * REVISIT: assumes MCK doesn't derive from PLLB! in at91_clock_init()
144 * MCK and CPU derive from one of those primary clocks. in at91_clock_init()
/openbmc/linux/sound/soc/mediatek/mt8183/
H A Dmt8183-afe-common.h93 /* mck */
/openbmc/u-boot/arch/arm/mach-at91/arm926ejs/
H A Dclock.c143 * REVISIT: assumes MCK doesn't derive from PLLB! in at91_clock_init()
152 * MCK and CPU derive from one of those primary clocks. in at91_clock_init()
/openbmc/linux/drivers/mmc/host/
H A Datmel-mci.c298 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
301 * @mck: The peripheral bus clock hooked up to the MMC controller.
378 struct clk *mck; member
2511 host->mck = devm_clk_get(&pdev->dev, "mci_clk"); in atmci_probe()
2512 if (IS_ERR(host->mck)) in atmci_probe()
2513 return PTR_ERR(host->mck); in atmci_probe()
2519 ret = clk_prepare_enable(host->mck); in atmci_probe()
2524 host->bus_hz = clk_get_rate(host->mck); in atmci_probe()
2532 clk_disable_unprepare(host->mck); in atmci_probe()
2620 clk_disable_unprepare(host->mck); in atmci_probe()
[all …]
/openbmc/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-common.h151 /* mck */

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