/openbmc/linux/arch/sparc/include/uapi/asm/ |
H A D | asi.h | 142 /* SpitFire and later extended ASIs. The "(III)" marker designates 143 * UltraSparc-III and later specific ASIs. The "(CMT)" marker designates 168 #define ASI_PCACHE_DATA_STATUS 0x30 /* (III) PCache data stat RAM diag */ 169 #define ASI_PCACHE_DATA 0x31 /* (III) PCache data RAM diag */ 170 #define ASI_PCACHE_TAG 0x32 /* (III) PCache tag RAM diag */ 171 #define ASI_PCACHE_SNOOP_TAG 0x33 /* (III) PCache snoop tag RAM diag */ 172 #define ASI_QUAD_LDD_PHYS 0x34 /* (III+) PADDR, qword load */ 173 #define ASI_WCACHE_VALID_BITS 0x38 /* (III) WCache Valid Bits diag */ 174 #define ASI_WCACHE_DATA 0x39 /* (III) WCache data RAM diag */ 175 #define ASI_WCACHE_TAG 0x3a /* (III) WCache tag RAM diag */ [all …]
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/openbmc/qemu/target/sparc/ |
H A D | asi.h | 141 /* SpitFire and later extended ASIs. The "(III)" marker designates 142 * UltraSparc-III and later specific ASIs. The "(CMT)" marker designates 179 #define ASI_PCACHE_DATA_STATUS 0x30 /* (III) PCache data stat RAM diag */ 180 #define ASI_PCACHE_DATA 0x31 /* (III) PCache data RAM diag */ 181 #define ASI_PCACHE_TAG 0x32 /* (III) PCache tag RAM diag */ 182 #define ASI_PCACHE_SNOOP_TAG 0x33 /* (III) PCache snoop tag RAM diag */ 183 #define ASI_QUAD_LDD_PHYS 0x34 /* (III+) PADDR, qword load */ 184 #define ASI_WCACHE_VALID_BITS 0x38 /* (III) WCache Valid Bits diag */ 185 #define ASI_WCACHE_DATA 0x39 /* (III) WCache data RAM diag */ 186 #define ASI_WCACHE_TAG 0x3a /* (III) WCache tag RAM diag */ [all …]
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/openbmc/sdbusplus/test/message/ |
H A D | native_types.cpp | 27 std::string s2 = sdbusplus::message::signature("iii"); in TEST() 37 sdbusplus::message::signature("iii")}; in TEST() 39 ASSERT_EQ(v.front(), "iii"); in TEST() 45 {sdbusplus::message::signature("iii"), 1}}; in TEST() 47 ASSERT_EQ(m[sdbusplus::message::signature("iii")], 1); in TEST() 53 {sdbusplus::message::signature("iii"), 2}}; in TEST() 55 ASSERT_EQ(u[sdbusplus::message::signature("iii")], 2); in TEST()
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/openbmc/linux/arch/sparc/include/asm/ |
H A D | dcr.h | 5 /* UltraSparc-III/III+ Dispatch Control Register, ASR 0x12 */ 6 #define DCR_DPE 0x0000000000001000 /* III+: D$ Parity Error Enable */ 11 #define DCR_IPE 0x0000000000000004 /* III+: I$ Parity Error Enable */
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H A D | chmctrl.h | 8 #define CHMCTRL_TCTRL3 0x38 /* Memory Timing Control III */ 12 #define CHMCTRL_DECODE3 0x20 /* Memory Address Decode III */ 74 /* Memory Timing Control III */
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/openbmc/linux/drivers/media/rc/keymaps/ |
H A D | rc-reddo.c | 3 * MSI DIGIVOX mini III remote controller keytable 12 * Derived from MSI DIGIVOX mini III remote (rc-msi-digivox-iii.c) 17 * MSI DIGIVOX mini III "Source" = KEY_VIDEO
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/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/cdparanoia/files/ |
H A D | dont-use-internal-configs.patch | 6 Index: cdparanoia-III-10.2/configure.in 8 --- cdparanoia-III-10.2.orig/configure.in 9 +++ cdparanoia-III-10.2/configure.in
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H A D | out-of-tree-build.patch | 6 Index: cdparanoia-III-10.2/Makefile.in 8 --- cdparanoia-III-10.2.orig/Makefile.in 9 +++ cdparanoia-III-10.2/Makefile.in
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/openbmc/linux/Documentation/driver-api/ |
H A D | zorro.rst | 15 There are two types of Zorro buses, Zorro II and Zorro III: 20 - Zorro III is a 32-bit extension of Zorro II, which is backwards compatible 21 with Zorro II. The Zorro III address space lies outside the first 16 MB. 87 - Zorro III address space must be mapped explicitly using z_ioremap() first
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/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/cdparanoia/ |
H A D | cdparanoia_10.2.bb | 10 SRC_URI = "http://downloads.xiph.org/releases/cdparanoia/cdparanoia-III-${PV}.src.tgz \ 23 …ase letters are not allowed in the recipe name, thus the recipe can not be named cdparanoia-III and 25 S = "${WORKDIR}/cdparanoia-III-${PV}"
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/openbmc/linux/arch/m68k/amiga/ |
H A D | platform.c | 22 /* Zorro II regions (on Zorro II/III) */ 34 /* Zorro III regions (on Zorro III only) */ 36 .name = "Zorro III exp", 41 .name = "Zorro III cfg",
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/openbmc/linux/drivers/sbus/char/ |
H A D | Kconfig | 33 tristate "UltraSPARC-III bootbus i2c controller driver" 36 The BBC devices on the UltraSPARC III have two I2C controllers. The 64 another UltraSPARC-IIi-cEngine boardset with a 7-segment display,
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/openbmc/linux/arch/x86/ |
H A D | Kconfig.cpu | 30 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron. 32 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D). 42 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3. 108 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon" 111 Select this for Intel chips based on the Pentium-III and 160 bool "K6/K6-II/K6-III" 238 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
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/openbmc/linux/Documentation/powerpc/ |
H A D | isa-versions.rst | 26 - PowerPC Operating Environment Architecture Book III v2.02 29 - PowerPC Operating Environment Architecture Book III v2.01 33 - PowerPC Operating Environment Architecture Book III v2.01 36 - PowerPC Operating Environment Architecture Book III v2.00
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/openbmc/linux/drivers/cpufreq/ |
H A D | sparc-us3-cpufreq.c | 2 /* us3_cpufreq.c: UltraSPARC-III cpu frequency support 29 /* UltraSPARC-III has three dividers: 1, 2, and 32. These are controlled 150 .name = "UltraSPARC-III", 197 MODULE_DESCRIPTION("cpufreq driver for UltraSPARC-III");
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H A D | Kconfig.x86 | 241 This adds the CPUFreq driver for certain mobile Intel Pentium III 242 (Coppermine), all mobile Intel Pentium III-M (Tualatin) and all 254 This adds the CPUFreq driver for certain mobile Intel Pentium III 255 (Coppermine), all mobile Intel Pentium III-M (Tualatin) 304 tristate "VIA Cyrix III Longhaul"
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/openbmc/linux/Documentation/devicetree/bindings/media/i2c/ |
H A D | ti,ds90ub913.yaml | 7 title: Texas Instruments DS90UB913 FPD-Link III Serializer 13 The TI DS90UB913 is an FPD-Link III video serializer for parallel video. 61 description: FPD-Link III output port
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H A D | ti,ds90ub953.yaml | 7 title: Texas Instruments DS90UB953 FPD-Link III Serializer 13 The TI DS90UB953 is an FPD-Link III video serializer for MIPI CSI-2. 61 description: FPD-Link III output port
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/openbmc/linux/include/linux/ |
H A D | rio_regs.h | 41 #define RIO_PEF_DEV32 0x00001000 /* [III] PE supports Common TRansport Dev32 */ 42 #define RIO_PEF_EXT_RT 0x00000200 /* [III, 1.3] Extended route table support */ 43 #define RIO_PEF_STD_RT 0x00000100 /* [III, 1.3] Standard route table support */ 44 #define RIO_PEF_CTLS 0x00000010 /* [III] Common Transport Large System (< rev.3) */ 45 #define RIO_PEF_DEV16 0x00000010 /* [III] PE Supports Common Transport Dev16 (rev.3) */ 100 #define RIO_SWITCH_RT_LIMIT 0x34 /* [III, 1.3] Switch Route Table Destination ID Limit CAR */ 156 #define RIO_DID_CSR 0x60 /* [III] Base Device ID CSR */ 160 #define RIO_HOST_DID_LOCK_CSR 0x68 /* [III] Host Base Device ID Lock CSR */ 161 #define RIO_COMPONENT_TAG_CSR 0x6c /* [III] Component Tag CSR */ 203 #define RIO_EFB_SW_ROUTING_TBL 0x000E /* [III] Switch Routing Table Block */
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/openbmc/phosphor-fan-presence/control/config_files/p10bmc/com.ibm.Hardware.Chassis.Model.Rainier2U/ |
H A D | pcie_cards.json | 92 "name": "Bolt PCIe3 NVMe Flash Adapter III x8 1.6TB", 100 "name": "Bolt PCIe3 NVMe Flash Adapter III x8 3.2TB", 108 "name": "Bolt PCIe3 NVMe Flash Adapter III x8 6.4TB",
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/openbmc/phosphor-fan-presence/control/config_files/p10bmc/com.ibm.Hardware.Chassis.Model.Rainier1S4U/ |
H A D | pcie_cards.json | 76 "name": "Bolt PCIe3 NVMe Flash Adapter III x8 1.6TB", 84 "name": "Bolt PCIe3 NVMe Flash Adapter III x8 3.2TB", 92 "name": "Bolt PCIe3 NVMe Flash Adapter III x8 6.4TB",
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/openbmc/phosphor-fan-presence/control/config_files/p10bmc/com.ibm.Hardware.Chassis.Model.Rainier4U/ |
H A D | pcie_cards.json | 92 "name": "Bolt PCIe3 NVMe Flash Adapter III x8 1.6TB", 100 "name": "Bolt PCIe3 NVMe Flash Adapter III x8 3.2TB", 108 "name": "Bolt PCIe3 NVMe Flash Adapter III x8 6.4TB",
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/openbmc/u-boot/arch/mips/mach-mscc/ |
H A D | reset.c | 33 /* Prevent VCore-III from being reset with a global reset */ in _machine_restart() 51 /* Reset VCore-III, only. */ in _machine_restart()
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/openbmc/openbmc/meta-google/ |
H A D | README | 28 III. Customizations 58 III. Customizations
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/openbmc/linux/arch/x86/events/intel/ |
H A D | p6.c | 261 case 7: /* Pentium III - Katmai */ in p6_pmu_init() 262 case 8: /* Pentium III - Coppermine */ in p6_pmu_init() 263 case 10: /* Pentium III Xeon */ in p6_pmu_init() 264 case 11: /* Pentium III - Tualatin */ in p6_pmu_init()
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