xref: /openbmc/linux/arch/sparc/include/asm/dcr.h (revision b2441318)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2a439fe51SSam Ravnborg #ifndef _SPARC64_DCR_H
3a439fe51SSam Ravnborg #define _SPARC64_DCR_H
4a439fe51SSam Ravnborg 
5a439fe51SSam Ravnborg /* UltraSparc-III/III+ Dispatch Control Register, ASR 0x12 */
6a439fe51SSam Ravnborg #define DCR_DPE		0x0000000000001000 /* III+: D$ Parity Error Enable	*/
7a439fe51SSam Ravnborg #define DCR_OBS		0x0000000000000fc0 /* Observability Bus Controls	*/
8a439fe51SSam Ravnborg #define DCR_BPE		0x0000000000000020 /* Branch Predict Enable		*/
9a439fe51SSam Ravnborg #define DCR_RPE		0x0000000000000010 /* Return Address Prediction Enable	*/
10a439fe51SSam Ravnborg #define DCR_SI		0x0000000000000008 /* Single Instruction Disable	*/
11a439fe51SSam Ravnborg #define DCR_IPE		0x0000000000000004 /* III+: I$ Parity Error Enable	*/
12a439fe51SSam Ravnborg #define DCR_IFPOE	0x0000000000000002 /* IRQ FP Operation Enable		*/
13a439fe51SSam Ravnborg #define DCR_MS		0x0000000000000001 /* Multi-Scalar dispatch		*/
14a439fe51SSam Ravnborg 
15a439fe51SSam Ravnborg #endif /* _SPARC64_DCR_H */
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