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/openbmc/u-boot/drivers/mmc/
H A Dsh_sdhi.c37 static inline void sh_sdhi_writeq(struct sh_sdhi_host *host, int reg, u64 val) in sh_sdhi_writeq() argument
39 writeq(val, host->addr + (reg << host->bus_shift)); in sh_sdhi_writeq()
42 static inline u64 sh_sdhi_readq(struct sh_sdhi_host *host, int reg) in sh_sdhi_readq() argument
44 return readq(host->addr + (reg << host->bus_shift)); in sh_sdhi_readq()
47 static inline void sh_sdhi_writew(struct sh_sdhi_host *host, int reg, u16 val) in sh_sdhi_writew() argument
49 writew(val, host->addr + (reg << host->bus_shift)); in sh_sdhi_writew()
52 static inline u16 sh_sdhi_readw(struct sh_sdhi_host *host, int reg) in sh_sdhi_readw() argument
54 return readw(host->addr + (reg << host->bus_shift)); in sh_sdhi_readw()
57 static void sh_sdhi_detect(struct sh_sdhi_host *host) in sh_sdhi_detect() argument
59 sh_sdhi_writew(host, SDHI_OPTION, in sh_sdhi_detect()
[all …]
H A Dsh_mmcif.c26 struct sh_mmcif_host *host = dev_id; in sh_mmcif_intr() local
29 state = sh_mmcif_read(&host->regs->ce_int); in sh_mmcif_intr()
30 state &= sh_mmcif_read(&host->regs->ce_int_mask); in sh_mmcif_intr()
33 sh_mmcif_write(~(INT_RBSYE | INT_CRSPE), &host->regs->ce_int); in sh_mmcif_intr()
34 sh_mmcif_bitclr(MASK_MRBSYE, &host->regs->ce_int_mask); in sh_mmcif_intr()
37 sh_mmcif_write(~INT_CRSPE, &host->regs->ce_int); in sh_mmcif_intr()
38 sh_mmcif_bitclr(MASK_MCRSPE, &host->regs->ce_int_mask); in sh_mmcif_intr()
40 if (sh_mmcif_read(&host->regs->ce_cmd_set) & CMD_SET_RBSY) in sh_mmcif_intr()
44 sh_mmcif_write(~INT_BUFREN, &host->regs->ce_int); in sh_mmcif_intr()
45 sh_mmcif_bitclr(MASK_MBUFREN, &host->regs->ce_int_mask); in sh_mmcif_intr()
[all …]
H A Dexynos_dw_mmc.c38 struct dwmci_host host; member
47 static void exynos_dwmci_clksel(struct dwmci_host *host) in exynos_dwmci_clksel() argument
51 container_of(host, struct dwmci_exynos_priv_data, host); in exynos_dwmci_clksel()
53 struct dwmci_exynos_priv_data *priv = host->priv; in exynos_dwmci_clksel()
55 dwmci_writel(host, DWMCI_CLKSEL, priv->sdr_timing); in exynos_dwmci_clksel()
58 unsigned int exynos_dwmci_get_clk(struct dwmci_host *host, uint freq) in exynos_dwmci_get_clk() argument
69 clk_div = ((dwmci_readl(host, DWMCI_CLKSEL) >> DWMCI_DIVRATIO_BIT) in exynos_dwmci_get_clk()
71 sclk = get_mmc_clk(host->dev_index); in exynos_dwmci_get_clk()
75 * When clock unit is broken, need to set "host->div" in exynos_dwmci_get_clk()
77 return sclk / clk_div / (host->div + 1); in exynos_dwmci_get_clk()
[all …]
H A Dsdhci.c22 static void sdhci_reset(struct sdhci_host *host, u8 mask) in sdhci_reset() argument
28 sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); in sdhci_reset()
29 while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { in sdhci_reset()
40 static void sdhci_cmd_done(struct sdhci_host *host, struct mmc_cmd *cmd) in sdhci_cmd_done() argument
46 cmd->response[i] = sdhci_readl(host, in sdhci_cmd_done()
49 cmd->response[i] |= sdhci_readb(host, in sdhci_cmd_done()
53 cmd->response[0] = sdhci_readl(host, SDHCI_RESPONSE); in sdhci_cmd_done()
57 static void sdhci_transfer_pio(struct sdhci_host *host, struct mmc_data *data) in sdhci_transfer_pio() argument
64 *(u32 *)offs = sdhci_readl(host, SDHCI_BUFFER); in sdhci_transfer_pio()
66 sdhci_writel(host, *(u32 *)offs, SDHCI_BUFFER); in sdhci_transfer_pio()
[all …]
H A Ddw_mmc.c19 static int dwmci_wait_reset(struct dwmci_host *host, u32 value) in dwmci_wait_reset() argument
24 dwmci_writel(host, DWMCI_CTRL, value); in dwmci_wait_reset()
27 ctrl = dwmci_readl(host, DWMCI_CTRL); in dwmci_wait_reset()
45 static void dwmci_prepare_data(struct dwmci_host *host, in dwmci_prepare_data() argument
57 dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); in dwmci_prepare_data()
60 dwmci_writel(host, DWMCI_IDSTS, 0xFFFFFFFF); in dwmci_prepare_data()
63 dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); in dwmci_prepare_data()
87 ctrl = dwmci_readl(host, DWMCI_CTRL); in dwmci_prepare_data()
89 dwmci_writel(host, DWMCI_CTRL, ctrl); in dwmci_prepare_data()
91 ctrl = dwmci_readl(host, DWMCI_BMOD); in dwmci_prepare_data()
[all …]
H A Dbcm2835_sdhost.c22 * and is based on drivers/mmc/host/bcm2835.c in Linux which is written by
56 #define SDHSTS 0x20 /* SD host status - 11 R/W */
59 #define SDHCFG 0x38 /* Host configuration - 2 R/W */
60 #define SDHBCT 0x3c /* Host byte count (debug) - 32 R/W */
62 #define SDHBLC 0x50 /* Host block count (SDIO/SDHC) - 9 R/W */
182 static void bcm2835_dumpregs(struct bcm2835_host *host) in bcm2835_dumpregs() argument
185 dev_dbg(dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD)); in bcm2835_dumpregs()
186 dev_dbg(dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG)); in bcm2835_dumpregs()
187 dev_dbg(dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT)); in bcm2835_dumpregs()
188 dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); in bcm2835_dumpregs()
[all …]
H A Dmtk-sd.c286 static void msdc_reset_hw(struct msdc_host *host) in msdc_reset_hw() argument
290 setbits_le32(&host->base->msdc_cfg, MSDC_CFG_RST); in msdc_reset_hw()
292 readl_poll_timeout(&host->base->msdc_cfg, reg, in msdc_reset_hw()
296 static void msdc_fifo_clr(struct msdc_host *host) in msdc_fifo_clr() argument
300 setbits_le32(&host->base->msdc_fifocs, MSDC_FIFOCS_CLR); in msdc_fifo_clr()
302 readl_poll_timeout(&host->base->msdc_fifocs, reg, in msdc_fifo_clr()
306 static u32 msdc_fifo_rx_bytes(struct msdc_host *host) in msdc_fifo_rx_bytes() argument
308 return (readl(&host->base->msdc_fifocs) & in msdc_fifo_rx_bytes()
312 static u32 msdc_fifo_tx_bytes(struct msdc_host *host) in msdc_fifo_tx_bytes() argument
314 return (readl(&host->base->msdc_fifocs) & in msdc_fifo_tx_bytes()
[all …]
H A Dmxcmmc.c126 /* maintainer note: do we really want to have a global host pointer? */
127 static struct mxcmci_host *host = &mxcmci_host; variable
129 static inline int mxcmci_use_dma(struct mxcmci_host *host) in mxcmci_use_dma() argument
131 return host->do_dma; in mxcmci_use_dma()
134 static void mxcmci_softreset(struct mxcmci_host *host) in mxcmci_softreset() argument
139 writel(STR_STP_CLK_RESET, &host->base->str_stp_clk); in mxcmci_softreset()
141 &host->base->str_stp_clk); in mxcmci_softreset()
144 writel(STR_STP_CLK_START_CLK, &host->base->str_stp_clk); in mxcmci_softreset()
146 writel(0xff, &host->base->res_to); in mxcmci_softreset()
149 static void mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data) in mxcmci_setup_data() argument
[all …]
H A Ds5p_sdhci.c29 static void s5p_sdhci_set_control_reg(struct sdhci_host *host) in s5p_sdhci_set_control_reg() argument
39 sdhci_writel(host, SDHCI_CTRL4_DRIVE_MASK(0x3), SDHCI_CONTROL4); in s5p_sdhci_set_control_reg()
41 val = sdhci_readl(host, SDHCI_CONTROL2); in s5p_sdhci_set_control_reg()
49 sdhci_writel(host, val, SDHCI_CONTROL2); in s5p_sdhci_set_control_reg()
61 sdhci_writel(host, val, SDHCI_CONTROL3); in s5p_sdhci_set_control_reg()
69 ctrl = sdhci_readl(host, SDHCI_CONTROL2); in s5p_sdhci_set_control_reg()
72 sdhci_writel(host, ctrl, SDHCI_CONTROL2); in s5p_sdhci_set_control_reg()
75 static void s5p_set_clock(struct sdhci_host *host, u32 div) in s5p_set_clock() argument
78 set_mmc_clk(host->index, div); in s5p_set_clock()
86 static int s5p_sdhci_core_init(struct sdhci_host *host) in s5p_sdhci_core_init() argument
[all …]
H A Dxenon_sdhci.c26 /* Register Offset of SD Host Controller SOCP self-defined register */
121 struct sdhci_host host; member
131 static int xenon_mmc_phy_init(struct sdhci_host *host) in xenon_mmc_phy_init() argument
133 struct xenon_sdhci_priv *priv = host->mmc->priv; in xenon_mmc_phy_init()
139 var = sdhci_readl(host, EMMC_PHY_TIMING_ADJUST); in xenon_mmc_phy_init()
147 sdhci_writel(host, var, EMMC_PHY_TIMING_ADJUST); in xenon_mmc_phy_init()
149 /* Poll for host MMC PHY clock init to be stable */ in xenon_mmc_phy_init()
153 var = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_mmc_phy_init()
166 var = sdhci_readl(host, EMMC_PHY_TIMING_ADJUST); in xenon_mmc_phy_init()
168 sdhci_writel(host, var, EMMC_PHY_TIMING_ADJUST); in xenon_mmc_phy_init()
[all …]
H A Dzynq_sdhci.c5 * Xilinx Zynq SD Host Controller Interface
27 struct sdhci_host *host; member
58 static void arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 deviceid) in arasan_zynqmp_dll_reset() argument
63 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
65 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
72 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in arasan_zynqmp_dll_reset()
75 dev_err(mmc_dev(host->mmc), in arasan_zynqmp_dll_reset()
84 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
92 struct sdhci_host *host; in arasan_sdhci_execute_tuning() local
99 host = priv->host; in arasan_sdhci_execute_tuning()
[all …]
/openbmc/openbmc-test-automation/lib/
H A Dhost.tcl3 # This file provides valuable host and IP manipulation procedures such as get_host_name_ip, etc.
8 proc get_host_name_ip {host {quiet 1}} {
10 # Get the host name, short host name and the IP address and return them as a list.
15 # lassign [get_host_name_ip $host] host_name short_host_name ip_address
18 # host The host name or IP address to be obtained.
22 lassign [cmd_fnc "host $host" "${quiet}" "" "${print_output}"] rc out_buf
26 # Host is host name.
31 # Host is IP address.
34 set ip_address ${host}
38 # Create the short name from the host name.
[all …]
/openbmc/docs/designs/
H A Dbmc-reset-with-host-up.md1 # BMC Reset with Host Booted
13 host is up and running, there needs to be a process by which the two synchronize
14 with each other and the BMC gets itself into a state that matches with the host.
21 dealing with both IPMI and PLDM communication to the host as well as desired
22 behavior when unable to talk with the host.
25 it then checks the host to see if it is up and alive. If the power is on and the
26 host is running, then files are created in the filesystem to indicate this:
29 - /run/openbmc/host@0-on
32 and multi-host systems, the framework is there to build on.
36 implementation is done for the host via `phosphor-reset-host-check@.service` and
[all …]
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/State/
H A DHost.interface.yaml2 Implement to provide host state management
9 The desired host transition. This will be preserved across AC power
12 - xyz.openbmc_project.State.Host.Error.BMCNotReady
21 A const property describing the allowed host transitions. Some systems
29 A read-only property describing the current state of the host
38 A property to define restart cause of a host.
43 The desired transition for host firmware
47 Host firmware should be off
50 Host firmware should be on
53 Host firmware should be rebooted. Chassis power will be cycled
[all …]
/openbmc/u-boot/drivers/usb/musb-new/
H A Dmusb_uboot.c65 struct musb *host = hcd->hcd_priv; in submit_urb() local
79 host->isr(0, host); in submit_urb()
89 static int _musb_submit_control_msg(struct musb_host_data *host, in _musb_submit_control_msg() argument
93 construct_urb(&host->urb, &host->hep, dev, USB_ENDPOINT_XFER_CONTROL, in _musb_submit_control_msg()
98 dev->speed = host->host_speed; in _musb_submit_control_msg()
100 return submit_urb(&host->hcd, &host->urb); in _musb_submit_control_msg()
103 static int _musb_submit_bulk_msg(struct musb_host_data *host, in _musb_submit_bulk_msg() argument
106 construct_urb(&host->urb, &host->hep, dev, USB_ENDPOINT_XFER_BULK, in _musb_submit_bulk_msg()
108 return submit_urb(&host->hcd, &host->urb); in _musb_submit_bulk_msg()
111 static int _musb_submit_int_msg(struct musb_host_data *host, in _musb_submit_int_msg() argument
[all …]
/openbmc/openbmc/meta-google/recipes-google/host-power-ctrl/
H A Dgpio-host-pwr_git.bb1 SUMMARY = "GPIO based powercontrol for a host system"
2 DESCRIPTION = "GPIO based powercontrol for a host system."
15 file://host-ensure-off.service \
16 file://host-powercycle-watchdog.service \
17 file://host-powercycle.service \
18 file://host-poweroff-watchdog.service \
19 file://host-poweroff.service \
20 file://host-poweron.service \
21 file://host-reset-cold-watchdog.service \
22 file://host-reset-cold.service \
[all …]
/openbmc/u-boot/scripts/
H A DMakefile.host3 # Building binaries on the host system
28 host-csingle := $(foreach m,$(__hostprogs), \
32 host-cmulti := $(foreach m,$(__hostprogs),\
36 host-shared := $(foreach m,$(__hostprogs),\
40 host-cobjs := $(sort $(foreach m,$(__hostprogs),$($(m)-objs)))
45 host-cxxmulti := $(foreach m,$(__hostprogs),$(if $($(m)-cxxobjs),$(m)))
48 host-cxxobjs := $(sort $(foreach m,$(host-cxxmulti),$($(m)-cxxobjs)))
53 host-objdirs := $(dir $(__hostprogs) $(host-cobjs) $(host-cxxobjs))
55 host-objdirs := $(strip $(sort $(filter-out ./,$(host-objdirs))))
59 host-csingle := $(addprefix $(obj)/,$(host-csingle))
[all …]
/openbmc/openbmc/meta-facebook/meta-catalina/recipes-phosphor/state/
H A Dphosphor-state-manager_%.bbappend10 # The host-graceful-poweroff service replaces the `pldmSoftPowerOff` and
12 # shutdown the host.
14 obmc-host-shutdown@{}.target.requires/host-graceful-poweroff@{}.service \
18 # normal "reboot" is suppose to do a forced reboot. `host-shutdown` is used
20 # reboot, so remove the dependency. The `phosphor-reboot-host@.service` does
21 # continue to be in `obmc-host-reboot` requirements and it depends on
22 # `obmc-host-stop`, which will initiate a `host-force-poweroff`.
24 obmc-host-reboot@{}.target.requires/obmc-host-shutdown@{}.service \
27 # The host-poweron service is the equivalent to the start_host@ service
30 obmc-host-startmin@{}.target.requires/host-poweron@{}.service \
[all …]
/openbmc/qemu/hw/sd/
H A Domap_mmc.c2 * OMAP on-chip MMC/SD host emulation.
80 static void omap_mmc_fifolevel_update(OMAPMMCState *host) in omap_mmc_fifolevel_update() argument
82 if (!host->transfer && !host->fifo_len) { in omap_mmc_fifolevel_update()
83 host->status &= 0xf3ff; in omap_mmc_fifolevel_update()
87 if (host->fifo_len > host->af_level && host->ddir) { in omap_mmc_fifolevel_update()
88 if (host->rx_dma) { in omap_mmc_fifolevel_update()
89 host->status &= 0xfbff; in omap_mmc_fifolevel_update()
90 qemu_irq_raise(host->dma_rx_gpio); in omap_mmc_fifolevel_update()
92 host->status |= 0x0400; in omap_mmc_fifolevel_update()
94 host->status &= 0xfbff; in omap_mmc_fifolevel_update()
[all …]
/openbmc/phosphor-state-manager/scripts/
H A Dhost-reboot2 # A script which is called in a host-reboot path to check the host reboot count
3 # and either initiate the host firmware boot, or move it to the quiesce state
7 # host that is being rebooted (or quiesced)
13 busctl get-property xyz.openbmc_project.State.Host"$1" \
14 /xyz/openbmc_project/state/host"$1" \
21 busctl get-property xyz.openbmc_project.State.Host"$1" \
22 /xyz/openbmc_project/state/host"$1" \
23 xyz.openbmc_project.State.Host RestartCause \
27 # host instance id is input parameter to function
30 systemctl start obmc-host-quiesce@"$1".target
[all …]
/openbmc/openbmc/meta-fii/meta-kudo/recipes-phosphor/state/
H A Dphosphor-state-manager_%.bbappend5 STATE_MGR_PACKAGES:remove:kudo = " ${PN}-host-check"
6 RRECOMMENDS:${PN}-host:remove:kudo = " ${PN}-host-check"
7 PACKAGECONFIG:append:kudo = " host-gpio"
12 … rm "$D$systemd_system_unitdir/obmc-host-shutdown@0.target.requires/obmc-chassis-poweroff@0.target"
14 …rm "$D$systemd_system_unitdir/obmc-host-warm-reboot@0.target.requires/xyz.openbmc_project.Ipmi.Int…
15 …rm "$D$systemd_system_unitdir/obmc-host-warm-reboot@0.target.requires/obmc-host-force-warm-reboot@…
17 rm "$D$systemd_system_unitdir/obmc-host-reboot@0.target.requires/phosphor-reboot-host@0.service"
18 rm "$D$systemd_system_unitdir/obmc-host-reboot@0.target.requires/obmc-host-shutdown@0.target"
20 …rm "$D$systemd_system_unitdir/obmc-host-force-warm-reboot@0.target.requires/obmc-host-stop@0.targe…
21 …rm "$D$systemd_system_unitdir/obmc-host-force-warm-reboot@0.target.requires/phosphor-reboot-host@0…
[all …]
/openbmc/openbmc/meta-facebook/meta-harma/recipes-phosphor/state/
H A Dphosphor-state-manager_%.bbappend5 PACKAGECONFIG:append = " host-gpio"
29 # Host Config
30 # Host Reset
32 … obmc-host-warm-reboot@{}.target.requires/xyz.openbmc_project.Ipmi.Internal.SoftPowerOff.service \
33 obmc-host-warm-reboot@{}.target.requires/obmc-host-force-warm-reboot@{}.target \
34 obmc-host-force-warm-reboot@{}.target.requires/obmc-host-stop@{}.target \
35 obmc-host-force-warm-reboot@{}.target.requires/phosphor-reboot-host@{}.service \
39 obmc-host-warm-reboot@{}.target.wants/host-powerreset@{}.service \
42 # Host On/Off
44 obmc-host-startmin@{}.target.requires/host-poweron@{}.service \
[all …]
/openbmc/openbmc/meta-facebook/meta-santabarbara/recipes-phosphor/state/
H A Dphosphor-state-manager_%.bbappend5 PACKAGECONFIG:append = " host-gpio"
29 # Host Config
30 # Host Reset
32 … obmc-host-warm-reboot@{}.target.requires/xyz.openbmc_project.Ipmi.Internal.SoftPowerOff.service \
33 obmc-host-warm-reboot@{}.target.requires/obmc-host-force-warm-reboot@{}.target \
34 obmc-host-force-warm-reboot@{}.target.requires/obmc-host-stop@{}.target \
35 obmc-host-force-warm-reboot@{}.target.requires/phosphor-reboot-host@{}.service \
39 obmc-host-warm-reboot@{}.target.wants/host-powerreset@{}.service \
42 # Host On/Off
44 obmc-host-startmin@{}.target.requires/host-poweron@{}.service \
[all …]
/openbmc/openbmc/meta-openpower/recipes-phosphor/host/
H A Dop-proc-control-systemd-links.bb15 mkdir -p $D$systemd_system_unitdir/obmc-host-stop@0.target.wants
16 mkdir -p $D$systemd_system_unitdir/obmc-host-force-warm-reboot@0.target.requires
17 mkdir -p $D$systemd_system_unitdir/obmc-host-startmin@0.target.requires
18 mkdir -p $D$systemd_system_unitdir/obmc-host-startmin@0.target.wants
19 mkdir -p $D$systemd_system_unitdir/obmc-host-diagnostic-mode@0.target.requires
21 mkdir -p $D$systemd_system_unitdir/obmc-host-quiesce@0.target.wants
23 LINK="$D$systemd_system_unitdir/obmc-host-stop@0.target.wants/op-stop-instructions@0.service"
27 …LINK="$D$systemd_system_unitdir/obmc-host-quiesce@0.target.wants/op-clear-sys-dump-active@0.servic…
31 LINK="$D$systemd_system_unitdir/obmc-host-quiesce@0.target.wants/op-stop-instructions@0.service"
35 LINK="$D$systemd_system_unitdir/obmc-host-startmin@0.target.requires/op-cfam-reset.service"
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dmxc_nand.c36 static struct mxc_nand_host *host = &mxc_host; variable
112 static void wait_op_done(struct mxc_nand_host *host, int max_retries, argument
119 tmp = readnfc(&host->regs->config2);
122 writenfc(tmp, &host->regs->config2);
124 tmp = readnfc(&host->ip_regs->ipc);
127 writenfc(tmp, &host->ip_regs->ipc);
143 static void send_cmd(struct mxc_nand_host *host, uint16_t cmd) argument
145 pr_debug("send_cmd(host, 0x%x)\n", cmd);
147 writenfc(cmd, &host->regs->flash_cmd);
148 writenfc(NFC_CMD, &host->regs->operation);
[all …]

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