| /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | arm,gic-v3.yaml | 76 - GIC Redistributors (GICR), one range per redistributor region
179 GICR registers when the GIC redistributors are powered off.
250 <0x2f100000 0x200000>, // GICR
278 <0x2d000000 0x800000>, // GICR 1: CPUs 0-31
279 <0x2e000000 0x800000>, // GICR 2: CPUs 32-63
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | k3-am65-main.dtsi | 17 <0x00 0x01880000 0x00 0x90000>; /* GICR */
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| H A D | fsl-lx2160a.dtsi | 38 <0x0 0x06200000 0 0x100000>; /* GICR */
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| H A D | fsl-ls1088a.dtsi | 23 <0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */
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| H A D | fsl-ls2080a.dtsi | 23 <0x0 0x06100000 0 0x100000>; /* GICR (RD_base + SGI_base) */
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| H A D | armada-37xx.dtsi | 283 <0x1d40000 0x40000>; /* GICR */
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| H A D | thunderx-88xx.dtsi | 340 <0x8010 0x80000000 0x0 0x600000>; /* GICR */
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| /openbmc/linux/drivers/irqchip/ |
| H A D | irq-gic-v3.c | 1830 /* Find the chips based on GICR regions PHYS addr */ in gic_enable_quirk_nvidia_t241()
1887 .desc = "GICv3: Mediatek Chromebook GICR save problem",
2300 rdist_regs[i].redist_base = gic_of_iomap(node, 1 + i, "GICR", &res); in gic_of_init()
2371 pr_err("Couldn't map GICR region @%llx\n", redist->base_address); in gic_acpi_parse_madt_redist()
2374 gic_request_region(redist->base_address, redist->length, "GICR"); in gic_acpi_parse_madt_redist()
2397 gic_request_region(gicc->gicr_base_address, size, "GICR"); in gic_acpi_parse_madt_gicc()
2416 /* Collect redistributor base addresses in GICR entries */ in gic_acpi_collect_gicr_base()
2420 pr_info("No valid GICR entries exist\n"); in gic_acpi_collect_gicr_base()
2438 * If GICC is enabled and has valid gicr base address, then it means in gic_acpi_match_gicc()
2439 * GICR base is presented via GICC in gic_acpi_match_gicc()
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| /openbmc/linux/arch/arm64/boot/dts/intel/ |
| H A D | keembay-soc.dtsi | 58 <0x0 0x20580000 0x0 0x80000>; /* GICR */
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| /openbmc/linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-ap810-ap0.dtsi | 52 <0x3060000 0x100000>, /* GICR */
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| H A D | ac5-98dx25xx.dtsi | 315 <0x0 0x80660000 0x0 0x40000>; /* GICR */
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| /openbmc/linux/arch/arm64/boot/dts/cavium/ |
| H A D | thunder2-99xx.dtsi | 67 <0x04 0x01000000 0x0 0x1000000>; /* GICR */
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| H A D | thunder-88xx.dtsi | 389 <0x8010 0x80000000 0x0 0x600000>; /* GICR */
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| /openbmc/linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am62p-main.dtsi | 24 <0x00 0x01880000 0x00 0xc0000>, /* GICR */
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| /openbmc/linux/arch/arm64/include/asm/ |
| H A D | acpi.h | 64 #define CPUIDLE_GICR_CTXT BIT(2) /* GICR */
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| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8dxl.dtsi | 88 <0x0 0x51b00000 0 0xc0000>; /* GICR (RD_base + SGI_base) */
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| H A D | imx8qxp.dtsi | 157 <0x0 0x51b00000 0 0xc0000>; /* GICR (RD_base + SGI_base) */
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| H A D | imx8qm.dtsi | 240 <0x0 0x51b00000 0 0xC0000>, /* GICR */
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| /openbmc/linux/arch/arm64/boot/dts/amazon/ |
| H A D | alpine-v2.dtsi | 119 <0x0 0xf0280000 0x0 0x200000>, /* GICR */
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| /openbmc/linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt6779.dtsi | 126 <0 0x0c040000 0 0x200000>; /* GICR */
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| H A D | mt6797.dtsi | 480 <0 0x19200000 0 0x200000>, /* GICR */
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| /openbmc/linux/arch/arm64/boot/dts/hisilicon/ |
| H A D | hip05.dtsi | 247 <0x0 0x8d100000 0 0x300000>, /* GICR */
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| /openbmc/linux/arch/arm64/boot/dts/arm/ |
| H A D | fvp-base-revc.dts | 196 <0x0 0x2f100000 0 0x200000>, // GICR
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| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | sm4450.dtsi | 357 <0x0 0x17260000 0x0 0x100000>; /* GICR * 8 */
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| /openbmc/linux/arch/arm64/boot/dts/sprd/ |
| H A D | sc9863a.dtsi | 159 <0x0 0x14040000 0 0x100000>; /* GICR */
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