xref: /openbmc/u-boot/arch/arm/dts/k3-am65-main.dtsi (revision 430c166b)
1ea8ad1d9SLokesh Vutla// SPDX-License-Identifier: GPL-2.0
2ea8ad1d9SLokesh Vutla/*
3ea8ad1d9SLokesh Vutla * Device Tree Source for AM6 SoC Family Main Domain peripherals
4ea8ad1d9SLokesh Vutla *
5ea8ad1d9SLokesh Vutla * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
6ea8ad1d9SLokesh Vutla */
7ea8ad1d9SLokesh Vutla
8ea8ad1d9SLokesh Vutla&cbass_main {
9ea8ad1d9SLokesh Vutla	gic500: interrupt-controller@1800000 {
10ea8ad1d9SLokesh Vutla		compatible = "arm,gic-v3";
11*2d0eba3aSLokesh Vutla		#address-cells = <2>;
12*2d0eba3aSLokesh Vutla		#size-cells = <2>;
13ea8ad1d9SLokesh Vutla		ranges;
14ea8ad1d9SLokesh Vutla		#interrupt-cells = <3>;
15ea8ad1d9SLokesh Vutla		interrupt-controller;
16*2d0eba3aSLokesh Vutla		reg = <0x00 0x01800000 0x00 0x10000>,	/* GICD */
17*2d0eba3aSLokesh Vutla		      <0x00 0x01880000 0x00 0x90000>;	/* GICR */
18ea8ad1d9SLokesh Vutla		/*
19ea8ad1d9SLokesh Vutla		 * vcpumntirq:
20ea8ad1d9SLokesh Vutla		 * virtual CPU interface maintenance interrupt
21ea8ad1d9SLokesh Vutla		 */
22ea8ad1d9SLokesh Vutla		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
23ea8ad1d9SLokesh Vutla
24ea8ad1d9SLokesh Vutla		gic_its: gic-its@18200000 {
25ea8ad1d9SLokesh Vutla			compatible = "arm,gic-v3-its";
26*2d0eba3aSLokesh Vutla			reg = <0x00 0x01820000 0x00 0x10000>;
27ea8ad1d9SLokesh Vutla			msi-controller;
28ea8ad1d9SLokesh Vutla			#msi-cells = <1>;
29ea8ad1d9SLokesh Vutla		};
30ea8ad1d9SLokesh Vutla	};
31*2d0eba3aSLokesh Vutla
32*2d0eba3aSLokesh Vutla	secure_proxy_main: mailbox@32c00000 {
33*2d0eba3aSLokesh Vutla		compatible = "ti,am654-secure-proxy";
34*2d0eba3aSLokesh Vutla		#mbox-cells = <1>;
35*2d0eba3aSLokesh Vutla		reg-names = "target_data", "rt", "scfg";
36*2d0eba3aSLokesh Vutla		reg = <0x00 0x32c00000 0x00 0x100000>,
37*2d0eba3aSLokesh Vutla		      <0x00 0x32400000 0x00 0x100000>,
38*2d0eba3aSLokesh Vutla		      <0x00 0x32800000 0x00 0x100000>;
39*2d0eba3aSLokesh Vutla		interrupt-names = "rx_011";
40*2d0eba3aSLokesh Vutla		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
41*2d0eba3aSLokesh Vutla	};
42*2d0eba3aSLokesh Vutla
43*2d0eba3aSLokesh Vutla	main_uart0: serial@2800000 {
44*2d0eba3aSLokesh Vutla		compatible = "ti,am654-uart";
45*2d0eba3aSLokesh Vutla		reg = <0x00 0x02800000 0x00 0x100>;
46*2d0eba3aSLokesh Vutla		reg-shift = <2>;
47*2d0eba3aSLokesh Vutla		reg-io-width = <4>;
48*2d0eba3aSLokesh Vutla		interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
49*2d0eba3aSLokesh Vutla		clock-frequency = <48000000>;
50*2d0eba3aSLokesh Vutla		current-speed = <115200>;
51*2d0eba3aSLokesh Vutla	};
52*2d0eba3aSLokesh Vutla
53*2d0eba3aSLokesh Vutla	main_uart1: serial@2810000 {
54*2d0eba3aSLokesh Vutla		compatible = "ti,am654-uart";
55*2d0eba3aSLokesh Vutla		reg = <0x00 0x02810000 0x00 0x100>;
56*2d0eba3aSLokesh Vutla		reg-shift = <2>;
57*2d0eba3aSLokesh Vutla		reg-io-width = <4>;
58*2d0eba3aSLokesh Vutla		interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
59*2d0eba3aSLokesh Vutla		clock-frequency = <48000000>;
60*2d0eba3aSLokesh Vutla		current-speed = <115200>;
61*2d0eba3aSLokesh Vutla	};
62*2d0eba3aSLokesh Vutla
63*2d0eba3aSLokesh Vutla	main_uart2: serial@2820000 {
64*2d0eba3aSLokesh Vutla		compatible = "ti,am654-uart";
65*2d0eba3aSLokesh Vutla		reg = <0x00 0x02820000 0x00 0x100>;
66*2d0eba3aSLokesh Vutla		reg-shift = <2>;
67*2d0eba3aSLokesh Vutla		reg-io-width = <4>;
68*2d0eba3aSLokesh Vutla		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
69*2d0eba3aSLokesh Vutla		clock-frequency = <48000000>;
70*2d0eba3aSLokesh Vutla		current-speed = <115200>;
71*2d0eba3aSLokesh Vutla	};
72ea8ad1d9SLokesh Vutla};
73