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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,snps-eusb2-phy.yaml78 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
H A Dqcom,qusb2-phy.yaml201 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
H A Dqcom,usb-snps-femto-v2.yaml176 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sc7180.h144 #define GCC_QUSB2PHY_PRIM_BCR 0 macro
H A Dqcom,gcc-sdm660.h146 #define GCC_QUSB2PHY_PRIM_BCR 0 macro
H A Dqcom,qdu1000-gcc.h158 #define GCC_QUSB2PHY_PRIM_BCR 13 macro
H A Dqcom,gcc-sm6350.h159 #define GCC_QUSB2PHY_PRIM_BCR 0 macro
H A Dqcom,gcc-qcm2290.h174 #define GCC_QUSB2PHY_PRIM_BCR 14 macro
H A Dqcom,sm7150-gcc.h171 #define GCC_QUSB2PHY_PRIM_BCR 9 macro
H A Dqcom,gcc-sm6115.h177 #define GCC_QUSB2PHY_PRIM_BCR 0 macro
H A Dqcom,gcc-sc7280.h213 #define GCC_QUSB2PHY_PRIM_BCR 4 macro
H A Dqcom,sm6375-gcc.h210 #define GCC_QUSB2PHY_PRIM_BCR 9 macro
H A Dqcom,gcc-sm6125.h231 #define GCC_QUSB2PHY_PRIM_BCR 0 macro
H A Dqcom,sm8550-gcc.h204 #define GCC_QUSB2PHY_PRIM_BCR 20 macro
H A Dqcom,gcc-sm8450.h220 #define GCC_QUSB2PHY_PRIM_BCR 21 macro
H A Dqcom,gcc-sm8150.h228 #define GCC_QUSB2PHY_PRIM_BCR 15 macro
H A Dqcom,gcc-sdm845.h213 #define GCC_QUSB2PHY_PRIM_BCR 8 macro
H A Dqcom,gcc-sm8350.h234 #define GCC_QUSB2PHY_PRIM_BCR 20 macro
H A Dqcom,gcc-sm8250.h239 #define GCC_QUSB2PHY_PRIM_BCR 27 macro
H A Dqcom,gcc-msm8998.h307 #define GCC_QUSB2PHY_PRIM_BCR 106 macro
H A Dqcom,gcc-sc8180x.h276 #define GCC_QUSB2PHY_PRIM_BCR 23 macro
H A Dqcom,gcc-msm8996.h249 #define GCC_QUSB2PHY_PRIM_BCR 9 macro
H A Dqcom,gcc-sc8280xp.h446 #define GCC_QUSB2PHY_PRIM_BCR 44 macro
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm6125.dtsi682 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
H A Dsdm670.dtsi1268 resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;

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