18c8acefcSMelody Olvera /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ 28c8acefcSMelody Olvera /* 3*df873243SImran Shaik * Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc. All rights reserved. 48c8acefcSMelody Olvera */ 58c8acefcSMelody Olvera 68c8acefcSMelody Olvera #ifndef _DT_BINDINGS_CLK_QCOM_GCC_QDU1000_H 78c8acefcSMelody Olvera #define _DT_BINDINGS_CLK_QCOM_GCC_QDU1000_H 88c8acefcSMelody Olvera 98c8acefcSMelody Olvera /* GCC clocks */ 108c8acefcSMelody Olvera #define GCC_GPLL0 0 118c8acefcSMelody Olvera #define GCC_GPLL0_OUT_EVEN 1 128c8acefcSMelody Olvera #define GCC_GPLL1 2 138c8acefcSMelody Olvera #define GCC_GPLL2 3 148c8acefcSMelody Olvera #define GCC_GPLL2_OUT_EVEN 4 158c8acefcSMelody Olvera #define GCC_GPLL3 5 168c8acefcSMelody Olvera #define GCC_GPLL4 6 178c8acefcSMelody Olvera #define GCC_GPLL5 7 188c8acefcSMelody Olvera #define GCC_GPLL5_OUT_EVEN 8 198c8acefcSMelody Olvera #define GCC_GPLL6 9 208c8acefcSMelody Olvera #define GCC_GPLL7 10 218c8acefcSMelody Olvera #define GCC_GPLL8 11 228c8acefcSMelody Olvera #define GCC_AGGRE_NOC_ECPRI_DMA_CLK 12 238c8acefcSMelody Olvera #define GCC_AGGRE_NOC_ECPRI_DMA_CLK_SRC 13 248c8acefcSMelody Olvera #define GCC_AGGRE_NOC_ECPRI_GSI_CLK_SRC 14 258c8acefcSMelody Olvera #define GCC_BOOT_ROM_AHB_CLK 15 268c8acefcSMelody Olvera #define GCC_CFG_NOC_ECPRI_CC_AHB_CLK 16 278c8acefcSMelody Olvera #define GCC_CFG_NOC_USB3_PRIM_AXI_CLK 17 288c8acefcSMelody Olvera #define GCC_DDRSS_ECPRI_DMA_CLK 18 298c8acefcSMelody Olvera #define GCC_ECPRI_AHB_CLK 19 308c8acefcSMelody Olvera #define GCC_ECPRI_CC_GPLL0_CLK_SRC 20 318c8acefcSMelody Olvera #define GCC_ECPRI_CC_GPLL1_EVEN_CLK_SRC 21 328c8acefcSMelody Olvera #define GCC_ECPRI_CC_GPLL2_EVEN_CLK_SRC 22 338c8acefcSMelody Olvera #define GCC_ECPRI_CC_GPLL3_CLK_SRC 23 348c8acefcSMelody Olvera #define GCC_ECPRI_CC_GPLL4_CLK_SRC 24 358c8acefcSMelody Olvera #define GCC_ECPRI_CC_GPLL5_EVEN_CLK_SRC 25 368c8acefcSMelody Olvera #define GCC_ECPRI_XO_CLK 26 378c8acefcSMelody Olvera #define GCC_ETH_DBG_SNOC_AXI_CLK 27 388c8acefcSMelody Olvera #define GCC_GEMNOC_PCIE_QX_CLK 28 398c8acefcSMelody Olvera #define GCC_GP1_CLK 29 408c8acefcSMelody Olvera #define GCC_GP1_CLK_SRC 30 418c8acefcSMelody Olvera #define GCC_GP2_CLK 31 428c8acefcSMelody Olvera #define GCC_GP2_CLK_SRC 32 438c8acefcSMelody Olvera #define GCC_GP3_CLK 33 448c8acefcSMelody Olvera #define GCC_GP3_CLK_SRC 34 458c8acefcSMelody Olvera #define GCC_PCIE_0_AUX_CLK 35 468c8acefcSMelody Olvera #define GCC_PCIE_0_AUX_CLK_SRC 36 478c8acefcSMelody Olvera #define GCC_PCIE_0_CFG_AHB_CLK 37 488c8acefcSMelody Olvera #define GCC_PCIE_0_CLKREF_EN 38 498c8acefcSMelody Olvera #define GCC_PCIE_0_MSTR_AXI_CLK 39 508c8acefcSMelody Olvera #define GCC_PCIE_0_PHY_AUX_CLK 40 518c8acefcSMelody Olvera #define GCC_PCIE_0_PHY_RCHNG_CLK 41 528c8acefcSMelody Olvera #define GCC_PCIE_0_PHY_RCHNG_CLK_SRC 42 538c8acefcSMelody Olvera #define GCC_PCIE_0_PIPE_CLK 43 548c8acefcSMelody Olvera #define GCC_PCIE_0_SLV_AXI_CLK 44 558c8acefcSMelody Olvera #define GCC_PCIE_0_SLV_Q2A_AXI_CLK 45 568c8acefcSMelody Olvera #define GCC_PDM2_CLK 46 578c8acefcSMelody Olvera #define GCC_PDM2_CLK_SRC 47 588c8acefcSMelody Olvera #define GCC_PDM_AHB_CLK 48 598c8acefcSMelody Olvera #define GCC_PDM_XO4_CLK 49 608c8acefcSMelody Olvera #define GCC_QMIP_ANOC_PCIE_CLK 50 618c8acefcSMelody Olvera #define GCC_QMIP_ECPRI_DMA0_CLK 51 628c8acefcSMelody Olvera #define GCC_QMIP_ECPRI_DMA1_CLK 52 638c8acefcSMelody Olvera #define GCC_QMIP_ECPRI_GSI_CLK 53 648c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_CORE_2X_CLK 54 658c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_CORE_CLK 55 668c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S0_CLK 56 678c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S0_CLK_SRC 57 688c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S1_CLK 58 698c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S1_CLK_SRC 59 708c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S2_CLK 60 718c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S2_CLK_SRC 61 728c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S3_CLK 62 738c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S3_CLK_SRC 63 748c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S4_CLK 64 758c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S4_CLK_SRC 65 768c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S5_CLK 66 778c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S5_CLK_SRC 67 788c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S6_CLK 68 798c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S6_CLK_SRC 69 808c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S7_CLK 70 818c8acefcSMelody Olvera #define GCC_QUPV3_WRAP0_S7_CLK_SRC 71 828c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_CORE_2X_CLK 72 838c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_CORE_CLK 73 848c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S0_CLK 74 858c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S0_CLK_SRC 75 868c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S1_CLK 76 878c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S1_CLK_SRC 77 888c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S2_CLK 78 898c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S2_CLK_SRC 79 908c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S3_CLK 80 918c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S3_CLK_SRC 81 928c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S4_CLK 82 938c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S4_CLK_SRC 83 948c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S5_CLK 84 958c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S5_CLK_SRC 85 968c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S6_CLK 86 978c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S6_CLK_SRC 87 988c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S7_CLK 88 998c8acefcSMelody Olvera #define GCC_QUPV3_WRAP1_S7_CLK_SRC 89 1008c8acefcSMelody Olvera #define GCC_QUPV3_WRAP_0_M_AHB_CLK 90 1018c8acefcSMelody Olvera #define GCC_QUPV3_WRAP_0_S_AHB_CLK 91 1028c8acefcSMelody Olvera #define GCC_QUPV3_WRAP_1_M_AHB_CLK 92 1038c8acefcSMelody Olvera #define GCC_QUPV3_WRAP_1_S_AHB_CLK 93 1048c8acefcSMelody Olvera #define GCC_SDCC5_AHB_CLK 94 1058c8acefcSMelody Olvera #define GCC_SDCC5_APPS_CLK 95 1068c8acefcSMelody Olvera #define GCC_SDCC5_APPS_CLK_SRC 96 1078c8acefcSMelody Olvera #define GCC_SDCC5_ICE_CORE_CLK 97 1088c8acefcSMelody Olvera #define GCC_SDCC5_ICE_CORE_CLK_SRC 98 1098c8acefcSMelody Olvera #define GCC_SNOC_CNOC_GEMNOC_PCIE_QX_CLK 99 1108c8acefcSMelody Olvera #define GCC_SNOC_CNOC_GEMNOC_PCIE_SOUTH_QX_CLK 100 1118c8acefcSMelody Olvera #define GCC_SNOC_CNOC_PCIE_QX_CLK 101 1128c8acefcSMelody Olvera #define GCC_SNOC_PCIE_SF_CENTER_QX_CLK 102 1138c8acefcSMelody Olvera #define GCC_SNOC_PCIE_SF_SOUTH_QX_CLK 103 1148c8acefcSMelody Olvera #define GCC_TSC_CFG_AHB_CLK 104 1158c8acefcSMelody Olvera #define GCC_TSC_CLK_SRC 105 1168c8acefcSMelody Olvera #define GCC_TSC_CNTR_CLK 106 1178c8acefcSMelody Olvera #define GCC_TSC_ETU_CLK 107 1188c8acefcSMelody Olvera #define GCC_USB2_CLKREF_EN 108 1198c8acefcSMelody Olvera #define GCC_USB30_PRIM_MASTER_CLK 109 1208c8acefcSMelody Olvera #define GCC_USB30_PRIM_MASTER_CLK_SRC 110 1218c8acefcSMelody Olvera #define GCC_USB30_PRIM_MOCK_UTMI_CLK 111 1228c8acefcSMelody Olvera #define GCC_USB30_PRIM_MOCK_UTMI_CLK_SRC 112 1238c8acefcSMelody Olvera #define GCC_USB30_PRIM_MOCK_UTMI_POSTDIV_CLK_SRC 113 1248c8acefcSMelody Olvera #define GCC_USB30_PRIM_SLEEP_CLK 114 1258c8acefcSMelody Olvera #define GCC_USB3_PRIM_PHY_AUX_CLK 115 1268c8acefcSMelody Olvera #define GCC_USB3_PRIM_PHY_AUX_CLK_SRC 116 1278c8acefcSMelody Olvera #define GCC_USB3_PRIM_PHY_COM_AUX_CLK 117 1288c8acefcSMelody Olvera #define GCC_USB3_PRIM_PHY_PIPE_CLK 118 1298c8acefcSMelody Olvera #define GCC_SM_BUS_AHB_CLK 119 1308c8acefcSMelody Olvera #define GCC_SM_BUS_XO_CLK 120 1318c8acefcSMelody Olvera #define GCC_SM_BUS_XO_CLK_SRC 121 1328c8acefcSMelody Olvera #define GCC_USB3_PRIM_PHY_PIPE_CLK_SRC 122 1338c8acefcSMelody Olvera #define GCC_ETH_100G_C2C_HM_APB_CLK 123 1348c8acefcSMelody Olvera #define GCC_ETH_100G_FH_HM_APB_0_CLK 124 1358c8acefcSMelody Olvera #define GCC_ETH_100G_FH_HM_APB_1_CLK 125 1368c8acefcSMelody Olvera #define GCC_ETH_100G_FH_HM_APB_2_CLK 126 1378c8acefcSMelody Olvera #define GCC_ETH_DBG_C2C_HM_APB_CLK 127 1388c8acefcSMelody Olvera #define GCC_AGGRE_NOC_ECPRI_GSI_CLK 128 1398c8acefcSMelody Olvera #define GCC_PCIE_0_PIPE_CLK_SRC 129 1408c8acefcSMelody Olvera #define GCC_PCIE_0_PHY_AUX_CLK_SRC 130 141*df873243SImran Shaik #define GCC_GPLL1_OUT_EVEN 131 142*df873243SImran Shaik #define GCC_DDRSS_ECPRI_GSI_CLK 132 1438c8acefcSMelody Olvera 1448c8acefcSMelody Olvera /* GCC resets */ 1458c8acefcSMelody Olvera #define GCC_ECPRI_CC_BCR 0 1468c8acefcSMelody Olvera #define GCC_ECPRI_SS_BCR 1 1478c8acefcSMelody Olvera #define GCC_ETH_WRAPPER_BCR 2 1488c8acefcSMelody Olvera #define GCC_PCIE_0_BCR 3 1498c8acefcSMelody Olvera #define GCC_PCIE_0_LINK_DOWN_BCR 4 1508c8acefcSMelody Olvera #define GCC_PCIE_0_NOCSR_COM_PHY_BCR 5 1518c8acefcSMelody Olvera #define GCC_PCIE_0_PHY_BCR 6 1528c8acefcSMelody Olvera #define GCC_PCIE_0_PHY_NOCSR_COM_PHY_BCR 7 1538c8acefcSMelody Olvera #define GCC_PCIE_PHY_CFG_AHB_BCR 8 1548c8acefcSMelody Olvera #define GCC_PCIE_PHY_COM_BCR 9 1558c8acefcSMelody Olvera #define GCC_PDM_BCR 10 1568c8acefcSMelody Olvera #define GCC_QUPV3_WRAPPER_0_BCR 11 1578c8acefcSMelody Olvera #define GCC_QUPV3_WRAPPER_1_BCR 12 1588c8acefcSMelody Olvera #define GCC_QUSB2PHY_PRIM_BCR 13 1598c8acefcSMelody Olvera #define GCC_QUSB2PHY_SEC_BCR 14 1608c8acefcSMelody Olvera #define GCC_SDCC5_BCR 15 1618c8acefcSMelody Olvera #define GCC_TCSR_PCIE_BCR 16 1628c8acefcSMelody Olvera #define GCC_TSC_BCR 17 1638c8acefcSMelody Olvera #define GCC_USB30_PRIM_BCR 18 1648c8acefcSMelody Olvera #define GCC_USB3_DP_PHY_PRIM_BCR 19 1658c8acefcSMelody Olvera #define GCC_USB3_DP_PHY_SEC_BCR 20 1668c8acefcSMelody Olvera #define GCC_USB3_PHY_PRIM_BCR 21 1678c8acefcSMelody Olvera #define GCC_USB3_PHY_SEC_BCR 22 1688c8acefcSMelody Olvera #define GCC_USB3PHY_PHY_PRIM_BCR 23 1698c8acefcSMelody Olvera #define GCC_USB3PHY_PHY_SEC_BCR 24 1708c8acefcSMelody Olvera #define GCC_USB_PHY_CFG_AHB2PHY_BCR 25 1718c8acefcSMelody Olvera 1728c8acefcSMelody Olvera /* GCC power domains */ 1738c8acefcSMelody Olvera #define PCIE_0_GDSC 0 1748c8acefcSMelody Olvera #define PCIE_0_PHY_GDSC 1 1758c8acefcSMelody Olvera #define USB30_PRIM_GDSC 2 1768c8acefcSMelody Olvera 1778c8acefcSMelody Olvera #endif 178