| /openbmc/u-boot/arch/arm/cpu/armv8/ |
| H A D | generic_timer.c | 18 unsigned long cntfrq; in get_tbclk() local
19 asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq)); in get_tbclk()
20 return cntfrq; in get_tbclk()
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| H A D | start.S | 112 msr cntfrq_el0, x0 /* Initialize CNTFRQ */
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| /openbmc/qemu/hw/timer/ |
| H A D | sse-timer.c | 53 REG32(CNTFRQ, 0x10)
229 r = s->cntfrq; in sse_timer_read()
289 s->cntfrq = value; in sse_timer_write()
379 s->cntfrq = 0; in sse_timer_reset()
433 VMSTATE_UINT32(cntfrq, SSETimer),
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| /openbmc/u-boot/arch/arm/mach-tegra/ |
| H A D | psci.S | 57 mrceq p15, 0, r7, c14, c0, 0 @ read CNTFRQ from CPU0
61 mcrne p15, 0, r7, c14, c0, 0 @ write CNTFRQ to CPU1..3
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| /openbmc/u-boot/arch/arm/cpu/armv7/ |
| H A D | nonsec_virt.S | 186 /* The CNTFRQ register of the generic timer needs to be
197 mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ
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| /openbmc/qemu/include/hw/timer/ |
| H A D | sse-timer.h | 46 uint32_t cntfrq; member
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| /openbmc/u-boot/arch/arm/mach-mediatek/mt7629/ |
| H A D | lowlevel_init.S | 24 * set CNTFRQ = 20Mhz, set CNTVOFF = 0
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| /openbmc/linux/Documentation/devicetree/bindings/timer/ |
| H A D | arm,arch_timer_mmio.yaml | 40 CNTFRQ on all CPUs to a uniform correct value. Use of this property is
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| H A D | arm,arch_timer.yaml | 63 CNTFRQ on all CPUs to a uniform correct value. Use of this property is
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| /openbmc/linux/drivers/clocksource/ |
| H A D | arm_arch_timer.c | 50 #define CNTFRQ 0x10 macro
1476 rate = readl_relaxed(base + CNTFRQ); in arch_timer_mem_frame_get_cntfrq()
1667 pr_err(FW_BUG "CNTFRQ mismatch: frame @ %pa: (0x%08lx), CPU: (0x%08lx)\n", in arch_timer_mem_verify_cntfrq()
1705 pr_err("Disabling MMIO timers due to CNTFRQ mismatch\n"); in arch_timer_mem_acpi_init()
1754 * CNTFRQ value. This *must* be correct. in arch_timer_acpi_init()
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| /openbmc/linux/Documentation/translations/zh_TW/arch/arm64/ |
| H A D | booting.txt | 182 CNTFRQ 必須設定爲計時器的頻率，且 CNTVOFF 必須設定爲對所有 CPU
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| /openbmc/linux/Documentation/translations/zh_CN/arch/arm64/ |
| H A D | booting.txt | 178 CNTFRQ 必须设定为计时器的频率，且 CNTVOFF 必须设定为对所有 CPU
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| /openbmc/linux/drivers/irqchip/ |
| H A D | irq-bcm2836.c | 296 * oscillator with some scaling. The firmware sets up CNTFRQ to
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| /openbmc/qemu/tests/qtest/ |
| H A D | sse-timer-test.c | 42 #define CNTFRQ 0x10 macro
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| /openbmc/u-boot/arch/arm/mach-aspeed/ast2600/ |
| H A D | platform.S | 130 mcr p15, 0, r0, c14, c0, 0 @; update CNTFRQ
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| /openbmc/qemu/target/arm/hvf/ |
| H A D | hvf.c | 1802 uint32_t cntfrq; in hvf_wfi() local
1826 cntfrq = gt_cntfrq_period_ns(arm_cpu); in hvf_wfi()
1827 seconds = muldiv64(ticks_to_sleep, cntfrq, NANOSECONDS_PER_SECOND); in hvf_wfi()
1828 ticks_to_sleep -= muldiv64(seconds, NANOSECONDS_PER_SECOND, cntfrq); in hvf_wfi()
1829 nanos = ticks_to_sleep * cntfrq; in hvf_wfi()
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| /openbmc/linux/arch/arm/mach-omap2/ |
| H A D | omap-smp.c | 162 * Configure the CNTFRQ register for the secondary cpu's which in omap4_secondary_init()
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| /openbmc/u-boot/board/sunxi/ |
| H A D | board.c | 229 debug("Setting CNTFRQ\n"); in board_init()
232 * CNTFRQ is a secure register, so we will crash if we try to in board_init()
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| /openbmc/qemu/include/hw/xen/interface/ |
| H A D | arch-arm.h | 311 * set correctly CNTFRQ which hold the timer frequency.
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| /openbmc/linux/Documentation/arch/arm64/ |
| H A D | booting.rst | 192 CNTFRQ must be programmed with the timer frequency and CNTVOFF must
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| /openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | cpu.c | 1145 unsigned long cntfrq = COUNTER_FREQUENCY_REAL; in timer_init() local
1149 asm volatile("msr cntfrq_el0, %0" : : "r" (cntfrq) : "memory"); in timer_init()
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| /openbmc/qemu/target/arm/ |
| H A D | cpu.c | 1552 DEFINE_PROP_UINT64("cntfrq", ARMCPU, gt_cntfrq_hz, 0);
1636 * Finally, CNTFRQ is effectively capped at 1GHz to ensure our scale factor in gt_cntfrq_period_ns()
2643 /* True to default to the backward-compat old CNTFRQ rather than 1Ghz */
2644 DEFINE_PROP_BOOL("backcompat-cntfrq", ARMCPU, backcompat_cntfrq, false),
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| /openbmc/u-boot/arch/arm/mach-tegra/tegra114/ |
| H A D | clock.c | 721 /* ARM CNTFRQ */ in arch_timer_init()
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| /openbmc/qemu/hw/arm/ |
| H A D | aspeed_ast27x0.c | 495 object_property_set_int(OBJECT(&a->cpu[i]), "cntfrq", 1125000000, in aspeed_soc_ast2700_realize()
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| H A D | sbsa-ref.c | 786 object_property_set_int(cpuobj, "cntfrq", SBSA_GTIMER_HZ, &error_abort); in sbsa_ref_init()
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