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/openbmc/linux/drivers/net/ethernet/pensando/ionic/
H A Dionic_bus_pci.c50 struct ionic_dev_bar *bars; in ionic_map_bars() local
53 bars = ionic->bars; in ionic_map_bars()
59 bars[j].len = pci_resource_len(pdev, i); in ionic_map_bars()
63 bars[j].vaddr = NULL; in ionic_map_bars()
65 bars[j].vaddr = pci_iomap(pdev, i, bars[j].len); in ionic_map_bars()
66 if (!bars[j].vaddr) { in ionic_map_bars()
74 bars[j].bus_addr = pci_resource_start(pdev, i); in ionic_map_bars()
75 bars[j].res_index = i; in ionic_map_bars()
85 struct ionic_dev_bar *bars = ionic->bars; in ionic_unmap_bars() local
89 if (bars[i].vaddr) { in ionic_unmap_bars()
[all …]
/openbmc/linux/drivers/net/ethernet/amd/pds_core/
H A Dmain.c37 struct pdsc_dev_bar *bars = pdsc->bars; in pdsc_unmap_bars() local
46 if (bars[i].vaddr) in pdsc_unmap_bars()
47 pci_iounmap(pdsc->pdev, bars[i].vaddr); in pdsc_unmap_bars()
53 struct pdsc_dev_bar *bar = pdsc->bars; in pdsc_map_bars()
56 struct pdsc_dev_bar *bars; in pdsc_map_bars() local
62 bars = pdsc->bars; in pdsc_map_bars()
65 * we need to poke into all the bars to find the set we're in pdsc_map_bars()
72 bars[j].len = pci_resource_len(pdev, i); in pdsc_map_bars()
73 bars[j].bus_addr = pci_resource_start(pdev, i); in pdsc_map_bars()
74 bars[j].res_index = i; in pdsc_map_bars()
[all …]
/openbmc/qemu/hw/vfio/
H A Dpci-quirks.c110 return vfio_region_read(&vdev->bars[window->bar].region, in vfio_generic_window_quirk_address_read()
124 vfio_region_write(&vdev->bars[window->bar].region, in vfio_generic_window_quirk_address_write()
152 data = vfio_region_read(&vdev->bars[window->bar].region, in vfio_generic_window_quirk_data_read()
177 vfio_region_write(&vdev->bars[window->bar].region, in vfio_generic_window_quirk_data_write()
209 (void)vfio_region_read(&vdev->bars[mirror->bar].region, in vfio_generic_quirk_mirror_read()
418 !vdev->bars[4].ioport || vdev->bars[4].region.size < 256) { in vfio_vga_probe_ati_3c3_quirk()
471 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_ati_bar4_quirk()
478 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_ati_bar4_quirk()
482 QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); in vfio_probe_ati_bar4_quirk()
497 !vdev->vga || nr != 2 || !vdev->bars[2].mem64) { in vfio_probe_ati_bar2_quirk()
[all …]
H A Dpci.c1164 * region to zero in case of overlap with BARs which share the same page
1172 VFIORegion *region = &vdev->bars[bar].region; in vfio_sub_page_bar_update_mapping()
1186 base_mr = vdev->bars[bar].mr; in vfio_sub_page_bar_update_mapping()
1198 if (vdev->bars[bar].size < size) { in vfio_sub_page_bar_update_mapping()
1203 if (size != vdev->bars[bar].size && memory_region_is_mapped(base_mr)) { in vfio_sub_page_bar_update_mapping()
1308 vdev->bars[bar].region.size > 0 && in vfio_pci_write_config()
1309 vdev->bars[bar].region.size < qemu_real_host_page_size()) { in vfio_pci_write_config()
1376 VFIORegion *region = &vdev->bars[vdev->msix->table_bar].region; in vfio_pci_fixup_msix_region()
1464 /* PCI BARs must be a power of 2 */ in vfio_pci_relocate_msix()
1485 /* I/O port BARs cannot host MSI-X structures */ in vfio_pci_relocate_msix()
[all …]
H A Digd.c299 return vfio_region_read(&vdev->bars[4].region, addr + 4, size); in vfio_igd_quirk_data_read()
347 vfio_region_write(&vdev->bars[4].region, addr + 4, val, size); in vfio_igd_quirk_data_write()
366 return vfio_region_read(&vdev->bars[4].region, addr, size); in vfio_igd_quirk_index_read()
377 vfio_region_write(&vdev->bars[4].region, addr, data, size); in vfio_igd_quirk_index_write()
477 memory_region_add_subregion_overlap(vdev->bars[0].region.mem, in vfio_probe_igd_bar0_quirk()
481 QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); in vfio_probe_igd_bar0_quirk()
669 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_igd_bar4_quirk()
674 memory_region_add_subregion_overlap(vdev->bars[nr].region.mem, in vfio_probe_igd_bar4_quirk()
677 QLIST_INSERT_HEAD(&vdev->bars[nr].quirks, quirk, next); in vfio_probe_igd_bar4_quirk()
737 vfio_region_write(&vdev->bars[4].region, 0, i, 4); in vfio_probe_igd_bar4_quirk()
[all …]
/openbmc/qemu/docs/
H A Dpcie_sriov.txt24 capability. All VFs have the same BARs and BAR sizes.
26 Accesses to these virtual BARs then is computed as
59 /* Set up individual VF BARs (parameters as for normal BARs) */
72 except for the SR/IOV capability. Then you need to set up the VF BARs as
73 subregions of the PFs SR/IOV VF BARs by calling
/openbmc/linux/Documentation/powerpc/
H A Dpci_iov_resource_on_powernv.rst107 scheme where individual function BARs can be "grouped" to fit in one or
127 for large BARs in 64-bit space:
156 PE" mode to overlay over specific BARs to work around some of that, for
157 example for devices with very large BARs, e.g., GPUs. It would make
170 PCI devices, but the BARs in VF config space headers are unusual. For
171 a non-VF device, software uses BARs in the config space header to
174 discover sizes and assign addresses. The BARs in the VF's config space
178 base address for all the corresponding VF(n) BARs. For example, if the
190 window with 1MB segments. VF BARs that are 1MB or larger could be
193 flexible, but it works best when all the VF BARs are the same size. If
[all …]
/openbmc/linux/drivers/accel/habanalabs/common/pci/
H A Dpci.c23 * hl_pci_bars_map() - Map PCI BARs.
45 bar = i * 2; /* 64-bit BARs */ in hl_pci_bars_map()
61 bar = i * 2; /* 64-bit BARs */ in hl_pci_bars_map()
72 * hl_pci_bars_unmap() - Unmap PCI BARS.
75 * Release all PCI BARs and unmap their virtual addresses.
83 bar = i * 2; /* 64-bit BARs */ in hl_pci_bars_unmap()
374 * Set DMA masks, initialize the PCI controller and map the PCI BARs.
432 * Unmap PCI bars and disable PCI device.
/openbmc/linux/drivers/mfd/
H A Dsta2x11-mfd.c520 struct sta2x11_mfd_bar_setup_data bars[2]; member
529 .bars = {
542 .bars = {
559 for (i = 0; i < ARRAY_SIZE(sd->bars); i++) in sta2x11_mfd_setup()
560 for (j = 0; j < sd->bars[i].ncells; j++) { in sta2x11_mfd_setup()
561 sd->bars[i].cells[j].pdata_size = sizeof(pdev); in sta2x11_mfd_setup()
562 sd->bars[i].cells[j].platform_data = &pdev; in sta2x11_mfd_setup()
595 /* Just 2 bars for all mfd's at present */ in sta2x11_mfd_probe()
598 setup_data->bars[i].cells, in sta2x11_mfd_probe()
599 setup_data->bars[i].ncells, in sta2x11_mfd_probe()
/openbmc/linux/arch/s390/pci/
H A Dpci.c276 idx = zdev->bars[bar].map_idx; in pci_iomap_range_fh()
295 iova = ioremap((unsigned long) zdev->bars[bar].mio_wt, barsize); in pci_iomap_range_mio()
325 iova = ioremap((unsigned long) zdev->bars[bar].mio_wb, barsize); in pci_iomap_wc_range_mio()
410 (resource_size_t __force) zdev->bars[i].mio_wt; in zpci_map_resources()
467 if (!zdev->bars[bar].size) in zpci_do_update_iomap_fh()
469 idx = zdev->bars[bar].map_idx; in zpci_do_update_iomap_fh()
520 if (!zdev->bars[i].size) in zpci_setup_bus_resources()
525 zdev->bars[i].map_idx = entry; in zpci_setup_bus_resources()
529 if (zdev->bars[i].val & 8) in zpci_setup_bus_resources()
531 if (zdev->bars[i].val & 4) in zpci_setup_bus_resources()
[all …]
/openbmc/linux/drivers/scsi/csiostor/
H A Dcsio_init.c184 * @bars: Bitmask of bars to be requested.
190 csio_pci_init(struct pci_dev *pdev, int *bars) in csio_pci_init() argument
194 *bars = pci_select_bars(pdev, IORESOURCE_MEM); in csio_pci_init()
199 if (pci_request_selected_regions(pdev, *bars, KBUILD_MODNAME)) in csio_pci_init()
217 pci_release_selected_regions(pdev, *bars); in csio_pci_init()
228 * @bars: Bars to be released.
232 csio_pci_exit(struct pci_dev *pdev, int *bars) in csio_pci_exit() argument
234 pci_release_selected_regions(pdev, *bars); in csio_pci_exit()
512 * Allocates HW structure, DMA, memory resources, maps BARS to
929 * - Allocates HW structure, DMA, memory resources, maps BARS to
[all …]
/openbmc/linux/arch/powerpc/platforms/powernv/
H A Dpci-sriov.c21 * For conventional PCI devices this isn't really an issue since PCI device BARs
29 * allocate the SR-IOV BARs in a way that lets us map them using the MBT.
45 * (num-vfs * num-sriov-bars) in total. To use a) we need the size of each segment
56 * At this point the device has been probed and the device's BARs are sized,
57 * but no resource allocations have been done. The SR-IOV BARs are sized
63 * sorts the BARs on a bus by their required alignment, which is calculated
109 * it only usable for devices with very large per-VF BARs. Such devices are
123 * us to support SR-IOV BARs in the 32bit MMIO window. This is useful since
215 /* Save ourselves some MMIO space by disabling the unusable BARs */ in pnv_pci_ioda_fixup_iov_resources()
258 * BARs would not be placed in the correct PE. in pnv_pci_iov_resource_alignment()
[all …]
/openbmc/linux/drivers/net/ethernet/netronome/nfp/nfpcore/
H A Dnfp6000_pcie.c10 * Multiplexes the NFP BARs between NFP internal resources and
13 * The BARs are managed with refcounts and are allocated/acquired
106 /* The number of explicit BARs to reserve.
149 int bars; member
347 /* We don't match explicit bars through the area interface */ in matching_bar()
372 for (n = 0; n < nfp->bars; n++) { in find_matching_bar()
390 for (n = 0; n < nfp->bars; n++) { in find_unused_bar_noblock()
519 /* Map all PCI bars and fetch the actual BAR configurations from the
566 snprintf(status_msg, sizeof(status_msg) - 1, "RESERVED BARs: "); in enable_bars()
575 /* Skip over BARs that are not IORESOURCE_MEM */ in enable_bars()
[all …]
/openbmc/linux/Documentation/gpu/amdgpu/display/
H A Ddc-debug.rst9 bars added at the scanout time by the driver to convey some specific
33 * Pipe split can be observed if there are two bars with a difference in height
38 feature one or two green bars at the bottom of the video depending on pipe
/openbmc/linux/drivers/ntb/hw/idt/
H A DKconfig18 and SWPORTxCTL registers). Then all NT-function BARs must be enabled
19 with chosen valid aperture. For memory windows related BARs the
/openbmc/linux/lib/
H A Ddevres.c416 * pcim_iomap_regions - Request and iomap PCI BARs
418 * @mask: Mask of BARs to request and iomap
469 * pcim_iomap_regions_request_all - Request all BARs and iomap specified ones
471 * @mask: Mask of BARs to iomap
474 * Request all PCI BARs and iomap regions specified by @mask.
494 * pcim_iounmap_regions - Unmap and release PCI BARs
496 * @mask: Mask of BARs to unmap and release
/openbmc/qemu/docs/specs/
H A Dpci-testdev.rst7 The device implements up to three BARs: BAR0, BAR1 and BAR2.
38 can be used to test whether guests handle PCI BARs of a specific
/openbmc/linux/Documentation/PCI/endpoint/
H A Dpci-ntb-function.rst12 machine, expose memory ranges as BARs, and perform DMA. They also support
230 one is permitted. All these regions should be mapped to BARs for hosts to
248 be enough BARs for all the regions in a platform that supports only 64-bit
249 BARs.
252 packed and mapped to BARs in a way that provides NTB functionality and
269 With this scheme, for the basic NTB functionality 3 BARs should be sufficient.
339 space. Allocating and configuring BARs for doorbell and memory window1
348 is mapped to separate BARs.
/openbmc/linux/drivers/pci/
H A Dsetup-res.c34 /* Per SR-IOV spec 3.4.1.11, VF BARs are RO zero */ in pci_std_update_resource()
39 * Ignore resources for unimplemented BARs and unused resource slots in pci_std_update_resource()
40 * for 64 bit BARs. in pci_std_update_resource()
74 * Apparently some Matrox devices have ROM BARs that read in pci_std_update_resource()
75 * as zero when disabled, so don't update ROM BARs unless in pci_std_update_resource()
79 * disabled ROM can conflict with other BARs. in pci_std_update_resource()
/openbmc/openbmc/poky/meta/recipes-extended/unzip/unzip/
H A DCVE-2021-4217.patch2 From: Nils Bars <nils.bars@t-online.de>
/openbmc/linux/drivers/vdpa/solidrun/
H A Dsnet_vdpa.h143 /* PCI BARs */
144 void __iomem *bars[PCI_STD_NUM_BARS]; member
170 return ioread32(psnet->bars[psnet->barno] + off); in psnet_read32()
/openbmc/linux/drivers/accel/qaic/
H A Dqaic_drv.c400 int bars; in init_pci() local
403 bars = pci_select_bars(pdev, IORESOURCE_MEM); in init_pci()
405 /* make sure the device has the expected BARs */ in init_pci()
406 if (bars != (BIT(0) | BIT(2) | BIT(4))) { in init_pci()
407 pci_dbg(pdev, "%s: expected BARs 0, 2, and 4 not found in device. Found 0x%x\n", in init_pci()
408 __func__, bars); in init_pci()
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-pxa-pci-ce4100.txt5 PCI device has three PCI-bars, each bar contains a complete I2C
20 1:1 mapped to the BARs, and the second is the
/openbmc/linux/arch/sparc/kernel/
H A Dleon_pci_grpci2.c31 * - barcfgs : Custom Configuration of Host's 6 target BARs
79 unsigned int bars[6]; /* 0x20 read-only PCI BARs */ member
605 /* Setup the Host's PCI Target BARs for other peripherals to access, in grpci2_hw_init()
606 * and do DMA to the host's memory. The target BARs can be sized and in grpci2_hw_init()
609 * User may set custom target BARs, but default is: in grpci2_hw_init()
610 * The first BARs is used to map kernel low (DMA is part of normal in grpci2_hw_init()
612 * PCI bus, the other BARs are disabled. We assume that the first BAR in grpci2_hw_init()
617 /* Target BARs must have the proper alignment */ in grpci2_hw_init()
/openbmc/linux/drivers/infiniband/hw/efa/
H A Defa_main.c190 int bars; in efa_request_doorbell_bar() local
194 bars = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(db_bar_idx); in efa_request_doorbell_bar()
196 err = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); in efa_request_doorbell_bar()
531 int bars; in efa_probe_device() local
556 bars = pci_select_bars(pdev, IORESOURCE_MEM) & EFA_BASE_BAR_MASK; in efa_probe_device()
557 err = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME); in efa_probe_device()

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